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Mario Six3e67cb22019-01-21 09:18:23 +01001/*
2 * Internal Definitions
3 */
Simon Glassfb64e362020-05-10 11:40:09 -06004#include <linux/stringify.h>
Mario Six3e67cb22019-01-21 09:18:23 +01005#define BOOTFLASH_START 0xF0000000
6
Mario Six3e67cb22019-01-21 09:18:23 +01007/*
8 * DDR Setup
9 */
10#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */
11#define CONFIG_SYS_SDRAM_BASE2 (CONFIG_SYS_SDRAM_BASE + 0x10000000) /* +256M */
12
13#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
14 DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
15
16#define CFG_83XX_DDR_USES_CS0
17
18/*
19 * Manually set up DDR parameters
20 */
21#define CONFIG_DDR_II
22#define CONFIG_SYS_DDR_SIZE 2048 /* MB */
23
24/*
25 * The reserved memory
26 */
27#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
28#define CONFIG_SYS_FLASH_BASE 0xF0000000
29
30#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
31#define CONFIG_SYS_RAMBOOT
32#endif
33
34/* Reserve 768 kB for Mon */
35#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
36
37/*
38 * Initial RAM Base Address Setup
39 */
40#define CONFIG_SYS_INIT_RAM_LOCK
41#define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
42#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */
43#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
44 GENERATED_GBL_DATA_SIZE)
45/*
46 * Init Local Bus Memory Controller:
47 *
48 * Bank Bus Machine PortSz Size Device
49 * ---- --- ------- ------ ----- ------
50 * 0 Local GPCM 16 bit 256MB FLASH
51 * 1 Local GPCM 8 bit 128MB GPIO/PIGGY
52 *
53 */
54
55/*
56 * FLASH on the Local Bus
57 */
58#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
59
60#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
61#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
62#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
63
Mario Six3e67cb22019-01-21 09:18:23 +010064/* I2C */
65#define CONFIG_SYS_I2C
66#define CONFIG_SYS_NUM_I2C_BUSES 4
67#define CONFIG_SYS_I2C_MAX_HOPS 1
68#define CONFIG_SYS_I2C_FSL
69#define CONFIG_SYS_FSL_I2C_SPEED 200000
70#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
71#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
72#define CONFIG_SYS_I2C_OFFSET 0x3000
73#define CONFIG_SYS_FSL_I2C2_SPEED 200000
74#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
75#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
76#define CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP} }, \
77 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
78 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
79 {1, {I2C_NULL_HOP} } }
80
Mario Six3e67cb22019-01-21 09:18:23 +010081#if defined(CONFIG_CMD_NAND)
82#define CONFIG_NAND_KMETER1
83#define CONFIG_SYS_MAX_NAND_DEVICE 1
84#define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE
85#endif
86
87/*
88 * For booting Linux, the board info and command line data
89 * have to be in the first 8 MB of memory, since this is
90 * the maximum mapped by the Linux kernel during initialization.
91 */
92#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
93
94/*
95 * Environment
96 */
97
98#ifndef CONFIG_SYS_RAMBOOT
Mario Six3e67cb22019-01-21 09:18:23 +010099/* Address and size of Redundant Environment Sector */
Mario Six3e67cb22019-01-21 09:18:23 +0100100#endif /* CFG_SYS_RAMBOOT */
101
102/*
103 * Environment Configuration
104 */
Mario Six3e67cb22019-01-21 09:18:23 +0100105#ifndef CONFIG_KM_DEF_ENV /* if not set by keymile-common.h */
106#define CONFIG_KM_DEF_ENV "km-common=empty\0"
107#endif
108
109#ifndef CONFIG_KM_DEF_ARCH
110#define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0"
111#endif
112
113#define CONFIG_EXTRA_ENV_SETTINGS \
114 CONFIG_KM_DEF_ENV \
115 CONFIG_KM_DEF_ARCH \
116 "newenv=" \
117 "prot off " __stringify(CONFIG_ENV_ADDR) " +0x40000 && " \
118 "era " __stringify(CONFIG_ENV_ADDR) " +0x40000\0" \
119 "unlock=yes\0" \
120 ""
121
122#if defined(CONFIG_UEC_ETH)
123#define CONFIG_HAS_ETH0
124#endif
125
126/*
127 * QE UEC ethernet configuration
128 */
129#define CONFIG_UEC_ETH
130#define CONFIG_ETHPRIME "UEC0"