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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Eric Benard2e66f3b2014-04-04 19:05:55 +02002/*
3 * Copyright (C) 2014 Eukréa Electromatique
4 * Author: Eric Bénard <eric@eukrea.com>
5 *
6 * Configuration settings for the Embest RIoTboard
7 *
8 * based on mx6*sabre*.h which are :
9 * Copyright (C) 2012 Freescale Semiconductor, Inc.
Eric Benard2e66f3b2014-04-04 19:05:55 +020010 */
11
12#ifndef __RIOTBOARD_CONFIG_H
13#define __RIOTBOARD_CONFIG_H
14
Eric Benard2e66f3b2014-04-04 19:05:55 +020015#define CONFIG_MXC_UART_BASE UART2_BASE
Simon Glass4694a742016-10-17 20:12:39 -060016#define CONSOLE_DEV "ttymxc1"
Eric Benard2e66f3b2014-04-04 19:05:55 +020017
18#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
19
Adrian Alonsoce08c362015-09-02 13:54:13 -050020#define CONFIG_IMX_THERMAL
Eric Benard2e66f3b2014-04-04 19:05:55 +020021
22/* Size of malloc() pool */
23#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
24
Eric Benard2e66f3b2014-04-04 19:05:55 +020025/* I2C Configs */
Eric Benard2e66f3b2014-04-04 19:05:55 +020026#define CONFIG_SYS_I2C
27#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +020028#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
29#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf1a52162015-03-20 10:20:40 -070030#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Eric Benard2e66f3b2014-04-04 19:05:55 +020031#define CONFIG_SYS_I2C_SPEED 100000
32
33/* USB Configs */
Eric Benard2e66f3b2014-04-04 19:05:55 +020034#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
35#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
36#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
37#define CONFIG_MXC_USB_FLAGS 0
38
39/* MMC Configs */
Eric Benard2e66f3b2014-04-04 19:05:55 +020040#define CONFIG_SYS_FSL_ESDHC_ADDR 0
41
Eric Benard2e66f3b2014-04-04 19:05:55 +020042#define CONFIG_FEC_MXC
Eric Benard2e66f3b2014-04-04 19:05:55 +020043#define IMX_FEC_BASE ENET_BASE_ADDR
44#define CONFIG_FEC_XCV_TYPE RGMII
45#define CONFIG_ETHPRIME "FEC"
46#define CONFIG_FEC_MXC_PHYADDR 4
47
Eric Benard2e66f3b2014-04-04 19:05:55 +020048#define CONFIG_ARP_TIMEOUT 200UL
49
Eric Benard2e66f3b2014-04-04 19:05:55 +020050/* Physical Memory Map */
Eric Benard2e66f3b2014-04-04 19:05:55 +020051#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
52
53#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
54#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
55#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
56
57#define CONFIG_SYS_INIT_SP_OFFSET \
58 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
59#define CONFIG_SYS_INIT_SP_ADDR \
60 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
61
Peter Robinson4b671502015-05-22 17:30:45 +010062/* Environment organization */
Eric Benard2e66f3b2014-04-04 19:05:55 +020063
64#if defined(CONFIG_ENV_IS_IN_MMC)
65/* RiOTboard */
Iain Patone90c9ab2014-12-14 14:51:46 +000066#define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
Eric Benard2e66f3b2014-04-04 19:05:55 +020067#define CONFIG_SYS_FSL_USDHC_NUM 3
Eric Benard2e66f3b2014-04-04 19:05:55 +020068#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
69/* MarSBoard */
Iain Patone90c9ab2014-12-14 14:51:46 +000070#define CONFIG_FDTFILE "imx6q-marsboard.dtb"
Eric Benard2e66f3b2014-04-04 19:05:55 +020071#define CONFIG_SYS_FSL_USDHC_NUM 2
Eric Benard2e66f3b2014-04-04 19:05:55 +020072#endif
73
Eric Benard2e66f3b2014-04-04 19:05:55 +020074/* Framebuffer */
Eric Benard2e66f3b2014-04-04 19:05:55 +020075#define CONFIG_VIDEO_LOGO
76#define CONFIG_VIDEO_BMP_LOGO
Eric Benard2e66f3b2014-04-04 19:05:55 +020077#define CONFIG_IMX_HDMI
78#define CONFIG_IMX_VIDEO_SKIP
79
Peter Robinsonbe6c5f12015-05-22 17:30:52 +010080#include "mx6_common.h"
Iain Paton2e891152014-12-14 14:51:32 +000081
Fabien Lahouderea47a6a12018-11-08 11:28:05 +010082#ifdef CONFIG_SPL
83#include "imx6_spl.h"
84/* RiOTboard */
85#define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000
86#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
87#define CONFIG_SPL_FS_LOAD_ARGS_NAME "imx6dl-riotboard.dtb"
88
89#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* offset 69KB */
90#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* offset 69KB */
91#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* offset 69KB */
92
93#endif
94
Iain Patone90c9ab2014-12-14 14:51:46 +000095/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
96 * 1M script, 1M pxe and the ramdisk at the end */
97#define MEM_LAYOUT_ENV_SETTINGS \
98 "bootm_size=0x10000000\0" \
99 "kernel_addr_r=0x12000000\0" \
100 "fdt_addr_r=0x13000000\0" \
101 "scriptaddr=0x13100000\0" \
102 "pxefile_addr_r=0x13200000\0" \
103 "ramdisk_addr_r=0x13300000\0"
104
105#define BOOT_TARGET_DEVICES(func) \
106 func(MMC, mmc, 0) \
107 func(MMC, mmc, 1) \
108 func(MMC, mmc, 2) \
109 func(USB, usb, 0) \
110 func(PXE, pxe, na) \
111 func(DHCP, dhcp, na)
112
113#include <config_distro_bootcmd.h>
114
115#define CONSOLE_STDIN_SETTINGS \
116 "stdin=serial\0"
117
118#define CONSOLE_STDOUT_SETTINGS \
119 "stdout=serial\0" \
120 "stderr=serial\0"
121
122#define CONSOLE_ENV_SETTINGS \
123 CONSOLE_STDIN_SETTINGS \
124 CONSOLE_STDOUT_SETTINGS
125
126#define CONFIG_EXTRA_ENV_SETTINGS \
127 CONSOLE_ENV_SETTINGS \
128 MEM_LAYOUT_ENV_SETTINGS \
129 "fdtfile=" CONFIG_FDTFILE "\0" \
Fabio Bertoncd681b22017-07-10 17:04:11 -0300130 "finduuid=part uuid mmc 0:1 uuid\0" \
Iain Patone90c9ab2014-12-14 14:51:46 +0000131 BOOTENV
132
Eric Benard2e66f3b2014-04-04 19:05:55 +0200133#endif /* __RIOTBOARD_CONFIG_H */