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git01.mediatek.com / filogic / uboot / 8ffa86b7cc8ad567256c45151c47569e27893cea / . / configs / anbernic-rgxx3-rk3566_defconfig
blob: 2b484fcaef5eaaf6c3f74395cf59c861a39f389f [file] [log] [blame]
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]1CONFIG_ARM=y
2CONFIG_SKIP_LOWLEVEL_INIT=y
3CONFIG_COUNTER_FREQUENCY=24000000
4CONFIG_ARCH_ROCKCHIP=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]5CONFIG_NR_DRAM_BANKS=2
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]6CONFIG_DEFAULT_DEVICE_TREE="rk3566-anbernic-rgxx3"
7CONFIG_ROCKCHIP_RK3568=y
8CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]9CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]10CONFIG_SPL_MMC=y
11CONFIG_SPL_SERIAL=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]12CONFIG_TARGET_ANBERNIC_RGXX3_RK3566=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]13CONFIG_DEBUG_UART_BASE=0xFE660000
14CONFIG_DEBUG_UART_CLOCK=24000000
15CONFIG_SYS_LOAD_ADDR=0xc00800
16CONFIG_DEBUG_UART=y
17CONFIG_FIT=y
18CONFIG_FIT_VERBOSE=y
19CONFIG_SPL_LOAD_FIT=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]20CONFIG_OF_BOARD_SETUP=y
21CONFIG_OF_STDOUT_VIA_ALIAS=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]22CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-anbernic-rgxx3.dtb"
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]23# CONFIG_CONSOLE_MUX is not set
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]24# CONFIG_DISPLAY_CPUINFO is not set
25CONFIG_DISPLAY_BOARDINFO_LATE=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]26CONFIG_BOARD_RNG_SEED=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]27CONFIG_SPL_MAX_SIZE=0x20000
28CONFIG_SPL_PAD_TO=0x7f8000
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]29CONFIG_SPL_BOARD_INIT=y
30# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]31CONFIG_SPL_ATF=y
32CONFIG_CMD_PWM=y
33CONFIG_CMD_GPT=y
34CONFIG_CMD_MMC=y
35# CONFIG_CMD_SETEXPR is not set
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]36# CONFIG_CMD_CLS is not set
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]37# CONFIG_SPL_DOS_PARTITION is not set
38CONFIG_SPL_OF_CONTROL=y
39CONFIG_OF_LIVE=y
40CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
41# CONFIG_NET is not set
42CONFIG_SPL_REGMAP=y
43CONFIG_SPL_SYSCON=y
44CONFIG_SPL_CLK=y
45CONFIG_ARM_SMCCC_FEATURES=y
46CONFIG_SCMI_FIRMWARE=y
47CONFIG_ROCKCHIP_GPIO=y
48CONFIG_SYS_I2C_ROCKCHIP=y
49CONFIG_MISC=y
50CONFIG_SUPPORT_EMMC_RPMB=y
51CONFIG_MMC_DW=y
52CONFIG_MMC_DW_ROCKCHIP=y
53CONFIG_MMC_SDHCI=y
54CONFIG_MMC_SDHCI_SDMA=y
55CONFIG_MMC_SDHCI_ROCKCHIP=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]56CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]57CONFIG_DM_PMIC=y
58CONFIG_DM_PMIC_FAN53555=y
59CONFIG_PMIC_RK8XX=y
60CONFIG_REGULATOR_PWM=y
61CONFIG_DM_REGULATOR_GPIO=y
62CONFIG_REGULATOR_RK8XX=y
63CONFIG_DM_REGULATOR_SCMI=y
64CONFIG_PWM_ROCKCHIP=y
65CONFIG_SPL_RAM=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]66# CONFIG_RAM_ROCKCHIP_DEBUG is not set
67CONFIG_DM_RNG=y
68CONFIG_RNG_ROCKCHIP=y
69# CONFIG_RNG_SMCCC_TRNG is not set
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]70CONFIG_BAUDRATE=1500000
71CONFIG_DEBUG_UART_SHIFT=2
72CONFIG_SYS_NS16550_MEM32=y
73CONFIG_SYSRESET=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]74CONFIG_VIDEO=y
75CONFIG_VIDEO_ROCKCHIP=y
76CONFIG_DISPLAY_ROCKCHIP_DW_MIPI=y
77CONFIG_VIDEO_BRIDGE=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]78CONFIG_REGEX=y
79CONFIG_ERRNO_STR=y
80# CONFIG_EFI_LOADER is not set