blob: df065ba017aeaec826046c04441adb2020d6d148 [file] [log] [blame]
Matthias Fuchs2108cd32008-01-17 10:52:30 +01001/*
2 * (C) Copyright 2008
3 * Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Matthias Fuchs2108cd32008-01-17 10:52:30 +01006 */
7
8#define SDR0_USB0 0x0320 /* USB Control Register */
9
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020010#define CONFIG_SYS_GPIO0_EP_EEP (0x80000000 >> 23) /* GPIO0_23 */
11#define CONFIG_SYS_GPIO1_DCF77 (0x80000000 >> (42-32)) /* GPIO1_42 */
Matthias Fuchs2108cd32008-01-17 10:52:30 +010012
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020013#define CONFIG_SYS_GPIO1_IORSTN (0x80000000 >> (55-32)) /* GPIO1_55 */
14#define CONFIG_SYS_GPIO1_IORST2N (0x80000000 >> (47-32)) /* GPIO1_47 */
Matthias Fuchs2108cd32008-01-17 10:52:30 +010015
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020016#define CONFIG_SYS_GPIO1_HWVER_MASK 0x000000f0 /* GPIO1_56-59 */
17#define CONFIG_SYS_GPIO1_HWVER_SHIFT 4
18#define CONFIG_SYS_GPIO1_LEDUSR1 0x00000008 /* GPIO1_60 */
19#define CONFIG_SYS_GPIO1_LEDUSR2 0x00000004 /* GPIO1_61 */
20#define CONFIG_SYS_GPIO1_LEDPOST 0x00000002 /* GPIO1_62 */
21#define CONFIG_SYS_GPIO1_LEDDU 0x00000001 /* GPIO1_63 */
Matthias Fuchs2108cd32008-01-17 10:52:30 +010022
23#define CPLD_VERSION_MASK 0x0f
24#define PWR_INT_FLAG 0x80
25#define PWR_RDY 0x10
26
27#define CPLD_IRQ (32+30)