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Bin Meng2229c4c2015-05-07 21:34:08 +08001/*
2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef _ARCH_QEMU_H_
8#define _ARCH_QEMU_H_
9
Bin Menga8b70a12015-05-24 00:12:33 +080010/* Programmable Attribute Map (PAM) Registers */
11#define I440FX_PAM 0x59
12#define Q35_PAM 0x90
13#define PAM_NUM 7
14#define PAM_RW 0x33
15
Bin Meng8f71dc82015-07-22 01:21:11 -070016/* X-Bus Chip Select Register */
17#define XBCS 0x4e
18#define APIC_EN (1 << 8)
19
Bin Meng19c77392015-05-25 22:36:26 +080020/* IDE Timing Register */
21#define IDE0_TIM 0x40
22#define IDE1_TIM 0x42
Bin Meng8f71dc82015-07-22 01:21:11 -070023#define IDE_DECODE_EN (1 << 15)
Bin Meng19c77392015-05-25 22:36:26 +080024
Bin Meng2229c4c2015-05-07 21:34:08 +080025/* I/O Ports */
26#define CMOS_ADDR_PORT 0x70
27#define CMOS_DATA_PORT 0x71
28
29#define LOW_RAM_ADDR 0x34
30#define HIGH_RAM_ADDR 0x35
31
32#endif /* _ARCH_QEMU_H_ */