Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Eric Nelson | 4c64479 | 2017-12-11 13:52:11 -0200 | [diff] [blame] | 2 | /* |
Eric Nelson | e6e37e3 | 2018-01-18 08:36:26 -0700 | [diff] [blame] | 3 | * Copyright (C) 2010-2018 Freescale Semiconductor, Inc. |
Eric Nelson | 4c64479 | 2017-12-11 13:52:11 -0200 | [diff] [blame] | 4 | * |
Eric Nelson | e6e37e3 | 2018-01-18 08:36:26 -0700 | [diff] [blame] | 5 | * Configuration settings for the virtual mx6memcal board. |
Eric Nelson | 4c64479 | 2017-12-11 13:52:11 -0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __CONFIG_H |
| 9 | #define __CONFIG_H |
| 10 | |
| 11 | /* SPL */ |
| 12 | |
| 13 | #include "mx6_common.h" |
| 14 | #include "imx6_spl.h" |
| 15 | |
Eric Nelson | 4c64479 | 2017-12-11 13:52:11 -0200 | [diff] [blame] | 16 | #ifdef CONFIG_SERIAL_CONSOLE_UART1 |
| 17 | #if defined(CONFIG_MX6SL) |
| 18 | #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR |
| 19 | #else |
| 20 | #define CONFIG_MXC_UART_BASE UART1_BASE |
| 21 | #endif |
| 22 | #elif defined(CONFIG_SERIAL_CONSOLE_UART2) |
| 23 | #define CONFIG_MXC_UART_BASE UART2_BASE |
| 24 | #else |
| 25 | #error please define serial console (CONFIG_SERIAL_CONSOLE_UARTx) |
| 26 | #endif |
Eric Nelson | 4c64479 | 2017-12-11 13:52:11 -0200 | [diff] [blame] | 27 | |
Eric Nelson | 4c64479 | 2017-12-11 13:52:11 -0200 | [diff] [blame] | 28 | /* Physical Memory Map */ |
Eric Nelson | 4c64479 | 2017-12-11 13:52:11 -0200 | [diff] [blame] | 29 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
| 30 | |
| 31 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| 32 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| 33 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| 34 | |
Eric Nelson | 2e366b2 | 2018-01-18 07:47:32 -0700 | [diff] [blame] | 35 | #define CONFIG_MXC_USB_PORTSC PORT_PTS_UTMI |
| 36 | |
Eric Nelson | 4c64479 | 2017-12-11 13:52:11 -0200 | [diff] [blame] | 37 | #endif /* __CONFIG_H */ |