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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
wdenkc4cbd342005-01-09 18:21:42 +00002/*
3 * Configuation settings for the Sentec Cobra Board.
4 *
5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
wdenkc4cbd342005-01-09 18:21:42 +00006 */
7
8/* ---
Bin Meng75574052016-02-05 19:30:11 -08009 * Version: U-Boot 1.0.0 - initial release for Sentec COBRA5272 board
wdenkc4cbd342005-01-09 18:21:42 +000010 * Date: 2004-03-29
11 * Author: Florian Schlote
12 *
13 * For a description of configuration options please refer also to the
14 * general u-boot-1.x.x/README file
15 * ---
16 */
17
18/* ---
19 * board/config.h - configuration options, board specific
20 * ---
21 */
22
23#ifndef _CONFIG_COBRA5272_H
24#define _CONFIG_COBRA5272_H
25
26/* ---
wdenkc4cbd342005-01-09 18:21:42 +000027 * Defines processor clock - important for correct timings concerning serial
28 * interface etc.
wdenkc4cbd342005-01-09 18:21:42 +000029 * ---
30 */
31
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020032#define CONFIG_SYS_CLK 66000000
33#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
wdenkc4cbd342005-01-09 18:21:42 +000034
wdenkc4cbd342005-01-09 18:21:42 +000035/* ---
36 * Define baudrate for UART1 (console output, tftp, ...)
37 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020038 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command
wdenkc4cbd342005-01-09 18:21:42 +000039 * interface
40 * ---
41 */
42
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020043#define CONFIG_SYS_UART_PORT (0)
wdenkc4cbd342005-01-09 18:21:42 +000044
45/* ---
46 * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
47 * timeout acc. to your needs
48 * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
49 * for 10 sec
50 * ---
51 */
52
53#if 0
wdenkc4cbd342005-01-09 18:21:42 +000054#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
55#endif
56
57/* ---
58 * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
59 * bootloader residing in flash ('chainloading'); if you want to use
60 * chainloading or want to compile a u-boot binary that can be loaded into
61 * RAM via BDM set
Wolfgang Denka1be4762008-05-20 16:00:29 +020062 * "#if 0" to "#if 1"
wdenkc4cbd342005-01-09 18:21:42 +000063 * You will need a first stage bootloader then, e. g. colilo or a working BDM
64 * cable (Background Debug Mode)
65 *
66 * Setting #if 0: u-boot will start from flash and relocate itself to RAM
67 *
Simon Glass72cc5382022-10-20 18:22:39 -060068 * Please do not forget to modify the setting of CONFIG_TEXT_BASE
wdenkc4cbd342005-01-09 18:21:42 +000069 * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
70 *
71 * ---
72 */
73
74#if 0
75#define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
76#endif
77
78/* ---
79 * Configuration for environment
80 * Environment is embedded in u-boot in the second sector of the flash
81 * ---
82 */
83
angelo@sysam.it6312a952015-03-29 22:54:16 +020084#define LDS_BOARD_TEXT \
Simon Glass547cb402017-08-03 12:21:49 -060085 . = DEFINED(env_offset) ? env_offset : .; \
86 env/embedded.o(.text);
Jon Loeliger37ec35e2007-07-04 22:31:56 -050087
wdenkc4cbd342005-01-09 18:21:42 +000088/*
89 *-----------------------------------------------------------------------------
90 * Define user parameters that have to be customized most likely
91 *-----------------------------------------------------------------------------
92 */
93
94/*AUTOBOOT settings - booting images automatically by u-boot after power on*/
95
wdenkc4cbd342005-01-09 18:21:42 +000096/* The following settings will be contained in the environment block ; if you
97want to use a neutral environment all those settings can be manually set in
98u-boot: 'set' command */
99
100#if 0
101
wdenkc4cbd342005-01-09 18:21:42 +0000102enter a valid image address in flash */
103
wdenkc4cbd342005-01-09 18:21:42 +0000104/* User network settings */
105
wdenkc4cbd342005-01-09 18:21:42 +0000106#define CONFIG_IPADDR 192.168.100.2 /* default board IP address */
107#define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */
108
109#endif
110
wdenkc4cbd342005-01-09 18:21:42 +0000111/*---*/
112
wdenkc4cbd342005-01-09 18:21:42 +0000113/*
114 *-----------------------------------------------------------------------------
115 * End of user parameters to be customized
116 *-----------------------------------------------------------------------------
117 */
118
119/* ---
120 * Defines memory range for test
121 * ---
122 */
123
wdenkc4cbd342005-01-09 18:21:42 +0000124/* ---
125 * Low Level Configuration Settings
126 * (address mappings, register initial values, etc.)
127 * You should know what you are doing if you make changes here.
128 * ---
129 */
130
131/* ---
132 * Base register address
133 * ---
134 */
135
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200136#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
wdenkc4cbd342005-01-09 18:21:42 +0000137
138/* ---
139 * System Conf. Reg. & System Protection Reg.
140 * ---
141 */
142
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200143#define CONFIG_SYS_SCR 0x0003
144#define CONFIG_SYS_SPR 0xffff
wdenkc4cbd342005-01-09 18:21:42 +0000145
wdenkc4cbd342005-01-09 18:21:42 +0000146/*-----------------------------------------------------------------------
147 * Definitions for initial stack pointer and data area (in internal SRAM)
148 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200149#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200150#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
wdenkc4cbd342005-01-09 18:21:42 +0000151
152/*-----------------------------------------------------------------------
153 * Start addresses for the final memory configuration
154 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200155 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
wdenkc4cbd342005-01-09 18:21:42 +0000156 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200157#define CONFIG_SYS_SDRAM_BASE 0x00000000
wdenkc4cbd342005-01-09 18:21:42 +0000158
159/*
160 *-------------------------------------------------------------------------
161 * RAM SIZE (is defined above)
162 *-----------------------------------------------------------------------
163 */
164
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200165/* #define CONFIG_SYS_SDRAM_SIZE 16 */
wdenkc4cbd342005-01-09 18:21:42 +0000166
167/*
168 *-----------------------------------------------------------------------
169 */
170
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200171#define CONFIG_SYS_FLASH_BASE 0xffe00000
wdenkc4cbd342005-01-09 18:21:42 +0000172
wdenkc4cbd342005-01-09 18:21:42 +0000173/*
174 * For booting Linux, the board info and command line data
175 * have to be in the first 8 MB of memory, since this is
176 * the maximum mapped by the Linux kernel during initialization ??
177 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200178#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenkc4cbd342005-01-09 18:21:42 +0000179
180/*-----------------------------------------------------------------------
wdenkc4cbd342005-01-09 18:21:42 +0000181 * Cache Configuration
182 */
wdenkc4cbd342005-01-09 18:21:42 +0000183
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600184#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200185 CONFIG_SYS_INIT_RAM_SIZE - 8)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600186#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200187 CONFIG_SYS_INIT_RAM_SIZE - 4)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600188#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
189#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
190 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
191 CF_ACR_EN | CF_ACR_SM_ALL)
192#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
193 CF_CACR_DISD | CF_CACR_INVI | \
194 CF_CACR_CEIB | CF_CACR_DCM | \
195 CF_CACR_EUSP)
196
wdenkc4cbd342005-01-09 18:21:42 +0000197/*-----------------------------------------------------------------------
wdenkc4cbd342005-01-09 18:21:42 +0000198 * LED config
199 */
200#define LED_STAT_0 0xffff /*all LEDs off*/
201#define LED_STAT_1 0xfffe
202#define LED_STAT_2 0xfffd
203#define LED_STAT_3 0xfffb
204#define LED_STAT_4 0xfff7
205#define LED_STAT_5 0xffef
206#define LED_STAT_6 0xffdf
207#define LED_STAT_7 0xff00 /*all LEDs on*/
208
209/*-----------------------------------------------------------------------
210 * Port configuration (GPIO)
211 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200212#define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external
wdenkc4cbd342005-01-09 18:21:42 +0000213GPIO*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200214#define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs
wdenkc4cbd342005-01-09 18:21:42 +0000215(1^=output, 0^=input) */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200216#define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */
217#define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART
wdenkc4cbd342005-01-09 18:21:42 +0000218configuration */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200219#define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */
220#define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */
221#define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */
wdenkc4cbd342005-01-09 18:21:42 +0000222
223#endif /* _CONFIG_COBRA5272_H */