| Eugen Hristev | 0de35aa | 2020-03-10 11:56:38 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Configuration file for the SAMA7G5EK Board. |
| 4 | * |
| 5 | * Copyright (C) 2020 Microchip Corporation |
| 6 | * Eugen Hristev <eugen.hristev@microchip.com> |
| 7 | */ |
| 8 | |
| 9 | #ifndef __CONFIG_H |
| 10 | #define __CONFIG_H |
| 11 | |
| 12 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 |
| 13 | #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ |
| Eugen Hristev | 6ed2a98 | 2021-04-29 14:58:21 +0300 | [diff] [blame] | 14 | #define CONFIG_SYS_BOOTM_LEN SZ_32M |
| Eugen Hristev | 0de35aa | 2020-03-10 11:56:38 +0200 | [diff] [blame] | 15 | /* SDRAM */ |
| 16 | #define CONFIG_SYS_SDRAM_BASE 0x60000000 |
| 17 | #define CONFIG_SYS_SDRAM_SIZE 0x20000000 |
| 18 | |
| 19 | #ifdef CONFIG_SPL_BUILD |
| 20 | #define CONFIG_SYS_INIT_SP_ADDR 0x218000 |
| 21 | #else |
| 22 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| Claudiu Beznea | 8d68daa | 2020-06-02 10:32:08 +0300 | [diff] [blame] | 23 | (CONFIG_SYS_SDRAM_BASE + 16 * 1024 + CONFIG_SYS_MALLOC_F_LEN - \ |
| 24 | GENERATED_GBL_DATA_SIZE) |
| Eugen Hristev | 0de35aa | 2020-03-10 11:56:38 +0200 | [diff] [blame] | 25 | #endif |
| 26 | |
| Claudiu Beznea | 074ec59 | 2020-06-09 13:58:21 +0300 | [diff] [blame] | 27 | #define CONFIG_ARP_TIMEOUT 200 |
| 28 | #define CONFIG_NET_RETRY_COUNT 50 |
| 29 | |
| Eugen Hristev | 0de35aa | 2020-03-10 11:56:38 +0200 | [diff] [blame] | 30 | #endif |