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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Ilya Yanoka3292f22012-11-06 13:48:29 +00002/*
3 * Copyright (C) 2005-2006 by Texas Instruments
Ilya Yanoka3292f22012-11-06 13:48:29 +00004 */
5
6#ifndef __MUSB_OMAP243X_H__
7#define __MUSB_OMAP243X_H__
8
9#ifndef __UBOOT__
10#include <plat/usb.h>
11#else
12#undef RESETDONE
13#endif
14
15/*
16 * OMAP2430-specific definitions
17 */
18
19#define OTG_REVISION 0x400
20
21#define OTG_SYSCONFIG 0x404
22# define MIDLEMODE 12 /* bit position */
23# define FORCESTDBY (0 << MIDLEMODE)
24# define NOSTDBY (1 << MIDLEMODE)
25# define SMARTSTDBY (2 << MIDLEMODE)
26
27# define SIDLEMODE 3 /* bit position */
28# define FORCEIDLE (0 << SIDLEMODE)
29# define NOIDLE (1 << SIDLEMODE)
30# define SMARTIDLE (2 << SIDLEMODE)
31
32# define ENABLEWAKEUP (1 << 2)
33# define SOFTRST (1 << 1)
34# define AUTOIDLE (1 << 0)
35
36#define OTG_SYSSTATUS 0x408
37# define RESETDONE (1 << 0)
38
39#define OTG_INTERFSEL 0x40c
40# define EXTCP (1 << 2)
41# define PHYSEL 0 /* bit position */
42# define UTMI_8BIT (0 << PHYSEL)
43# define ULPI_12PIN (1 << PHYSEL)
44# define ULPI_8PIN (2 << PHYSEL)
45
46#define OTG_SIMENABLE 0x410
47# define TM1 (1 << 0)
48
49#define OTG_FORCESTDBY 0x414
50# define ENABLEFORCE (1 << 0)
51
Paul Kocialkowskid5a43ba2016-02-27 19:19:05 +010052/*
53 * OMAP4-specific definitions
54 */
55
56#define USBOTGHS_CONTROL_AVALID (1 << 0)
57#define USBOTGHS_CONTROL_VBUSVALID (1 << 2)
58#define USBOTGHS_CONTROL_IDDIG (1 << 4)
59
Ilya Yanoka3292f22012-11-06 13:48:29 +000060#endif /* __MUSB_OMAP243X_H__ */