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git01.mediatek.com / filogic / uboot / 8edcefa9482cc0f74e97a92d5c1c62e7514864e1 / . / configs / stm32mp15-microgea-stm32mp1-microdev2_defconfig
blob: a601477d127b3e9f4d5a77e6393859107910badd [file] [log] [blame]
Jagan Teki6cd3dc92021-03-16 21:52:06 +0530[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_STM32MP=y
3CONFIG_SYS_MALLOC_F_LEN=0x3000
Jagan Teki6cd3dc92021-03-16 21:52:06 +0530[diff] [blame]4CONFIG_ENV_OFFSET=0x280000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]5CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0"
Jagan Teki6cd3dc92021-03-16 21:52:06 +0530[diff] [blame]6CONFIG_SPL_TEXT_BASE=0x2FFC2500
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]7CONFIG_SPL_MMC=y
Jagan Teki6cd3dc92021-03-16 21:52:06 +0530[diff] [blame]8CONFIG_SPL=y
9CONFIG_TARGET_MICROGEA_STM32MP1=y
10CONFIG_ENV_OFFSET_REDUND=0x2C0000
11# CONFIG_ARMV7_VIRT is not set
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]12CONFIG_SYS_LOAD_ADDR=0xc2000000
Tom Rini76fbc6f2022-04-01 10:33:18 -0400[diff] [blame]13CONFIG_SYS_MEMTEST_START=0xc0000000
14CONFIG_SYS_MEMTEST_END=0xc4000000
Jagan Teki6cd3dc92021-03-16 21:52:06 +0530[diff] [blame]15CONFIG_DISTRO_DEFAULTS=y
Tom Rini4ddbade2022-05-25 12:16:03 -0400[diff] [blame]16CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
17CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
Jagan Teki6cd3dc92021-03-16 21:52:06 +0530[diff] [blame]18CONFIG_FIT=y
19CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]20CONFIG_SPL_FOOTPRINT_LIMIT=y
21CONFIG_SPL_MAX_FOOTPRINT=0x3db00
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]22# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
23CONFIG_SPL_STACK=0x30000000
Tom Rini166e3222022-05-27 12:48:32 -0400[diff] [blame]24CONFIG_SYS_SPL_MALLOC=y
25CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
26CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0300000
27CONFIG_SYS_SPL_MALLOC_SIZE=0x1d00000
Jagan Teki6cd3dc92021-03-16 21:52:06 +0530[diff] [blame]28CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
29CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
30CONFIG_SPL_ENV_SUPPORT=y
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]31CONFIG_SPL_I2C=y
Simon Glasse91ac4c2021-07-10 21:14:24 -0600[diff] [blame]32CONFIG_SPL_POWER=y
Jagan Teki6cd3dc92021-03-16 21:52:06 +0530[diff] [blame]33CONFIG_SYS_PROMPT="STM32MP> "
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame]34CONFIG_SYS_PBSIZE=1050
Jagan Teki6cd3dc92021-03-16 21:52:06 +0530[diff] [blame]35CONFIG_CMD_ADTIMG=y
36CONFIG_CMD_ERASEENV=y
37CONFIG_CMD_MEMINFO=y
38CONFIG_CMD_MEMTEST=y
39CONFIG_CMD_ADC=y
40CONFIG_CMD_CLK=y
41CONFIG_CMD_FUSE=y
42CONFIG_CMD_GPIO=y
43CONFIG_CMD_I2C=y
44CONFIG_CMD_MMC=y
45CONFIG_CMD_REMOTEPROC=y
46CONFIG_CMD_CACHE=y
47CONFIG_CMD_TIME=y
48CONFIG_CMD_TIMER=y
49CONFIG_CMD_PMIC=y
50CONFIG_CMD_REGULATOR=y
51CONFIG_CMD_EXT4_WRITE=y
52# CONFIG_SPL_DOS_PARTITION is not set
53CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks"
54CONFIG_ENV_IS_NOWHERE=y
55CONFIG_ENV_IS_IN_MMC=y
56CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
57CONFIG_SYS_RELOC_GD_ENV_ADDR=y
58# CONFIG_SPL_ENV_IS_NOWHERE is not set
59CONFIG_DM_HWSPINLOCK=y
60CONFIG_HWSPINLOCK_STM32=y
61CONFIG_DM_I2C=y
62CONFIG_SYS_I2C_STM32F7=y
63CONFIG_LED=y
64CONFIG_LED_GPIO=y
Jagan Teki6cd3dc92021-03-16 21:52:06 +0530[diff] [blame]65CONFIG_STM32_FMC2_EBI=y
Jagan Teki6cd3dc92021-03-16 21:52:06 +0530[diff] [blame]66CONFIG_SUPPORT_EMMC_BOOT=y
67CONFIG_STM32_SDMMC2=y
68CONFIG_PHY_REALTEK=y
69CONFIG_DM_ETH=y
70CONFIG_DWC_ETH_QOS=y
71CONFIG_PHY=y
72CONFIG_PINCONF=y
73# CONFIG_SPL_PINCTRL_FULL is not set
74CONFIG_PINCTRL_STMFX=y
75CONFIG_DM_PMIC=y
76# CONFIG_SPL_PMIC_CHILDREN is not set
77CONFIG_PMIC_STPMIC1=y
78CONFIG_DM_REGULATOR=y
79CONFIG_DM_REGULATOR_FIXED=y
80CONFIG_DM_REGULATOR_GPIO=y
81CONFIG_REMOTEPROC_STM32_COPRO=y
82CONFIG_DM_RTC=y
83CONFIG_RTC_STM32=y
84CONFIG_SERIAL_RX_BUFFER=y
Patrick Delaunay196b7db2021-10-11 09:52:49 +0200[diff] [blame]85CONFIG_SYSRESET_SYSCON=y
Jagan Teki6cd3dc92021-03-16 21:52:06 +0530[diff] [blame]86CONFIG_WDT=y
87CONFIG_WDT_STM32MP=y
Patrick Delaunay1e2a9b72021-10-13 15:11:18 +0200[diff] [blame]88# CONFIG_BINMAN_FDT is not set
Jagan Teki6cd3dc92021-03-16 21:52:06 +0530[diff] [blame]89CONFIG_LZO=y
90CONFIG_ERRNO_STR=y