Marek Vasut | afcb01c | 2010-07-18 05:23:19 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Palm Tungsten|C configuration file |
| 3 | * |
| 4 | * Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
| 8 | * published by the Free Software Foundation; either version 2 of |
| 9 | * the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 19 | * MA 02111-1307 USA |
| 20 | */ |
| 21 | |
| 22 | #ifndef __CONFIG_H |
| 23 | #define __CONFIG_H |
| 24 | |
| 25 | #include <asm/arch/pxa-regs.h> |
| 26 | |
| 27 | /* |
| 28 | * High Level Board Configuration Options |
| 29 | */ |
Marek Vasut | 85cc88a | 2011-11-26 07:20:07 +0100 | [diff] [blame] | 30 | #define CONFIG_CPU_PXA25X 1 /* Intel PXA255 CPU */ |
Marek Vasut | afcb01c | 2010-07-18 05:23:19 +0200 | [diff] [blame] | 31 | #define CONFIG_PALMTC 1 /* Palm Tungsten|C board */ |
| 32 | |
Simon Glass | 1af03bd | 2012-10-30 13:38:53 +0000 | [diff] [blame] | 33 | /* we will never enable dcache, because we have to setup MMU first */ |
| 34 | #define CONFIG_SYS_DCACHE_OFF |
| 35 | |
Marek Vasut | afcb01c | 2010-07-18 05:23:19 +0200 | [diff] [blame] | 36 | /* |
| 37 | * Environment settings |
| 38 | */ |
| 39 | #define CONFIG_ENV_OVERWRITE |
| 40 | #define CONFIG_SYS_MALLOC_LEN (128*1024) |
Marek Vasut | 1ba68e8 | 2010-10-20 21:06:23 +0200 | [diff] [blame] | 41 | #define CONFIG_SYS_TEXT_BASE 0x0 |
Marek Vasut | afcb01c | 2010-07-18 05:23:19 +0200 | [diff] [blame] | 42 | |
| 43 | #define CONFIG_BOOTCOMMAND \ |
| 44 | "if mmc init && fatload mmc 0 0xa0000000 uboot.script ; then " \ |
| 45 | "source 0xa0000000; " \ |
| 46 | "else " \ |
| 47 | "bootm 0x80000; " \ |
| 48 | "fi; " |
| 49 | #define CONFIG_BOOTARGS \ |
| 50 | "console=tty0 console=ttyS0,115200" |
| 51 | #define CONFIG_TIMESTAMP |
| 52 | #define CONFIG_BOOTDELAY 2 /* Autoboot delay */ |
| 53 | #define CONFIG_CMDLINE_TAG |
| 54 | #define CONFIG_SETUP_MEMORY_TAGS |
| 55 | |
| 56 | #define CONFIG_LZMA /* LZMA compression support */ |
| 57 | |
| 58 | /* |
| 59 | * Serial Console Configuration |
| 60 | * STUART - the lower serial port on Colibri board |
| 61 | */ |
| 62 | #define CONFIG_PXA_SERIAL |
| 63 | #define CONFIG_FFUART 1 |
Marek Vasut | 0d4bef7 | 2012-09-12 12:36:25 +0200 | [diff] [blame] | 64 | #define CONFIG_CONS_INDEX 3 |
Marek Vasut | afcb01c | 2010-07-18 05:23:19 +0200 | [diff] [blame] | 65 | #define CONFIG_BAUDRATE 115200 |
Marek Vasut | afcb01c | 2010-07-18 05:23:19 +0200 | [diff] [blame] | 66 | |
| 67 | /* |
| 68 | * Bootloader Components Configuration |
| 69 | */ |
| 70 | #include <config_cmd_default.h> |
| 71 | |
| 72 | #undef CONFIG_CMD_NET |
Sebastien Carlier | a8d426f | 2010-11-05 15:48:07 +0100 | [diff] [blame] | 73 | #undef CONFIG_CMD_NFS |
Marek Vasut | afcb01c | 2010-07-18 05:23:19 +0200 | [diff] [blame] | 74 | #define CONFIG_CMD_ENV |
| 75 | #define CONFIG_CMD_MMC |
| 76 | #define CONFIG_LCD |
Jeroen Hofstee | c923758 | 2013-01-22 10:44:10 +0000 | [diff] [blame] | 77 | #define CONFIG_PXA_LCD |
Marek Vasut | afcb01c | 2010-07-18 05:23:19 +0200 | [diff] [blame] | 78 | |
| 79 | /* |
| 80 | * MMC Card Configuration |
| 81 | */ |
| 82 | #ifdef CONFIG_CMD_MMC |
| 83 | #define CONFIG_MMC |
Marek Vasut | d2f3bbd | 2012-09-30 10:09:49 +0000 | [diff] [blame] | 84 | #define CONFIG_GENERIC_MMC |
| 85 | #define CONFIG_PXA_MMC_GENERIC |
Marek Vasut | afcb01c | 2010-07-18 05:23:19 +0200 | [diff] [blame] | 86 | #define CONFIG_SYS_MMC_BASE 0xF0000000 |
| 87 | #define CONFIG_CMD_FAT |
| 88 | #define CONFIG_CMD_EXT2 |
| 89 | #define CONFIG_DOS_PARTITION |
| 90 | #endif |
| 91 | |
| 92 | /* |
| 93 | * LCD |
| 94 | */ |
| 95 | #ifdef CONFIG_LCD |
| 96 | #define CONFIG_ACX517AKN |
| 97 | #define CONFIG_VIDEO_LOGO |
| 98 | #define CONFIG_CMD_BMP |
| 99 | #define CONFIG_SPLASH_SCREEN |
| 100 | #define CONFIG_SPLASH_SCREEN_ALIGN |
| 101 | #define CONFIG_VIDEO_BMP_GZIP |
| 102 | #define CONFIG_VIDEO_BMP_RLE8 |
| 103 | #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) |
| 104 | #endif |
| 105 | |
| 106 | /* |
| 107 | * KGDB |
| 108 | */ |
| 109 | #ifdef CONFIG_CMD_KGDB |
| 110 | #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */ |
| 111 | #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ |
| 112 | #endif |
| 113 | |
| 114 | /* |
| 115 | * HUSH Shell Configuration |
| 116 | */ |
| 117 | #define CONFIG_SYS_HUSH_PARSER 1 |
Marek Vasut | afcb01c | 2010-07-18 05:23:19 +0200 | [diff] [blame] | 118 | |
| 119 | #define CONFIG_SYS_LONGHELP |
| 120 | #ifdef CONFIG_SYS_HUSH_PARSER |
| 121 | #define CONFIG_SYS_PROMPT "$ " |
| 122 | #else |
| 123 | #define CONFIG_SYS_PROMPT "=> " |
| 124 | #endif |
| 125 | #define CONFIG_SYS_CBSIZE 256 |
| 126 | #define CONFIG_SYS_PBSIZE \ |
| 127 | (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) |
| 128 | #define CONFIG_SYS_MAXARGS 16 |
| 129 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 130 | #define CONFIG_SYS_DEVICE_NULLDEV 1 |
| 131 | |
| 132 | /* |
| 133 | * Clock Configuration |
| 134 | */ |
| 135 | #undef CONFIG_SYS_CLKS_IN_HZ |
| 136 | #define CONFIG_SYS_HZ 3686400 /* Timer @ 3686400 Hz */ |
| 137 | #define CONFIG_SYS_CPUSPEED 0x161 /* 400MHz;L=1 M=3 T=1 */ |
| 138 | |
| 139 | /* |
Marek Vasut | afcb01c | 2010-07-18 05:23:19 +0200 | [diff] [blame] | 140 | * DRAM Map |
| 141 | */ |
| 142 | #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ |
| 143 | #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ |
| 144 | #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ |
| 145 | |
| 146 | #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ |
| 147 | #define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB DRAM */ |
| 148 | |
| 149 | #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ |
| 150 | #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ |
| 151 | |
| 152 | #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE |
| 153 | |
Marek Vasut | 62f66a5 | 2010-09-23 09:46:57 +0200 | [diff] [blame] | 154 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
Marek Vasut | 8a85f7d | 2011-11-26 12:04:11 +0100 | [diff] [blame] | 155 | #define CONFIG_SYS_INIT_SP_ADDR 0xfffff800 |
Marek Vasut | 62f66a5 | 2010-09-23 09:46:57 +0200 | [diff] [blame] | 156 | |
Marek Vasut | afcb01c | 2010-07-18 05:23:19 +0200 | [diff] [blame] | 157 | /* |
| 158 | * NOR FLASH |
| 159 | */ |
| 160 | #ifdef CONFIG_CMD_FLASH |
| 161 | #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ |
| 162 | #define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */ |
| 163 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
| 164 | |
| 165 | #define CONFIG_SYS_FLASH_CFI |
| 166 | #define CONFIG_FLASH_CFI_DRIVER 1 |
| 167 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT |
| 168 | |
| 169 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 170 | #define CONFIG_SYS_MAX_FLASH_SECT 64 |
| 171 | |
| 172 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 |
| 173 | |
| 174 | #define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) |
| 175 | #define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) |
| 176 | #define CONFIG_SYS_FLASH_LOCK_TOUT (2*CONFIG_SYS_HZ) |
| 177 | #define CONFIG_SYS_FLASH_UNLOCK_TOUT (2*CONFIG_SYS_HZ) |
| 178 | #define CONFIG_SYS_FLASH_PROTECTION |
| 179 | |
| 180 | #define CONFIG_ENV_IS_IN_FLASH 1 |
| 181 | #define CONFIG_ENV_SECT_SIZE 0x40000 |
| 182 | #else |
| 183 | #define CONFIG_SYS_NO_FLASH |
| 184 | #define CONFIG_ENV_IS_NOWHERE |
| 185 | #endif |
| 186 | |
| 187 | #define CONFIG_SYS_MONITOR_BASE 0x0 |
| 188 | #define CONFIG_SYS_MONITOR_LEN 0x40000 |
| 189 | |
| 190 | #define CONFIG_ENV_SIZE 0x4000 |
| 191 | #define CONFIG_ENV_ADDR 0x40000 |
| 192 | |
| 193 | /* |
| 194 | * GPIO settings |
| 195 | */ |
| 196 | #define CONFIG_SYS_GAFR0_L_VAL 0x00011004 |
| 197 | #define CONFIG_SYS_GAFR0_U_VAL 0xa5000008 |
| 198 | #define CONFIG_SYS_GAFR1_L_VAL 0x60888050 |
| 199 | #define CONFIG_SYS_GAFR1_U_VAL 0xaaa50aaa |
| 200 | #define CONFIG_SYS_GAFR2_L_VAL 0x0aaaaaaa |
| 201 | #define CONFIG_SYS_GAFR2_U_VAL 0x00000000 |
| 202 | #define CONFIG_SYS_GPCR0_VAL 0x0 |
| 203 | #define CONFIG_SYS_GPCR1_VAL 0x0 |
| 204 | #define CONFIG_SYS_GPCR2_VAL 0x0 |
| 205 | #define CONFIG_SYS_GPDR0_VAL 0xcfff8140 |
| 206 | #define CONFIG_SYS_GPDR1_VAL 0xfcbfbef3 |
| 207 | #define CONFIG_SYS_GPDR2_VAL 0x0001ffff |
| 208 | #define CONFIG_SYS_GPSR0_VAL 0x00010f8f |
| 209 | #define CONFIG_SYS_GPSR1_VAL 0x00bf5de5 |
| 210 | #define CONFIG_SYS_GPSR2_VAL 0x03fe0800 |
| 211 | |
| 212 | #define CONFIG_SYS_PSSR_VAL PSSR_RDH |
| 213 | |
| 214 | /* Clock setup: |
| 215 | * CKEN[1] - PWM1 ; CKEN[6] - FFUART |
| 216 | * CKEN[12] - MMC ; CKEN[16] - LCD |
| 217 | */ |
| 218 | #define CONFIG_SYS_CKEN 0x00011042 |
| 219 | #define CONFIG_SYS_CCCR 0x00000161 |
| 220 | |
| 221 | /* |
| 222 | * Memory settings |
| 223 | */ |
| 224 | #define CONFIG_SYS_MSC0_VAL 0x800092c2 |
| 225 | #define CONFIG_SYS_MSC1_VAL 0x80008000 |
| 226 | #define CONFIG_SYS_MSC2_VAL 0x80008000 |
| 227 | #define CONFIG_SYS_MDCNFG_VAL 0x00001ac9 |
| 228 | #define CONFIG_SYS_MDREFR_VAL 0x00118018 |
| 229 | #define CONFIG_SYS_MDMRS_VAL 0x00220032 |
| 230 | #define CONFIG_SYS_FLYCNFG_VAL 0x01fe01fe |
| 231 | #define CONFIG_SYS_SXCNFG_VAL 0x00000000 |
| 232 | |
| 233 | /* |
| 234 | * PCMCIA and CF Interfaces |
| 235 | */ |
| 236 | #define CONFIG_SYS_MECR_VAL 0x00000000 |
| 237 | #define CONFIG_SYS_MCMEM0_VAL 0x00010504 |
| 238 | #define CONFIG_SYS_MCMEM1_VAL 0x00010504 |
| 239 | #define CONFIG_SYS_MCATT0_VAL 0x00010504 |
| 240 | #define CONFIG_SYS_MCATT1_VAL 0x00010504 |
| 241 | #define CONFIG_SYS_MCIO0_VAL 0x00010e04 |
| 242 | #define CONFIG_SYS_MCIO1_VAL 0x00010e04 |
| 243 | |
| 244 | #endif /* __CONFIG_H */ |