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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Marek Vasut0b907502015-12-04 01:36:36 +01002/*
Marek Vasut4a7629a2015-12-04 02:55:37 +01003 * Designware DWC2 on-chip full/high speed USB device controllers
Marek Vasut0b907502015-12-04 01:36:36 +01004 * Copyright (C) 2005 for Samsung Electronics
Marek Vasut0b907502015-12-04 01:36:36 +01005 */
6
Marek Vasut4811c662015-12-04 02:32:22 +01007#ifndef __DWC2_UDC_OTG_PRIV__
8#define __DWC2_UDC_OTG_PRIV__
Marek Vasut0b907502015-12-04 01:36:36 +01009
Masahiro Yamada56a931c2016-09-21 11:28:55 +090010#include <linux/errno.h>
Marek Vasut0b907502015-12-04 01:36:36 +010011#include <linux/sizes.h>
12#include <linux/usb/ch9.h>
13#include <linux/usb/gadget.h>
14#include <linux/list.h>
15#include <usb/lin_gadget_compat.h>
Marek Vasutf1be9cb2015-12-04 02:51:20 +010016#include <usb/dwc2_udc.h>
Marek Vasut0b907502015-12-04 01:36:36 +010017
18/*-------------------------------------------------------------------------*/
19/* DMA bounce buffer size, 16K is enough even for mass storage */
20#define DMA_BUFFER_SIZE (16*SZ_1K)
21
22#define EP0_FIFO_SIZE 64
23#define EP_FIFO_SIZE 512
24#define EP_FIFO_SIZE2 1024
25/* ep0-control, ep1in-bulk, ep2out-bulk, ep3in-int */
Marek Vasutcb9c5d02015-12-04 02:44:33 +010026#define DWC2_MAX_ENDPOINTS 4
27#define DWC2_MAX_HW_ENDPOINTS 16
Marek Vasut0b907502015-12-04 01:36:36 +010028
29#define WAIT_FOR_SETUP 0
30#define DATA_STATE_XMIT 1
31#define DATA_STATE_NEED_ZLP 2
32#define WAIT_FOR_OUT_STATUS 3
33#define DATA_STATE_RECV 4
34#define WAIT_FOR_COMPLETE 5
35#define WAIT_FOR_OUT_COMPLETE 6
36#define WAIT_FOR_IN_COMPLETE 7
37#define WAIT_FOR_NULL_COMPLETE 8
38
39#define TEST_J_SEL 0x1
40#define TEST_K_SEL 0x2
41#define TEST_SE0_NAK_SEL 0x3
42#define TEST_PACKET_SEL 0x4
43#define TEST_FORCE_ENABLE_SEL 0x5
44
45/* ************************************************************************* */
46/* IO
47 */
48
49enum ep_type {
50 ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt
51};
52
Marek Vasut5b309f72015-12-04 01:48:57 +010053struct dwc2_ep {
Marek Vasut0b907502015-12-04 01:36:36 +010054 struct usb_ep ep;
55 struct dwc2_udc *dev;
56
57 const struct usb_endpoint_descriptor *desc;
58 struct list_head queue;
59 unsigned long pio_irqs;
60 int len;
61 void *dma_buf;
62
63 u8 stopped;
64 u8 bEndpointAddress;
65 u8 bmAttributes;
66
67 enum ep_type ep_type;
68 int fifo_num;
69};
70
Marek Vasut32f931c2015-12-04 01:51:07 +010071struct dwc2_request {
Marek Vasut0b907502015-12-04 01:36:36 +010072 struct usb_request req;
73 struct list_head queue;
74};
75
76struct dwc2_udc {
77 struct usb_gadget gadget;
78 struct usb_gadget_driver *driver;
79
Marek Vasut6939aca2015-12-04 02:23:29 +010080 struct dwc2_plat_otg_data *pdata;
Marek Vasut0b907502015-12-04 01:36:36 +010081
82 int ep0state;
Marek Vasutcb9c5d02015-12-04 02:44:33 +010083 struct dwc2_ep ep[DWC2_MAX_ENDPOINTS];
Marek Vasut0b907502015-12-04 01:36:36 +010084
85 unsigned char usb_address;
86
87 unsigned req_pending:1, req_std:1;
88};
89
Marek Vasut0b907502015-12-04 01:36:36 +010090#define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN) == USB_DIR_IN)
91#define ep_index(EP) ((EP)->bEndpointAddress&0xF)
92#define ep_maxpacket(EP) ((EP)->ep.maxpacket)
93
Marek Vasut6f1c6f52015-12-04 02:21:41 +010094void otg_phy_init(struct dwc2_udc *dev);
95void otg_phy_off(struct dwc2_udc *dev);
Marek Vasut0b907502015-12-04 01:36:36 +010096
Marek Vasut4811c662015-12-04 02:32:22 +010097#endif /* __DWC2_UDC_OTG_PRIV__ */