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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Heiko Schocher499c4982013-08-19 16:39:01 +02002/*
3 * board.h
4 *
5 * (C) Copyright 2013 Siemens Schweiz AG
6 * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de.
7 *
8 * Based on:
9 * TI AM335x boards information header
10 * u-boot:/board/ti/am335x/board.h
11 *
12 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
Heiko Schocher499c4982013-08-19 16:39:01 +020013 */
14
15#ifndef _BOARD_H_
16#define _BOARD_H_
17
Heiko Schocherd17c3fc2015-06-16 14:59:34 +020018#define PARGS(x) #x , /* Parameter Name */ \
19 settings.ddr3.x, /* EEPROM Value */ \
20 ddr3_default.x, /* Default Value */ \
21 settings.ddr3.x-ddr3_default.x /* Difference */
22
23#define PRINTARGS(y) printf("%-20s, %8x, %8x, %4d\n", PARGS(y))
24
Heiko Schocher499c4982013-08-19 16:39:01 +020025#define MAGIC_CHIP 0x50494843
26
27/* Automatic generated definition */
Egli, Samuelbc38fa42014-04-24 17:57:53 +020028/* Wed, 16 Apr 2014 16:50:41 +0200 */
29/* From file: draco/ddr3-data-universal-default@303MHz-i0-ES3.txt */
Heiko Schocher499c4982013-08-19 16:39:01 +020030struct ddr3_data {
31 unsigned int magic; /* 0x33524444 */
Egli, Samuelbc38fa42014-04-24 17:57:53 +020032 unsigned int version; /* 0x56312e35 */
33 unsigned short int ddr3_sratio; /* 0x0080 */
34 unsigned short int iclkout; /* 0x0000 */
Heiko Schocher499c4982013-08-19 16:39:01 +020035 unsigned short int dt0rdsratio0; /* 0x003A */
Egli, Samuelbc38fa42014-04-24 17:57:53 +020036 unsigned short int dt0wdsratio0; /* 0x003F */
37 unsigned short int dt0fwsratio0; /* 0x009F */
38 unsigned short int dt0wrsratio0; /* 0x0079 */
Heiko Schocher499c4982013-08-19 16:39:01 +020039 unsigned int sdram_tim1; /* 0x0888A39B */
40 unsigned int sdram_tim2; /* 0x26247FDA */
41 unsigned int sdram_tim3; /* 0x501F821F */
Samuel Egli8069bfe2013-11-04 14:05:03 +010042 unsigned int emif_ddr_phy_ctlr_1; /* 0x00100206 */
Egli, Samuelbc38fa42014-04-24 17:57:53 +020043 unsigned int sdram_config; /* 0x61A44A32 */
44 unsigned int ref_ctrl; /* 0x0000093B */
45 unsigned int ioctr_val; /* 0x0000014A */
46 char manu_name[32]; /* "default@303MHz \0" */
47 char manu_marking[32]; /* "default \0" */
Heiko Schocher499c4982013-08-19 16:39:01 +020048};
49
50struct chip_data {
51 unsigned int magic;
52 char sdevname[16];
53 char shwver[7];
54};
55
Egli, Samuel097951b2014-05-05 16:50:43 +020056struct draco_baseboard_id {
Heiko Schocher499c4982013-08-19 16:39:01 +020057 struct ddr3_data ddr3;
58 struct chip_data chip;
59};
60
61/*
62 * We have three pin mux functions that must exist. We must be able to enable
63 * uart0, for initial output and i2c0 to read the main EEPROM. We then have a
64 * main pinmux function that can be overridden to enable all other pinmux that
65 * is required on the board.
66 */
67void enable_uart0_pin_mux(void);
68void enable_uart1_pin_mux(void);
69void enable_uart2_pin_mux(void);
70void enable_uart3_pin_mux(void);
71void enable_uart4_pin_mux(void);
72void enable_uart5_pin_mux(void);
73void enable_i2c0_pin_mux(void);
74void enable_board_pin_mux(void);
Heiko Schocherd17c3fc2015-06-16 14:59:34 +020075
76/* Forwared declaration, defined in common board.c */
77void set_env_gpios(unsigned char state);
Heiko Schocher499c4982013-08-19 16:39:01 +020078#endif