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git01.mediatek.com / filogic / uboot / 8e738cef46bda204774004678a53beb14a79625b / . / arch / sandbox / dts / sandbox.dts
blob: 76147154c22366b7f70e5a95e83c8ea8ee3dfbe1 [file] [log] [blame]
Simon Glass66c164b2014-02-26 15:59:14 -0700[diff] [blame]1/dts-v1/;
2
3/ {
Simon Glassfd91fc92014-10-13 23:41:48 -0600[diff] [blame]4 #address-cells = <1>;
5 #size-cells = <0>;
6
Simon Glasscdbbfe32014-09-04 16:27:29 -0600[diff] [blame]7 chosen {
8 stdout-path = "/serial";
9 };
10
11 /* Needs to be available prior to relocation */
12 uart0: serial {
13 compatible = "sandbox,serial";
14 sandbox,text-colour = "cyan";
15 };
16
Simon Glass66c164b2014-02-26 15:59:14 -0700[diff] [blame]17 triangle {
18 compatible = "demo-shape";
19 colour = "cyan";
20 sides = <3>;
21 character = <83>;
22 };
23 square {
24 compatible = "demo-shape";
25 colour = "blue";
26 sides = <4>;
27 };
28 hexagon {
29 compatible = "demo-simple";
30 colour = "white";
31 sides = <6>;
32 };
Simon Glass1f6acb52014-02-27 13:25:59 -0700[diff] [blame]33
34 host@0 {
35 #address-cells = <1>;
36 #size-cells = <0>;
37 compatible = "sandbox,host-emulation";
38 cros-ec@0 {
39 reg = <0>;
40 compatible = "google,cros-ec";
41
42 /*
43 * This describes the flash memory within the EC. Note
44 * that the STM32L flash erases to 0, not 0xff.
45 */
46 #address-cells = <1>;
47 #size-cells = <1>;
48 flash@8000000 {
49 reg = <0x08000000 0x20000>;
50 erase-value = <0>;
51 #address-cells = <1>;
52 #size-cells = <1>;
53
54 /* Information for sandbox */
55 ro {
56 reg = <0 0xf000>;
57 };
58 wp-ro {
59 reg = <0xf000 0x1000>;
60 };
61 rw {
62 reg = <0x10000 0x10000>;
63 };
64 };
65 };
66 };
67
68 lcd {
69 compatible = "sandbox,lcd-sdl";
70 xres = <800>;
71 yres = <600>;
72 };
73
74 cros-ec-keyb {
75 compatible = "google,cros-ec-keyb";
76 google,key-rows = <8>;
77 google,key-columns = <13>;
78 google,repeat-delay-ms = <240>;
79 google,repeat-rate-ms = <30>;
80 google,ghost-filter;
81 /*
82 * Keymap entries take the form of 0xRRCCKKKK where
83 * RR=Row CC=Column KKKK=Key Code
84 * The values below are for a US keyboard layout and
85 * are taken from the Linux driver. Note that the
86 * 102ND key is not used for US keyboards.
87 */
88 linux,keymap = <
89 /* CAPSLCK F1 B F10 */
90 0x0001003a 0x0002003b 0x00030030 0x00040044
91 /* N = R_ALT ESC */
92 0x00060031 0x0008000d 0x000a0064 0x01010001
93 /* F4 G F7 H */
94 0x0102003e 0x01030022 0x01040041 0x01060023
95 /* ' F9 BKSPACE L_CTRL */
96 0x01080028 0x01090043 0x010b000e 0x0200001d
97 /* TAB F3 T F6 */
98 0x0201000f 0x0202003d 0x02030014 0x02040040
99 /* ] Y 102ND [ */
100 0x0205001b 0x02060015 0x02070056 0x0208001a
101 /* F8 GRAVE F2 5 */
102 0x02090042 0x03010029 0x0302003c 0x03030006
103 /* F5 6 - \ */
104 0x0304003f 0x03060007 0x0308000c 0x030b002b
105 /* R_CTRL A D F */
106 0x04000061 0x0401001e 0x04020020 0x04030021
107 /* S K J ; */
108 0x0404001f 0x04050025 0x04060024 0x04080027
109 /* L ENTER Z C */
110 0x04090026 0x040b001c 0x0501002c 0x0502002e
111 /* V X , M */
112 0x0503002f 0x0504002d 0x05050033 0x05060032
113 /* L_SHIFT / . SPACE */
114 0x0507002a 0x05080035 0x05090034 0x050B0039
115 /* 1 3 4 2 */
116 0x06010002 0x06020004 0x06030005 0x06040003
117 /* 8 7 0 9 */
118 0x06050009 0x06060008 0x0608000b 0x0609000a
119 /* L_ALT DOWN RIGHT Q */
120 0x060a0038 0x060b006c 0x060c006a 0x07010010
121 /* E R W I */
122 0x07020012 0x07030013 0x07040011 0x07050017
123 /* U R_SHIFT P O */
124 0x07060016 0x07070036 0x07080019 0x07090018
125 /* UP LEFT */
126 0x070b0067 0x070c0069>;
127 };
128
Simon Glass093f3a72014-08-11 09:24:03 -0600[diff] [blame]129 gpio_a: gpios {
130 gpio-controller;
131 compatible = "sandbox,gpio";
132 #gpio-cells = <1>;
133 gpio-bank-name = "a";
134 num-gpios = <20>;
135 };
136
Simon Glassfd91fc92014-10-13 23:41:48 -0600[diff] [blame]137 spi@0 {
138 #address-cells = <1>;
139 #size-cells = <0>;
140 reg = <0>;
141 compatible = "sandbox,spi";
142 cs-gpios = <0>, <&gpio_a 0>;
143 flash@0 {
144 reg = <0>;
145 compatible = "spansion,m25p16", "sandbox,spi-flash";
146 spi-max-frequency = <40000000>;
147 sandbox,filename = "spi.bin";
148 };
149 };
150
151 cros-ec@0 {
152 compatible = "google,cros-ec";
153 #address-cells = <1>;
154 #size-cells = <1>;
155 firmware_storage_spi: flash@0 {
156 reg = <0 0x400000>;
157 };
158 };
159
Simon Glass66c164b2014-02-26 15:59:14 -0700[diff] [blame]160};