blob: 19c35d34949d5107a1ab7d3fc63cd8d3e30e4d1b [file] [log] [blame]
Yusuke Godacf236022008-03-11 12:55:12 +09001/*
Nobuhiro Iwamatsud76619d2008-03-12 18:02:57 +09002 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Yusuke Godacf236022008-03-11 12:55:12 +09003 * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA
19 */
20
21#include <common.h>
22#include <ide.h>
23#include <asm/processor.h>
24#include <asm/io.h>
25#include <asm/pci.h>
26#include "r7780mp.h"
27
28int checkboard(void)
29{
30#if defined(CONFIG_R7780MP)
31 puts("BOARD: Renesas Solutions R7780MP\n");
32#else
33 puts("BOARD: Renesas Solutions R7780RP\n");
34#endif
35 return 0;
36}
37
38int board_init(void)
39{
40 /* SCIF Enable */
Nobuhiro Iwamatsu9aa0bd72008-06-17 16:27:41 +090041 writew(0x0, PHCR);
Yusuke Godacf236022008-03-11 12:55:12 +090042
Yusuke Godacf236022008-03-11 12:55:12 +090043 return 0;
44}
45
Nobuhiro Iwamatsu9aa0bd72008-06-17 16:27:41 +090046int dram_init(void)
Yusuke Godacf236022008-03-11 12:55:12 +090047{
48 DECLARE_GLOBAL_DATA_PTR;
49
50 gd->bd->bi_memstart = CFG_SDRAM_BASE;
51 gd->bd->bi_memsize = CFG_SDRAM_SIZE;
52 printf("DRAM: %dMB\n", CFG_SDRAM_SIZE / (1024 * 1024));
53 return 0;
54}
55
Nobuhiro Iwamatsu9aa0bd72008-06-17 16:27:41 +090056void led_set_state(unsigned short value)
Yusuke Godacf236022008-03-11 12:55:12 +090057{
58
59}
60
Nobuhiro Iwamatsu9aa0bd72008-06-17 16:27:41 +090061void ide_set_reset(int idereset)
Yusuke Godacf236022008-03-11 12:55:12 +090062{
63 /* if reset = 1 IDE reset will be asserted */
Nobuhiro Iwamatsu9aa0bd72008-06-17 16:27:41 +090064 if (idereset) {
65 writew(0x432, FPGA_CFCTL);
Yusuke Godacf236022008-03-11 12:55:12 +090066#if defined(CONFIG_R7780MP)
Nobuhiro Iwamatsu9aa0bd72008-06-17 16:27:41 +090067 writew(inw(FPGA_CFPOW)|0x01, FPGA_CFPOW);
Yusuke Godacf236022008-03-11 12:55:12 +090068#else
Nobuhiro Iwamatsu9aa0bd72008-06-17 16:27:41 +090069 writew(inw(FPGA_CFPOW)|0x02, FPGA_CFPOW);
Yusuke Godacf236022008-03-11 12:55:12 +090070#endif
Nobuhiro Iwamatsu9aa0bd72008-06-17 16:27:41 +090071 writew(0x01, FPGA_CFCDINTCLR);
Yusuke Godacf236022008-03-11 12:55:12 +090072 }
73}
74
Yusuke Godacf236022008-03-11 12:55:12 +090075static struct pci_controller hose;
76void pci_init_board(void)
77{
Nobuhiro Iwamatsu9aa0bd72008-06-17 16:27:41 +090078 pci_sh7780_init(&hose);
Yusuke Godacf236022008-03-11 12:55:12 +090079}