Alex | 89e50d9 | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 1 | source "drivers/net/phy/Kconfig" |
Calvin Johnson | 0e6101a | 2018-03-08 15:30:35 +0530 | [diff] [blame] | 2 | source "drivers/net/pfe_eth/Kconfig" |
Florinel Iordache | dfd4c0f | 2019-05-15 09:09:21 +0000 | [diff] [blame] | 3 | source "drivers/net/fsl-mc/Kconfig" |
Alex | 89e50d9 | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 4 | |
Joe Hershberger | c7eceaf | 2015-03-22 17:09:10 -0500 | [diff] [blame] | 5 | config DM_ETH |
| 6 | bool "Enable Driver Model for Ethernet drivers" |
| 7 | depends on DM |
| 8 | help |
| 9 | Enable driver model for Ethernet. |
| 10 | |
Joe Hershberger | 54214e6 | 2018-07-02 14:47:48 -0500 | [diff] [blame] | 11 | The eth_*() interface will be implemented by the UCLASS_ETH class |
| 12 | This is currently implemented in net/eth-uclass.c |
Joe Hershberger | c7eceaf | 2015-03-22 17:09:10 -0500 | [diff] [blame] | 13 | Look in include/net.h for details. |
Joe Hershberger | 6ab7699 | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 14 | |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 15 | config DM_MDIO |
| 16 | bool "Enable Driver Model for MDIO devices" |
| 17 | depends on DM_ETH && PHYLIB |
| 18 | help |
| 19 | Enable driver model for MDIO devices |
| 20 | |
| 21 | Adds UCLASS_MDIO DM class supporting MDIO buses that are probed as |
| 22 | stand-alone devices. Useful in particular for systems that support |
| 23 | DM_ETH and have a stand-alone MDIO hardware block shared by multiple |
| 24 | Ethernet interfaces. |
| 25 | This is currently implemented in net/mdio-uclass.c |
| 26 | Look in include/miiphy.h for details. |
| 27 | |
Alex Marginean | ab8c2a5 | 2019-07-12 10:13:50 +0300 | [diff] [blame] | 28 | config DM_MDIO_MUX |
| 29 | bool "Enable Driver Model for MDIO MUX devices" |
| 30 | depends on DM_MDIO |
| 31 | help |
| 32 | Enable driver model for MDIO MUX devices |
| 33 | |
| 34 | Adds UCLASS_MDIO_MUX DM class supporting MDIO MUXes. Useful for |
| 35 | systems that support DM_MDIO and integrate one or multiple muxes on |
| 36 | the MDIO bus. |
| 37 | This is currently implemented in net/mdio-mux-uclass.c |
| 38 | Look in include/miiphy.h for details. |
| 39 | |
Claudiu Manoil | c0566c2 | 2021-01-25 14:23:53 +0200 | [diff] [blame] | 40 | config DM_DSA |
| 41 | bool "Enable Driver Model for DSA switches" |
| 42 | depends on DM_ETH && DM_MDIO |
| 43 | depends on PHY_FIXED |
| 44 | help |
| 45 | Enable driver model for DSA switches |
| 46 | |
| 47 | Adds UCLASS_DSA class supporting switches that follow the Distributed |
| 48 | Switch Architecture (DSA). These switches rely on the presence of a |
| 49 | management switch port connected to an Ethernet controller capable of |
| 50 | receiving frames from the switch. This host Ethernet controller is |
| 51 | called the "master" Ethernet interface in DSA terminology. |
| 52 | This is currently implemented in net/dsa-uclass.c, refer to |
| 53 | include/net/dsa.h for API details. |
| 54 | |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 55 | config MDIO_SANDBOX |
| 56 | depends on DM_MDIO && SANDBOX |
| 57 | default y |
| 58 | bool "Sandbox: Mocked MDIO driver" |
| 59 | help |
| 60 | This driver implements dummy read/write/reset MDIO functions mimicking |
| 61 | a bus with a single PHY. |
| 62 | |
| 63 | This driver is used in for testing in test/dm/mdio.c |
| 64 | |
Alex Marginean | 0649be5 | 2019-07-12 10:13:53 +0300 | [diff] [blame] | 65 | config MDIO_MUX_SANDBOX |
| 66 | depends on DM_MDIO_MUX && MDIO_SANDBOX |
| 67 | default y |
| 68 | bool "Sandbox: Mocked MDIO-MUX driver" |
| 69 | help |
| 70 | This driver implements dummy select/deselect ops mimicking a MUX on |
| 71 | the MDIO bux. It uses mdio_sandbox driver as parent MDIO. |
| 72 | |
| 73 | This driver is used for testing in test/dm/mdio.c |
| 74 | |
Ye Li | cd5bb77 | 2020-05-03 22:41:14 +0800 | [diff] [blame] | 75 | config DM_ETH_PHY |
| 76 | bool "Enable Driver Model for Ethernet Generic PHY drivers" |
| 77 | depends on DM |
| 78 | help |
| 79 | Enable driver model for Ethernet Generic PHY . |
| 80 | |
Claudiu Manoil | d9eaa92 | 2021-03-14 20:14:57 +0800 | [diff] [blame] | 81 | config DSA_SANDBOX |
| 82 | depends on DM_DSA && SANDBOX |
| 83 | default y |
| 84 | bool "Sandbox: Mocked DSA driver" |
| 85 | help |
| 86 | This driver implements a dummy DSA switch connected to a dummy sandbox |
| 87 | Ethernet device used as DSA master, to test DSA class code, including |
| 88 | exported DSA API and datapath processing of Ethernet traffic. |
| 89 | |
Joe Hershberger | 6ab7699 | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 90 | menuconfig NETDEVICES |
| 91 | bool "Network device support" |
| 92 | depends on NET |
Joe Hershberger | 5a9d7f1 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 93 | default y if DM_ETH |
Joe Hershberger | 6ab7699 | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 94 | help |
| 95 | You must select Y to enable any network device support |
| 96 | Generally if you have any networking support this is a given |
| 97 | |
| 98 | If unsure, say Y |
| 99 | |
| 100 | if NETDEVICES |
| 101 | |
Philipp Tomsich | 00c3361 | 2017-03-26 18:50:23 +0200 | [diff] [blame] | 102 | config PHY_GIGE |
| 103 | bool "Enable GbE PHY status parsing and configuration" |
| 104 | help |
| 105 | Enables support for parsing the status output and for |
| 106 | configuring GbE PHYs (affects the inner workings of some |
| 107 | commands and miiphyutil.c). |
| 108 | |
Marek Vasut | 0a3d0e1 | 2016-05-24 23:29:09 +0200 | [diff] [blame] | 109 | config AG7XXX |
| 110 | bool "Atheros AG7xxx Ethernet MAC support" |
| 111 | depends on DM_ETH && ARCH_ATH79 |
| 112 | select PHYLIB |
| 113 | help |
| 114 | This driver supports the Atheros AG7xxx Ethernet MAC. This MAC is |
| 115 | present in the Atheros AR7xxx, AR9xxx and QCA9xxx MIPS chips. |
| 116 | |
| 117 | |
Thomas Chou | ec06dd8 | 2015-10-22 15:29:11 +0800 | [diff] [blame] | 118 | config ALTERA_TSE |
| 119 | bool "Altera Triple-Speed Ethernet MAC support" |
| 120 | depends on DM_ETH |
| 121 | select PHYLIB |
| 122 | help |
| 123 | This driver supports the Altera Triple-Speed (TSE) Ethernet MAC. |
| 124 | Please find details on the "Triple-Speed Ethernet MegaCore Function |
| 125 | Resource Center" of Altera. |
| 126 | |
Suji Velupillai | d2f677a | 2017-07-10 14:05:41 -0700 | [diff] [blame] | 127 | config BCM_SF2_ETH |
| 128 | bool "Broadcom SF2 (Starfighter2) Ethernet support" |
| 129 | select PHYLIB |
| 130 | help |
| 131 | This is an abstract framework which provides a generic interface |
| 132 | to MAC and DMA management for multiple Broadcom SoCs such as |
| 133 | Cygnus, NSP and bcm28155_ap platforms. |
| 134 | |
| 135 | config BCM_SF2_ETH_DEFAULT_PORT |
| 136 | int "Broadcom SF2 (Starfighter2) Ethernet default port number" |
| 137 | depends on BCM_SF2_ETH |
| 138 | default 0 |
| 139 | help |
| 140 | Default port number for the Starfighter2 ethernet driver. |
| 141 | |
| 142 | config BCM_SF2_ETH_GMAC |
| 143 | bool "Broadcom SF2 (Starfighter2) GMAC Ethernet support" |
| 144 | depends on BCM_SF2_ETH |
| 145 | help |
| 146 | This flag enables the ethernet support for Broadcom platforms with |
| 147 | GMAC such as Cygnus. This driver is based on the framework provided |
| 148 | by the BCM_SF2_ETH driver. |
| 149 | Say Y to any bcmcygnus based platforms. |
| 150 | |
Álvaro Fernández Rojas | 204fd5e | 2018-12-01 19:00:24 +0100 | [diff] [blame] | 151 | config BCM6348_ETH |
| 152 | bool "BCM6348 EMAC support" |
| 153 | depends on DM_ETH && ARCH_BMIPS |
| 154 | select DMA |
| 155 | select DMA_CHANNELS |
| 156 | select MII |
| 157 | select PHYLIB |
| 158 | help |
| 159 | This driver supports the BCM6348 Ethernet MAC. |
| 160 | |
Álvaro Fernández Rojas | b0b2254 | 2018-12-01 19:00:32 +0100 | [diff] [blame] | 161 | config BCM6368_ETH |
| 162 | bool "BCM6368 EMAC support" |
| 163 | depends on DM_ETH && ARCH_BMIPS |
| 164 | select DMA |
| 165 | select MII |
| 166 | help |
| 167 | This driver supports the BCM6368 Ethernet MAC. |
| 168 | |
Amit Singh Tomar | 8f656c5 | 2020-01-27 01:14:42 +0000 | [diff] [blame] | 169 | config BCMGENET |
| 170 | bool "BCMGENET V5 support" |
| 171 | depends on DM_ETH |
| 172 | select PHYLIB |
| 173 | help |
| 174 | This driver supports the BCMGENET Ethernet MAC. |
| 175 | |
Aaron Tseng | ebcdddd | 2021-01-14 13:34:11 -0800 | [diff] [blame] | 176 | config CORTINA_NI_ENET |
| 177 | bool "Cortina-Access Ethernet driver" |
| 178 | depends on DM_ETH && CORTINA_PLATFORM |
| 179 | help |
| 180 | This driver supports the Cortina-Access Ethernet MAC for |
| 181 | all supported CAxxxx SoCs. |
| 182 | |
Andre Przywara | 7352fb9 | 2021-04-12 01:04:52 +0100 | [diff] [blame] | 183 | config CALXEDA_XGMAC |
| 184 | bool "Calxeda XGMAC support" |
| 185 | depends on DM_ETH |
| 186 | help |
| 187 | This driver supports the XGMAC in Calxeda Highbank and Midway |
| 188 | machines. |
| 189 | |
Stephen Warren | 5070960 | 2016-10-21 14:46:47 -0600 | [diff] [blame] | 190 | config DWC_ETH_QOS |
| 191 | bool "Synopsys DWC Ethernet QOS device support" |
| 192 | depends on DM_ETH |
| 193 | select PHYLIB |
| 194 | help |
| 195 | This driver supports the Synopsys Designware Ethernet QOS (Quality |
| 196 | Of Service) IP block. The IP supports many options for bus type, |
Patrick Delaunay | 6808390 | 2020-06-08 11:27:19 +0200 | [diff] [blame] | 197 | clocking/reset structure, and feature list. |
| 198 | |
| 199 | config DWC_ETH_QOS_IMX |
| 200 | bool "Synopsys DWC Ethernet QOS device support for IMX" |
| 201 | depends on DWC_ETH_QOS |
| 202 | help |
| 203 | The Synopsys Designware Ethernet QOS IP block with the specific |
| 204 | configuration used in IMX soc. |
| 205 | |
| 206 | config DWC_ETH_QOS_STM32 |
| 207 | bool "Synopsys DWC Ethernet QOS device support for STM32" |
| 208 | depends on DWC_ETH_QOS |
Patrick Delaunay | d9dc80c | 2021-07-20 20:09:55 +0200 | [diff] [blame] | 209 | select DM_ETH_PHY |
Patrick Delaunay | 6808390 | 2020-06-08 11:27:19 +0200 | [diff] [blame] | 210 | default y if ARCH_STM32MP |
| 211 | help |
| 212 | The Synopsys Designware Ethernet QOS IP block with the specific |
| 213 | configuration used in STM32MP soc. |
| 214 | |
| 215 | config DWC_ETH_QOS_TEGRA186 |
| 216 | bool "Synopsys DWC Ethernet QOS device support for TEGRA186" |
| 217 | depends on DWC_ETH_QOS |
| 218 | default y if TEGRA186 |
| 219 | help |
| 220 | The Synopsys Designware Ethernet QOS IP block with specific |
| 221 | configuration used in NVIDIA's Tegra186 chip. |
Stephen Warren | 5070960 | 2016-10-21 14:46:47 -0600 | [diff] [blame] | 222 | |
Simon Glass | a83ccd5 | 2015-08-19 09:33:41 -0600 | [diff] [blame] | 223 | config E1000 |
| 224 | bool "Intel PRO/1000 Gigabit Ethernet support" |
Madalin Bucur | 5fd3ff7 | 2020-04-29 08:26:17 +0300 | [diff] [blame] | 225 | depends on (DM_ETH && DM_PCI) || !DM_ETH |
Simon Glass | a83ccd5 | 2015-08-19 09:33:41 -0600 | [diff] [blame] | 226 | help |
| 227 | This driver supports Intel(R) PRO/1000 gigabit ethernet family of |
| 228 | adapters. For more information on how to identify your adapter, go |
| 229 | to the Adapter & Driver ID Guide at: |
| 230 | |
| 231 | <http://support.intel.com/support/network/adapter/pro100/21397.htm> |
| 232 | |
| 233 | config E1000_SPI_GENERIC |
| 234 | bool "Allow access to the Intel 8257x SPI bus" |
| 235 | depends on E1000 |
| 236 | help |
| 237 | Allow generic access to the SPI bus on the Intel 8257x, for |
| 238 | example with the "sspi" command. |
| 239 | |
| 240 | config E1000_SPI |
| 241 | bool "Enable SPI bus utility code" |
| 242 | depends on E1000 |
| 243 | help |
| 244 | Utility code for direct access to the SPI bus on Intel 8257x. |
| 245 | This does not do anything useful unless you set at least one |
| 246 | of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC. |
| 247 | |
| 248 | config CMD_E1000 |
| 249 | bool "Enable the e1000 command" |
| 250 | depends on E1000 |
| 251 | help |
| 252 | This enables the 'e1000' management command for E1000 devices. When |
| 253 | used on devices with SPI support you can reprogram the EEPROM from |
| 254 | U-Boot. |
| 255 | |
Marek Vasut | 2dcaf85 | 2020-05-23 18:07:53 +0200 | [diff] [blame] | 256 | config EEPRO100 |
| 257 | bool "Intel PRO/100 82557/82559/82559ER Fast Ethernet support" |
| 258 | help |
| 259 | This driver supports Intel(R) PRO/100 82557/82559/82559ER fast |
| 260 | ethernet family of adapters. |
| 261 | |
Joe Hershberger | 6ab7699 | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 262 | config ETH_SANDBOX |
| 263 | depends on DM_ETH && SANDBOX |
| 264 | default y |
| 265 | bool "Sandbox: Mocked Ethernet driver" |
| 266 | help |
| 267 | This driver simply responds with fake ARP replies and ping |
| 268 | replies that are used to verify network stack functionality |
| 269 | |
| 270 | This driver is particularly useful in the test/dm/eth.c tests |
| 271 | |
Joe Hershberger | 586cbd1 | 2015-03-22 17:09:21 -0500 | [diff] [blame] | 272 | config ETH_SANDBOX_RAW |
| 273 | depends on DM_ETH && SANDBOX |
| 274 | default y |
| 275 | bool "Sandbox: Bridge to Linux Raw Sockets" |
| 276 | help |
| 277 | This driver is a bridge from the bottom of the network stack |
| 278 | in U-Boot to the RAW AF_PACKET API in Linux. This allows real |
| 279 | network traffic to be tested from within sandbox. See |
Keerthy | fa00255 | 2019-07-29 13:52:04 +0530 | [diff] [blame] | 280 | doc/arch/index.rst for more details. |
Joe Hershberger | 586cbd1 | 2015-03-22 17:09:21 -0500 | [diff] [blame] | 281 | |
Simon Glass | 6e37874 | 2015-04-05 16:07:34 -0600 | [diff] [blame] | 282 | config ETH_DESIGNWARE |
| 283 | bool "Synopsys Designware Ethernet MAC" |
Thomas Chou | 7a0dfa6 | 2015-12-07 20:53:29 +0800 | [diff] [blame] | 284 | select PHYLIB |
Simon Goldschmidt | ad58893 | 2019-01-13 19:58:41 +0100 | [diff] [blame] | 285 | imply ETH_DESIGNWARE_SOCFPGA if ARCH_SOCFPGA |
Simon Glass | 6e37874 | 2015-04-05 16:07:34 -0600 | [diff] [blame] | 286 | help |
| 287 | This MAC is present in SoCs from various vendors. It supports |
| 288 | 100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to |
| 289 | provide the PHY (physical media interface). |
| 290 | |
Neil Armstrong | 145aff7 | 2021-02-24 20:33:56 +0100 | [diff] [blame] | 291 | config ETH_DESIGNWARE_MESON8B |
| 292 | bool "Amlogic Meson8b and later glue driver for Synopsys Designware Ethernet MAC" |
| 293 | depends on DM_ETH |
| 294 | select ETH_DESIGNWARE |
| 295 | help |
| 296 | This provides glue layer to use Synopsys Designware Ethernet MAC |
| 297 | present on the Amlogic Meson8b, GX, AXG & G12A SoCs. |
| 298 | |
Marek Vasut | 0d9a4a0 | 2018-08-13 19:32:14 +0200 | [diff] [blame] | 299 | config ETH_DESIGNWARE_SOCFPGA |
Simon Goldschmidt | b50afc8 | 2019-01-13 19:58:40 +0100 | [diff] [blame] | 300 | select REGMAP |
| 301 | select SYSCON |
Marek Vasut | 0d9a4a0 | 2018-08-13 19:32:14 +0200 | [diff] [blame] | 302 | bool "Altera SoCFPGA extras for Synopsys Designware Ethernet MAC" |
| 303 | depends on DM_ETH && ETH_DESIGNWARE |
| 304 | help |
| 305 | The Altera SoCFPGA requires additional configuration of the |
| 306 | Altera system manager to correctly interface with the PHY. |
| 307 | This code handles those SoC specifics. |
| 308 | |
Amit Singh Tomar | 03d6edb | 2020-05-09 19:55:12 +0530 | [diff] [blame] | 309 | config ETH_DESIGNWARE_S700 |
| 310 | bool "Actins S700 glue driver for Synopsys Designware Ethernet MAC" |
| 311 | depends on DM_ETH && ETH_DESIGNWARE |
| 312 | help |
| 313 | This provides glue layer to use Synopsys Designware Ethernet MAC |
| 314 | present on Actions S700 SoC. |
| 315 | |
Max Filippov | e07d3d2 | 2016-08-05 18:26:15 +0300 | [diff] [blame] | 316 | config ETHOC |
| 317 | bool "OpenCores 10/100 Mbps Ethernet MAC" |
| 318 | help |
| 319 | This MAC is present in OpenRISC and Xtensa XTFPGA boards. |
| 320 | |
Peng Fan | a65e036 | 2018-03-28 20:54:14 +0800 | [diff] [blame] | 321 | config FEC_MXC_SHARE_MDIO |
| 322 | bool "Share the MDIO bus for FEC controller" |
| 323 | depends on FEC_MXC |
| 324 | |
| 325 | config FEC_MXC_MDIO_BASE |
| 326 | hex "MDIO base address for the FEC controller" |
| 327 | depends on FEC_MXC_SHARE_MDIO |
| 328 | help |
| 329 | This specifies the MDIO registers base address. It is used when |
| 330 | two FEC controllers share MDIO bus. |
| 331 | |
Jagan Teki | a48af85 | 2016-10-08 18:00:12 +0530 | [diff] [blame] | 332 | config FEC_MXC |
| 333 | bool "FEC Ethernet controller" |
Peng Fan | db29ff2 | 2021-08-07 16:00:42 +0800 | [diff] [blame] | 334 | depends on MX28 || MX5 || MX6 || MX7 || IMX8 || IMX8M || IMX8ULP || VF610 |
Jagan Teki | a48af85 | 2016-10-08 18:00:12 +0530 | [diff] [blame] | 335 | help |
| 336 | This driver supports the 10/100 Fast Ethernet controller for |
| 337 | NXP i.MX processors. |
| 338 | |
Tom Rini | fa911f8 | 2019-05-12 07:59:12 -0400 | [diff] [blame] | 339 | config FMAN_ENET |
| 340 | bool "Freescale FMan ethernet support" |
| 341 | depends on ARM || PPC |
| 342 | help |
| 343 | This driver support the Freescale FMan Ethernet controller |
| 344 | |
Tom Rini | c5ea8ed | 2017-05-26 11:18:53 -0400 | [diff] [blame] | 345 | config FTMAC100 |
| 346 | bool "Ftmac100 Ethernet Support" |
| 347 | help |
| 348 | This MAC is present in Andestech SoCs. |
| 349 | |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 350 | config FTGMAC100 |
| 351 | bool "Ftgmac100 Ethernet Support" |
| 352 | depends on DM_ETH |
| 353 | select PHYLIB |
| 354 | help |
| 355 | This driver supports the Faraday's FTGMAC100 Gigabit SoC |
| 356 | Ethernet controller that can be found on Aspeed SoCs (which |
| 357 | include NCSI). |
| 358 | |
| 359 | It is fully compliant with IEEE 802.3 specification for |
| 360 | 10/100 Mbps Ethernet and IEEE 802.3z specification for 1000 |
| 361 | Mbps Ethernet and includes Reduced Media Independent |
| 362 | Interface (RMII) and Reduced Gigabit Media Independent |
| 363 | Interface (RGMII) interfaces. It adopts an AHB bus interface |
| 364 | and integrates a link list DMA engine with direct M-Bus |
| 365 | accesses for transmitting and receiving packets. It has |
| 366 | independent TX/RX fifos, supports half and full duplex (1000 |
| 367 | Mbps mode only supports full duplex), flow control for full |
| 368 | duplex and backpressure for half duplex. |
| 369 | |
| 370 | The FTGMAC100 also implements IP, TCP, UDP checksum offloads |
| 371 | and supports IEEE 802.1Q VLAN tag insertion and removal. It |
| 372 | offers high-priority transmit queue for QoS and CoS |
| 373 | applications. |
| 374 | |
| 375 | |
Angelo Durgehello | a1d3d9f | 2019-11-15 23:54:17 +0100 | [diff] [blame] | 376 | config MCFFEC |
| 377 | bool "ColdFire Ethernet Support" |
| 378 | depends on DM_ETH |
| 379 | select PHYLIB |
| 380 | help |
| 381 | This driver supports the network interface units in the |
| 382 | ColdFire family. |
| 383 | |
| 384 | config FSLDMAFEC |
| 385 | bool "ColdFire DMA Ethernet Support" |
| 386 | depends on DM_ETH |
| 387 | select PHYLIB |
| 388 | help |
| 389 | This driver supports the network interface units in the |
| 390 | ColdFire family. |
| 391 | |
Marek Vasut | f462228 | 2020-03-25 19:08:59 +0100 | [diff] [blame] | 392 | config KS8851_MLL |
| 393 | bool "Microchip KS8851-MLL controller driver" |
| 394 | help |
| 395 | The Microchip KS8851 parallel bus external ethernet interface chip. |
| 396 | |
| 397 | if KS8851_MLL |
| 398 | if !DM_ETH |
| 399 | config KS8851_MLL_BASEADDR |
| 400 | hex "Microchip KS8851-MLL Base Address" |
| 401 | help |
| 402 | Define this to hold the physical address of the device (I/O space) |
| 403 | endif #DM_ETH |
| 404 | endif #KS8851_MLL |
| 405 | |
Tim Harvey | 06dea1e | 2021-06-30 16:50:08 -0700 | [diff] [blame] | 406 | config KSZ9477 |
| 407 | bool "Microchip KSZ9477 I2C controller driver" |
| 408 | depends on DM_DSA && DM_I2C |
| 409 | help |
| 410 | This driver implements a DSA switch driver for the KSZ9477 family |
| 411 | of GbE switches using the I2C interface. |
| 412 | |
Chris Packham | 943679d | 2018-05-03 23:00:35 +1200 | [diff] [blame] | 413 | config MVGBE |
| 414 | bool "Marvell Orion5x/Kirkwood network interface support" |
Trevor Woerner | bb7ab07 | 2020-05-06 08:02:40 -0400 | [diff] [blame] | 415 | depends on ARCH_KIRKWOOD || ARCH_ORION5X |
Chris Packham | 1de16f7 | 2018-07-09 21:34:00 +1200 | [diff] [blame] | 416 | select PHYLIB if DM_ETH |
Chris Packham | 943679d | 2018-05-03 23:00:35 +1200 | [diff] [blame] | 417 | help |
| 418 | This driver supports the network interface units in the |
| 419 | Marvell Orion5x and Kirkwood SoCs |
| 420 | |
Chris Packham | 919041c | 2017-08-21 20:17:03 +1200 | [diff] [blame] | 421 | config MVNETA |
Miquel Raynal | 59d42cd | 2017-12-28 15:43:09 +0100 | [diff] [blame] | 422 | bool "Marvell Armada XP/385/3700 network interface support" |
| 423 | depends on ARMADA_XP || ARMADA_38X || ARMADA_3700 |
Chris Packham | 919041c | 2017-08-21 20:17:03 +1200 | [diff] [blame] | 424 | select PHYLIB |
| 425 | help |
| 426 | This driver supports the network interface units in the |
Miquel Raynal | 59d42cd | 2017-12-28 15:43:09 +0100 | [diff] [blame] | 427 | Marvell ARMADA XP, ARMADA 38X and ARMADA 3700 SoCs |
Chris Packham | 919041c | 2017-08-21 20:17:03 +1200 | [diff] [blame] | 428 | |
Stefan Roese | 96c1904 | 2016-02-10 07:22:10 +0100 | [diff] [blame] | 429 | config MVPP2 |
Stefan Roese | 78a112b | 2017-02-15 11:42:59 +0100 | [diff] [blame] | 430 | bool "Marvell Armada 375/7K/8K network interface support" |
| 431 | depends on ARMADA_375 || ARMADA_8K |
Stefan Roese | 96c1904 | 2016-02-10 07:22:10 +0100 | [diff] [blame] | 432 | select PHYLIB |
Nevo Hed | 5da3884 | 2019-08-15 18:08:45 -0400 | [diff] [blame] | 433 | select MVMDIO |
| 434 | select DM_MDIO |
Stefan Roese | 96c1904 | 2016-02-10 07:22:10 +0100 | [diff] [blame] | 435 | help |
| 436 | This driver supports the network interface units in the |
Stefan Roese | 78a112b | 2017-02-15 11:42:59 +0100 | [diff] [blame] | 437 | Marvell ARMADA 375, 7K and 8K SoCs. |
Stefan Roese | 96c1904 | 2016-02-10 07:22:10 +0100 | [diff] [blame] | 438 | |
Wenyou Yang | e7183de | 2016-11-02 10:06:55 +0800 | [diff] [blame] | 439 | config MACB |
| 440 | bool "Cadence MACB/GEM Ethernet Interface" |
| 441 | depends on DM_ETH |
| 442 | select PHYLIB |
| 443 | help |
| 444 | The Cadence MACB ethernet interface is found on many Atmel |
| 445 | AT91 and SAMA5 parts. This driver also supports the Cadence |
| 446 | GEM (Gigabit Ethernet MAC) found in some ARM SoC devices. |
| 447 | Say Y to include support for the MACB/GEM chip. |
| 448 | |
Wilson Lee | 41d6d1e | 2017-08-22 20:25:07 -0700 | [diff] [blame] | 449 | config MACB_ZYNQ |
| 450 | bool "Cadence MACB/GEM Ethernet Interface for Xilinx Zynq" |
| 451 | depends on MACB |
| 452 | help |
| 453 | The Cadence MACB ethernet interface was used on Zynq platform. |
| 454 | Say Y to enable support for the MACB/GEM in Zynq chip. |
| 455 | |
developer | 7b4c8be | 2020-11-12 16:36:53 +0800 | [diff] [blame] | 456 | config MT7620_ETH |
| 457 | bool "MediaTek MT7620 Ethernet Interface" |
| 458 | depends on SOC_MT7620 |
| 459 | select PHYLIB |
| 460 | select DM_RESET |
| 461 | select DM_GPIO |
| 462 | select CLK |
| 463 | help |
| 464 | The MediaTek MT7620 ethernet interface is used on MT7620 based |
| 465 | boards. It has a built-in switch with two configurable ports which |
| 466 | can connect to external PHY/MACs. |
| 467 | |
Stefan Roese | f994768 | 2018-10-26 14:53:27 +0200 | [diff] [blame] | 468 | config MT7628_ETH |
| 469 | bool "MediaTek MT7628 Ethernet Interface" |
developer | 89f051b | 2019-04-30 11:13:58 +0800 | [diff] [blame] | 470 | depends on SOC_MT7628 |
developer | a564411 | 2019-09-25 17:45:33 +0800 | [diff] [blame] | 471 | select PHYLIB |
Stefan Roese | f994768 | 2018-10-26 14:53:27 +0200 | [diff] [blame] | 472 | help |
| 473 | The MediaTek MT7628 ethernet interface is used on MT7628 and |
| 474 | MT7688 based boards. |
| 475 | |
Suneel Garapati | 53dc448 | 2020-08-26 14:37:33 +0200 | [diff] [blame] | 476 | config NET_OCTEONTX |
| 477 | bool "OcteonTX Ethernet support" |
| 478 | depends on ARCH_OCTEONTX |
| 479 | depends on PCI_SRIOV |
| 480 | help |
| 481 | You must select Y to enable network device support for |
| 482 | OcteonTX SoCs. If unsure, say n |
Suneel Garapati | 8666ae8 | 2020-08-26 14:37:42 +0200 | [diff] [blame] | 483 | |
| 484 | config NET_OCTEONTX2 |
| 485 | bool "OcteonTX2 Ethernet support" |
| 486 | depends on ARCH_OCTEONTX2 |
| 487 | select OCTEONTX2_CGX_INTF |
| 488 | help |
| 489 | You must select Y to enable network device support for |
| 490 | OcteonTX2 SoCs. If unsure, say n |
| 491 | |
Suneel Garapati | 53dc448 | 2020-08-26 14:37:33 +0200 | [diff] [blame] | 492 | config OCTEONTX_SMI |
| 493 | bool "OcteonTX SMI Device support" |
| 494 | depends on ARCH_OCTEONTX || ARCH_OCTEONTX2 |
| 495 | help |
| 496 | You must select Y to enable SMI controller support for |
| 497 | OcteonTX or OcteonTX2 SoCs. If unsure, say n |
| 498 | |
Suneel Garapati | 8666ae8 | 2020-08-26 14:37:42 +0200 | [diff] [blame] | 499 | config OCTEONTX2_CGX_INTF |
| 500 | bool "OcteonTX2 CGX ATF interface support" |
| 501 | depends on ARCH_OCTEONTX2 |
| 502 | default y if ARCH_OCTEONTX2 |
| 503 | help |
| 504 | You must select Y to enable CGX ATF interface support for |
| 505 | OcteonTX2 SoCs. If unsure, say n |
| 506 | |
Bin Meng | 64d3dca | 2015-08-27 22:25:58 -0700 | [diff] [blame] | 507 | config PCH_GBE |
| 508 | bool "Intel Platform Controller Hub EG20T GMAC driver" |
| 509 | depends on DM_ETH && DM_PCI |
| 510 | select PHYLIB |
| 511 | help |
| 512 | This MAC is present in Intel Platform Controller Hub EG20T. It |
| 513 | supports 10/100/1000 Mbps operation. |
| 514 | |
Mylène Josserand | e44eb3a | 2017-04-02 12:59:08 +0200 | [diff] [blame] | 515 | config RGMII |
| 516 | bool "Enable RGMII" |
| 517 | help |
| 518 | Enable the support of the Reduced Gigabit Media-Independent |
| 519 | Interface (RGMII). |
| 520 | |
Adam Ford | 5370547 | 2018-07-20 23:03:57 -0500 | [diff] [blame] | 521 | config MII |
| 522 | bool "Enable MII" |
| 523 | help |
| 524 | Enable support of the Media-Independent Interface (MII) |
| 525 | |
Marek Vasut | 7275b62 | 2020-05-17 18:14:17 +0200 | [diff] [blame] | 526 | config PCNET |
| 527 | bool "AMD PCnet series Ethernet controller driver" |
| 528 | help |
| 529 | This driver supports AMD PCnet series fast ethernet family of |
| 530 | PCI chipsets/adapters. |
| 531 | |
Heiko Schocher | 41b64a8 | 2020-02-06 09:48:16 +0100 | [diff] [blame] | 532 | source "drivers/net/qe/Kconfig" |
| 533 | |
Bin Meng | a6448df | 2016-03-21 06:47:41 -0700 | [diff] [blame] | 534 | config RTL8139 |
| 535 | bool "Realtek 8139 series Ethernet controller driver" |
| 536 | help |
| 537 | This driver supports Realtek 8139 series fast ethernet family of |
| 538 | PCI chipsets/adapters. |
| 539 | |
Bin Meng | 2997122 | 2016-03-21 06:47:42 -0700 | [diff] [blame] | 540 | config RTL8169 |
| 541 | bool "Realtek 8169 series Ethernet controller driver" |
| 542 | help |
| 543 | This driver supports Realtek 8169 series gigabit ethernet family of |
| 544 | PCI/PCIe chipsets/adapters. |
| 545 | |
Adam Ford | 0a044f8 | 2017-09-05 15:20:44 -0500 | [diff] [blame] | 546 | config SMC911X |
| 547 | bool "SMSC LAN911x and LAN921x controller driver" |
| 548 | |
| 549 | if SMC911X |
| 550 | |
Marek Vasut | 5539944 | 2020-03-15 17:39:01 +0100 | [diff] [blame] | 551 | if !DM_ETH |
Adam Ford | 0a044f8 | 2017-09-05 15:20:44 -0500 | [diff] [blame] | 552 | config SMC911X_BASE |
| 553 | hex "SMC911X Base Address" |
| 554 | help |
| 555 | Define this to hold the physical address |
| 556 | of the device (I/O space) |
Marek Vasut | 5539944 | 2020-03-15 17:39:01 +0100 | [diff] [blame] | 557 | endif #DM_ETH |
Adam Ford | 0a044f8 | 2017-09-05 15:20:44 -0500 | [diff] [blame] | 558 | |
Adam Ford | 0a044f8 | 2017-09-05 15:20:44 -0500 | [diff] [blame] | 559 | config SMC911X_32_BIT |
Andre Przywara | 30301e5 | 2021-06-28 14:30:30 +0100 | [diff] [blame] | 560 | bool "Enable SMC911X 32-bit interface" |
Adam Ford | 0a044f8 | 2017-09-05 15:20:44 -0500 | [diff] [blame] | 561 | help |
Andre Przywara | 30301e5 | 2021-06-28 14:30:30 +0100 | [diff] [blame] | 562 | Define this if data bus is 32 bits. If your processor use a |
| 563 | narrower 16 bit bus or cannot convert one 32 bit word to two 16 bit |
| 564 | words, leave this to "n". |
Adam Ford | 0a044f8 | 2017-09-05 15:20:44 -0500 | [diff] [blame] | 565 | |
Adam Ford | 0a044f8 | 2017-09-05 15:20:44 -0500 | [diff] [blame] | 566 | endif #SMC911X |
| 567 | |
Mylène Josserand | c1506ef | 2017-04-02 12:59:03 +0200 | [diff] [blame] | 568 | config SUN7I_GMAC |
| 569 | bool "Enable Allwinner GMAC Ethernet support" |
| 570 | help |
| 571 | Enable the support for Sun7i GMAC Ethernet controller |
| 572 | |
Stefan Mavrodiev | eaee858 | 2017-11-03 08:56:51 +0200 | [diff] [blame] | 573 | config SUN7I_GMAC_FORCE_TXERR |
| 574 | bool "Force PA17 as gmac function" |
| 575 | depends on SUN7I_GMAC |
| 576 | help |
| 577 | Some ethernet phys needs TXERR control. Since the GMAC |
| 578 | doesn't have such signal, setting PA17 as GMAC function |
| 579 | makes the pin output low, which enables data transmission. |
| 580 | |
Mylène Josserand | 43ef184 | 2017-04-02 12:59:07 +0200 | [diff] [blame] | 581 | config SUN4I_EMAC |
| 582 | bool "Allwinner Sun4i Ethernet MAC support" |
| 583 | depends on DM_ETH |
Artturi Alm | 8ed0917 | 2017-11-08 05:08:58 +0200 | [diff] [blame] | 584 | select PHYLIB |
Mylène Josserand | 43ef184 | 2017-04-02 12:59:07 +0200 | [diff] [blame] | 585 | help |
| 586 | This driver supports the Allwinner based SUN4I Ethernet MAC. |
| 587 | |
Amit Singh Tomar | d194c0e | 2016-07-06 17:59:44 +0530 | [diff] [blame] | 588 | config SUN8I_EMAC |
| 589 | bool "Allwinner Sun8i Ethernet MAC support" |
| 590 | depends on DM_ETH |
| 591 | select PHYLIB |
Philipp Tomsich | 00c3361 | 2017-03-26 18:50:23 +0200 | [diff] [blame] | 592 | select PHY_GIGE |
Amit Singh Tomar | d194c0e | 2016-07-06 17:59:44 +0530 | [diff] [blame] | 593 | help |
| 594 | This driver supports the Allwinner based SUN8I/SUN50I Ethernet MAC. |
| 595 | It can be found in H3/A64/A83T based SoCs and compatible with both |
Tom Rini | 1eee117 | 2017-02-20 09:38:03 -0500 | [diff] [blame] | 596 | External and Internal PHYs. |
Amit Singh Tomar | d194c0e | 2016-07-06 17:59:44 +0530 | [diff] [blame] | 597 | |
Nobuhiro Iwamatsu | f593ecb | 2017-12-01 16:08:03 +0900 | [diff] [blame] | 598 | config SH_ETHER |
| 599 | bool "Renesas SH Ethernet MAC" |
| 600 | select PHYLIB |
| 601 | help |
| 602 | This driver supports the Ethernet for Renesas SH and ARM SoCs. |
| 603 | |
Grygorii Strashko | 5693dee | 2018-10-31 16:21:39 -0500 | [diff] [blame] | 604 | source "drivers/net/ti/Kconfig" |
Adam Ford | 5370547 | 2018-07-20 23:03:57 -0500 | [diff] [blame] | 605 | |
Marek Vasut | 880287c | 2020-06-20 17:43:29 +0200 | [diff] [blame] | 606 | config TULIP |
| 607 | bool "DEC Tulip DC2114x Ethernet support" |
| 608 | depends on (DM_ETH && DM_PCI) || !DM_ETH |
| 609 | help |
| 610 | This driver supports DEC DC2114x Fast ethernet chips. |
| 611 | |
Michal Simek | 07d204f | 2015-12-09 16:54:42 +0100 | [diff] [blame] | 612 | config XILINX_AXIEMAC |
Michal Simek | c28665d | 2020-08-06 15:18:36 +0200 | [diff] [blame] | 613 | depends on DM_ETH |
Michal Simek | 07d204f | 2015-12-09 16:54:42 +0100 | [diff] [blame] | 614 | select PHYLIB |
| 615 | select MII |
| 616 | bool "Xilinx AXI Ethernet" |
| 617 | help |
| 618 | This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. |
| 619 | |
Ashok Reddy Soma | 6f5480c | 2021-07-02 04:40:34 -0600 | [diff] [blame] | 620 | config XILINX_AXIMRMAC |
| 621 | depends on DM_ETH && ARCH_VERSAL |
| 622 | bool "Xilinx AXI MRMAC" |
| 623 | help |
| 624 | MRMAC is a high performance, low latency, adaptable Ethernet |
| 625 | integrated hard IP. This can be configured up to four ports with MAC |
| 626 | rates from 10GE to 100GE. This could be present in some of the Xilinx |
| 627 | Versal designs. |
| 628 | |
Michal Simek | eaee95a | 2015-12-11 09:41:49 +0100 | [diff] [blame] | 629 | config XILINX_EMACLITE |
Michal Simek | c28665d | 2020-08-06 15:18:36 +0200 | [diff] [blame] | 630 | depends on DM_ETH |
Michal Simek | eaee95a | 2015-12-11 09:41:49 +0100 | [diff] [blame] | 631 | select PHYLIB |
| 632 | select MII |
| 633 | bool "Xilinx Ethernetlite" |
| 634 | help |
| 635 | This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. |
| 636 | |
Michal Simek | 3d7285f | 2015-11-30 14:34:52 +0100 | [diff] [blame] | 637 | config ZYNQ_GEM |
Michal Simek | c28665d | 2020-08-06 15:18:36 +0200 | [diff] [blame] | 638 | depends on DM_ETH |
Michal Simek | 27ba090 | 2015-12-11 09:14:31 +0100 | [diff] [blame] | 639 | select PHYLIB |
Michal Simek | 3d7285f | 2015-11-30 14:34:52 +0100 | [diff] [blame] | 640 | bool "Xilinx Ethernet GEM" |
| 641 | help |
Michal Simek | 7fb1d23 | 2015-12-09 16:53:52 +0100 | [diff] [blame] | 642 | This MAC is present in Xilinx Zynq and ZynqMP SoCs. |
Michal Simek | 3d7285f | 2015-11-30 14:34:52 +0100 | [diff] [blame] | 643 | |
Purna Chandra Mandal | 6b731c9 | 2016-01-28 15:30:21 +0530 | [diff] [blame] | 644 | config PIC32_ETH |
| 645 | bool "Microchip PIC32 Ethernet Support" |
| 646 | depends on DM_ETH && MACH_PIC32 |
| 647 | select PHYLIB |
| 648 | help |
| 649 | This driver implements 10/100 Mbps Ethernet and MAC layer for |
| 650 | Microchip PIC32 microcontrollers. |
| 651 | |
Sjoerd Simons | 54c46f9 | 2017-01-11 11:46:11 +0100 | [diff] [blame] | 652 | config GMAC_ROCKCHIP |
| 653 | bool "Rockchip Synopsys Designware Ethernet MAC" |
| 654 | depends on DM_ETH && ETH_DESIGNWARE |
| 655 | help |
| 656 | This driver provides Rockchip SoCs network support based on the |
| 657 | Synopsys Designware driver. |
| 658 | |
Marek Vasut | 17714cb | 2017-05-13 15:54:28 +0200 | [diff] [blame] | 659 | config RENESAS_RAVB |
| 660 | bool "Renesas Ethernet AVB MAC" |
| 661 | depends on DM_ETH && RCAR_GEN3 |
| 662 | select PHYLIB |
| 663 | help |
| 664 | This driver implements support for the Ethernet AVB block in |
| 665 | Renesas M3 and H3 SoCs. |
| 666 | |
Christophe Leroy | 56ef30a | 2017-07-06 10:33:23 +0200 | [diff] [blame] | 667 | config MPC8XX_FEC |
| 668 | bool "Fast Ethernet Controller on MPC8XX" |
Christophe Leroy | b3510fb | 2018-03-16 17:20:41 +0100 | [diff] [blame] | 669 | depends on MPC8xx |
Christophe Leroy | 56ef30a | 2017-07-06 10:33:23 +0200 | [diff] [blame] | 670 | select MII |
| 671 | help |
| 672 | This driver implements support for the Fast Ethernet Controller |
| 673 | on MPC8XX |
| 674 | |
Kunihiko Hayashi | 7dcdc22 | 2018-05-24 19:24:37 +0900 | [diff] [blame] | 675 | config SNI_AVE |
| 676 | bool "Socionext AVE Ethernet support" |
| 677 | depends on DM_ETH && ARCH_UNIPHIER |
| 678 | select PHYLIB |
| 679 | select SYSCON |
| 680 | select REGMAP |
| 681 | help |
| 682 | This driver implements support for the Socionext AVE Ethernet |
| 683 | controller, as found on the Socionext UniPhier family. |
| 684 | |
Jassi Brar | 29c58b0 | 2021-06-04 18:44:38 +0900 | [diff] [blame] | 685 | config SNI_NETSEC |
| 686 | bool "Socionext NETSEC Ethernet support" |
| 687 | depends on DM_ETH && SYNQUACER_SPI |
| 688 | select PHYLIB |
| 689 | help |
| 690 | This driver implements support for the Socionext SynQuacer NETSEC |
| 691 | ethernet controller, as found on the Socionext SynQuacer family. |
| 692 | |
Horatiu Vultur | ad2bf65 | 2019-01-31 15:30:33 +0100 | [diff] [blame] | 693 | source "drivers/net/mscc_eswitch/Kconfig" |
Gregory CLEMENT | eca26c8 | 2019-01-17 17:07:13 +0100 | [diff] [blame] | 694 | |
Christophe Leroy | 56ef30a | 2017-07-06 10:33:23 +0200 | [diff] [blame] | 695 | config ETHER_ON_FEC1 |
| 696 | bool "FEC1" |
| 697 | depends on MPC8XX_FEC |
| 698 | default y |
| 699 | |
| 700 | config FEC1_PHY |
| 701 | int "FEC1 PHY" |
| 702 | depends on ETHER_ON_FEC1 |
| 703 | default -1 |
| 704 | help |
| 705 | Define to the hardcoded PHY address which corresponds |
| 706 | to the given FEC; i. e. |
| 707 | #define CONFIG_FEC1_PHY 4 |
| 708 | means that the PHY with address 4 is connected to FEC1 |
| 709 | |
| 710 | When set to -1, means to probe for first available. |
| 711 | |
| 712 | config PHY_NORXERR |
| 713 | bool "PHY_NORXERR" |
| 714 | depends on ETHER_ON_FEC1 |
Christophe Leroy | 56ef30a | 2017-07-06 10:33:23 +0200 | [diff] [blame] | 715 | help |
| 716 | The PHY does not have a RXERR line (RMII only). |
| 717 | (so program the FEC to ignore it). |
| 718 | |
| 719 | config ETHER_ON_FEC2 |
| 720 | bool "FEC2" |
| 721 | depends on MPC8XX_FEC && MPC885 |
| 722 | default y |
| 723 | |
| 724 | config FEC2_PHY |
| 725 | int "FEC2 PHY" |
| 726 | depends on ETHER_ON_FEC2 |
| 727 | default -1 |
| 728 | help |
| 729 | Define to the hardcoded PHY address which corresponds |
| 730 | to the given FEC; i. e. |
| 731 | #define CONFIG_FEC1_PHY 4 |
| 732 | means that the PHY with address 4 is connected to FEC1 |
| 733 | |
| 734 | When set to -1, means to probe for first available. |
| 735 | |
| 736 | config FEC2_PHY_NORXERR |
| 737 | bool "PHY_NORXERR" |
| 738 | depends on ETHER_ON_FEC2 |
Christophe Leroy | 56ef30a | 2017-07-06 10:33:23 +0200 | [diff] [blame] | 739 | help |
| 740 | The PHY does not have a RXERR line (RMII only). |
| 741 | (so program the FEC to ignore it). |
| 742 | |
Ahmed Mansour | 816bc41 | 2017-12-15 16:01:01 -0500 | [diff] [blame] | 743 | config SYS_DPAA_QBMAN |
| 744 | bool "Device tree fixup for QBMan on freescale SOCs" |
| 745 | depends on (ARM || PPC) && !SPL_BUILD |
| 746 | default y if ARCH_B4860 || \ |
| 747 | ARCH_B4420 || \ |
| 748 | ARCH_P1023 || \ |
| 749 | ARCH_P2041 || \ |
Ahmed Mansour | 816bc41 | 2017-12-15 16:01:01 -0500 | [diff] [blame] | 750 | ARCH_T1024 || \ |
| 751 | ARCH_T1040 || \ |
| 752 | ARCH_T1042 || \ |
| 753 | ARCH_T2080 || \ |
Ahmed Mansour | 816bc41 | 2017-12-15 16:01:01 -0500 | [diff] [blame] | 754 | ARCH_T4240 || \ |
Ahmed Mansour | 816bc41 | 2017-12-15 16:01:01 -0500 | [diff] [blame] | 755 | ARCH_P4080 || \ |
| 756 | ARCH_P3041 || \ |
| 757 | ARCH_P5040 || \ |
Ahmed Mansour | 816bc41 | 2017-12-15 16:01:01 -0500 | [diff] [blame] | 758 | ARCH_LS1043A || \ |
| 759 | ARCH_LS1046A |
| 760 | help |
| 761 | QBman fixups to allow deep sleep in DPAA 1 SOCs |
| 762 | |
Mario Six | da4fc93 | 2018-03-28 14:38:18 +0200 | [diff] [blame] | 763 | config TSEC_ENET |
| 764 | select PHYLIB |
| 765 | bool "Enable Three-Speed Ethernet Controller" |
| 766 | help |
| 767 | This driver implements support for the (Enhanced) Three-Speed |
| 768 | Ethernet Controller found on Freescale SoCs. |
| 769 | |
developer | c3ac93d | 2018-12-20 16:12:53 +0800 | [diff] [blame] | 770 | config MEDIATEK_ETH |
| 771 | bool "MediaTek Ethernet GMAC Driver" |
| 772 | depends on DM_ETH |
| 773 | select PHYLIB |
| 774 | select DM_GPIO |
| 775 | select DM_RESET |
| 776 | help |
| 777 | This Driver support MediaTek Ethernet GMAC |
| 778 | Say Y to enable support for the MediaTek Ethernet GMAC. |
| 779 | |
Shawn Guo | 0e1cc91 | 2019-03-20 15:32:40 +0800 | [diff] [blame] | 780 | config HIGMACV300_ETH |
| 781 | bool "HiSilicon Gigabit Ethernet Controller" |
| 782 | depends on DM_ETH |
| 783 | select DM_RESET |
| 784 | select PHYLIB |
| 785 | help |
| 786 | This driver supports HIGMACV300 Ethernet controller found on |
| 787 | HiSilicon SoCs. |
| 788 | |
Alex Marginean | 7a910c1 | 2019-07-03 12:11:40 +0300 | [diff] [blame] | 789 | config FSL_ENETC |
| 790 | bool "NXP ENETC Ethernet controller" |
Alex Marginean | 0215539 | 2019-07-03 12:11:41 +0300 | [diff] [blame] | 791 | depends on DM_PCI && DM_ETH && DM_MDIO |
Alex Marginean | 7a910c1 | 2019-07-03 12:11:40 +0300 | [diff] [blame] | 792 | help |
| 793 | This driver supports the NXP ENETC Ethernet controller found on some |
| 794 | of the NXP SoCs. |
| 795 | |
Alex Marginean | 3234a5e | 2019-07-16 11:21:17 +0300 | [diff] [blame] | 796 | config MDIO_MUX_I2CREG |
| 797 | bool "MDIO MUX accessed as a register over I2C" |
| 798 | depends on DM_MDIO_MUX && DM_I2C |
| 799 | help |
| 800 | This driver is used for MDIO muxes driven by writing to a register of |
| 801 | an I2C chip. The board it was developed for uses a mux controlled by |
| 802 | on-board FPGA which in turn is accessed as a chip over I2C. |
| 803 | |
Robert Marko | 90dfaeb | 2020-10-08 22:05:11 +0200 | [diff] [blame] | 804 | config MDIO_IPQ4019 |
| 805 | bool "Qualcomm IPQ4019 MDIO interface support" |
| 806 | depends on DM_MDIO |
| 807 | help |
| 808 | This driver supports the MDIO interface found in Qualcomm |
| 809 | IPQ40xx series Soc-s. |
| 810 | |
Alex Marginean | de3e55b | 2019-07-25 12:33:19 +0300 | [diff] [blame] | 811 | config MVMDIO |
| 812 | bool "Marvell MDIO interface support" |
| 813 | depends on DM_MDIO |
| 814 | help |
| 815 | This driver supports the MDIO interface found in the network |
| 816 | interface units of the Marvell EBU SoCs (Kirkwood, Orion5x, |
| 817 | Dove, Armada 370, Armada XP, Armada 37xx and Armada7K/8K/8KP). |
| 818 | |
| 819 | This driver is used by the MVPP2 and MVNETA drivers. |
| 820 | |
Ioana Ciornei | 799a443 | 2020-03-18 16:47:36 +0200 | [diff] [blame] | 821 | config FSL_LS_MDIO |
| 822 | bool "NXP Layerscape MDIO interface support" |
| 823 | depends on DM_MDIO |
| 824 | help |
| 825 | This driver supports the MDIO bus found on the Fman 10G Ethernet MACs and |
| 826 | on the mEMAC (which supports both Clauses 22 and 45). |
| 827 | |
Neil Armstrong | b66cbb3 | 2021-02-24 15:02:23 +0100 | [diff] [blame] | 828 | config MDIO_MUX_MMIOREG |
| 829 | bool "MDIO MUX accessed as a MMIO register access" |
| 830 | depends on DM_MDIO_MUX |
| 831 | help |
| 832 | This driver is used for MDIO muxes driven by writing to a register in |
| 833 | the MMIO physical memory. |
| 834 | |
Neil Armstrong | d0ddbb9 | 2021-02-24 17:31:53 +0100 | [diff] [blame] | 835 | config MDIO_MUX_MESON_G12A |
| 836 | bool "MDIO MUX for Amlogic Meson G12A SoCs" |
| 837 | depends on DM_MDIO_MUX |
| 838 | help |
| 839 | This driver is used for the MDIO mux found on the Amlogic G12A & compatible |
| 840 | SoCs. |
| 841 | |
Joe Hershberger | 6ab7699 | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 842 | endif # NETDEVICES |