Luis Araneda | c1c763d | 2018-07-24 11:31:19 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved. |
| 4 | * |
| 5 | * Procedure to generate this file (using Vivado Webpack 2018.2): |
| 6 | * + Install board files from digilent/vivado-boards repository |
| 7 | * (commit 6a45981 from 2018-06-05) |
| 8 | * + Start Vivado and create a new RTL project with the Zybo-z7-20 board |
| 9 | * + Create a block design |
| 10 | * - Add "ZYNQ7 Processing System" IP |
| 11 | * - Run "Block Automation" (Check "Apply Board Preset") |
| 12 | * - Connect ports FCLK_CLK0 and M_AXI_GP0_ACLK |
| 13 | * - Save diagram changes |
| 14 | * - Go to sources view, select the block diagram, |
| 15 | * and select "Generate Output Products" |
| 16 | * + Copy the generated "ps7_init_gpl.c" file |
| 17 | * + Perform manual editions based on existing Zynq boards |
| 18 | * and the checkpatch.pl script |
| 19 | * |
| 20 | */ |
| 21 | |
| 22 | #include <asm/arch/ps7_init_gpl.h> |
| 23 | |
| 24 | static unsigned long ps7_pll_init_data_3_0[] = { |
| 25 | EMIT_WRITE(0xF8000008, 0x0000DF0DU), |
| 26 | EMIT_MASKWRITE(0xF8000110, 0x003FFFF0U, 0x000FA220U), |
| 27 | EMIT_MASKWRITE(0xF8000100, 0x0007F000U, 0x00028000U), |
| 28 | EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000010U), |
| 29 | EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000001U), |
| 30 | EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000000U), |
| 31 | EMIT_MASKPOLL(0xF800010C, 0x00000001U), |
| 32 | EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000000U), |
| 33 | EMIT_MASKWRITE(0xF8000120, 0x1F003F30U, 0x1F000200U), |
| 34 | EMIT_MASKWRITE(0xF8000114, 0x003FFFF0U, 0x0012C220U), |
| 35 | EMIT_MASKWRITE(0xF8000104, 0x0007F000U, 0x00020000U), |
| 36 | EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000010U), |
| 37 | EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000001U), |
| 38 | EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000000U), |
| 39 | EMIT_MASKPOLL(0xF800010C, 0x00000002U), |
| 40 | EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000000U), |
| 41 | EMIT_MASKWRITE(0xF8000124, 0xFFF00003U, 0x0C200003U), |
| 42 | EMIT_MASKWRITE(0xF8000118, 0x003FFFF0U, 0x001452C0U), |
| 43 | EMIT_MASKWRITE(0xF8000108, 0x0007F000U, 0x0001E000U), |
| 44 | EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000010U), |
| 45 | EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000001U), |
| 46 | EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000000U), |
| 47 | EMIT_MASKPOLL(0xF800010C, 0x00000004U), |
| 48 | EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000000U), |
| 49 | EMIT_WRITE(0xF8000004, 0x0000767BU), |
| 50 | EMIT_EXIT(), |
| 51 | }; |
| 52 | |
| 53 | static unsigned long ps7_clock_init_data_3_0[] = { |
| 54 | EMIT_WRITE(0xF8000008, 0x0000DF0DU), |
| 55 | EMIT_MASKWRITE(0xF8000128, 0x03F03F01U, 0x00700F01U), |
| 56 | EMIT_MASKWRITE(0xF8000138, 0x00000011U, 0x00000001U), |
| 57 | EMIT_MASKWRITE(0xF8000140, 0x03F03F71U, 0x00100801U), |
| 58 | EMIT_MASKWRITE(0xF800014C, 0x00003F31U, 0x00000501U), |
| 59 | EMIT_MASKWRITE(0xF8000150, 0x00003F33U, 0x00001401U), |
| 60 | EMIT_MASKWRITE(0xF8000154, 0x00003F33U, 0x00000A02U), |
| 61 | EMIT_MASKWRITE(0xF8000168, 0x00003F31U, 0x00000501U), |
| 62 | EMIT_MASKWRITE(0xF8000170, 0x03F03F30U, 0x00400500U), |
| 63 | EMIT_MASKWRITE(0xF80001C4, 0x00000001U, 0x00000001U), |
| 64 | EMIT_MASKWRITE(0xF800012C, 0x01FFCCCDU, 0x01EC044DU), |
| 65 | EMIT_WRITE(0xF8000004, 0x0000767BU), |
| 66 | EMIT_EXIT(), |
| 67 | }; |
| 68 | |
| 69 | static unsigned long ps7_ddr_init_data_3_0[] = { |
| 70 | EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000080U), |
| 71 | EMIT_MASKWRITE(0xF8006004, 0x0007FFFFU, 0x00001081U), |
| 72 | EMIT_MASKWRITE(0xF8006008, 0x03FFFFFFU, 0x03C0780FU), |
| 73 | EMIT_MASKWRITE(0xF800600C, 0x03FFFFFFU, 0x02001001U), |
| 74 | EMIT_MASKWRITE(0xF8006010, 0x03FFFFFFU, 0x00014001U), |
| 75 | EMIT_MASKWRITE(0xF8006014, 0x001FFFFFU, 0x0004281AU), |
| 76 | EMIT_MASKWRITE(0xF8006018, 0xF7FFFFFFU, 0x44E458D2U), |
| 77 | EMIT_MASKWRITE(0xF800601C, 0xFFFFFFFFU, 0x720238E5U), |
| 78 | EMIT_MASKWRITE(0xF8006020, 0x7FDFFFFCU, 0x270872D0U), |
| 79 | EMIT_MASKWRITE(0xF8006024, 0x0FFFFFC3U, 0x00000000U), |
| 80 | EMIT_MASKWRITE(0xF8006028, 0x00003FFFU, 0x00002007U), |
| 81 | EMIT_MASKWRITE(0xF800602C, 0xFFFFFFFFU, 0x00000008U), |
| 82 | EMIT_MASKWRITE(0xF8006030, 0xFFFFFFFFU, 0x00040930U), |
| 83 | EMIT_MASKWRITE(0xF8006034, 0x13FF3FFFU, 0x000116D4U), |
| 84 | EMIT_MASKWRITE(0xF8006038, 0x00000003U, 0x00000000U), |
| 85 | EMIT_MASKWRITE(0xF800603C, 0x000FFFFFU, 0x00000777U), |
| 86 | EMIT_MASKWRITE(0xF8006040, 0xFFFFFFFFU, 0xFFF00000U), |
| 87 | EMIT_MASKWRITE(0xF8006044, 0x0FFFFFFFU, 0x0F666666U), |
| 88 | EMIT_MASKWRITE(0xF8006048, 0x0003F03FU, 0x0003C008U), |
| 89 | EMIT_MASKWRITE(0xF8006050, 0xFF0F8FFFU, 0x77010800U), |
| 90 | EMIT_MASKWRITE(0xF8006058, 0x00010000U, 0x00000000U), |
| 91 | EMIT_MASKWRITE(0xF800605C, 0x0000FFFFU, 0x00005003U), |
| 92 | EMIT_MASKWRITE(0xF8006060, 0x000017FFU, 0x0000003EU), |
| 93 | EMIT_MASKWRITE(0xF8006064, 0x00021FE0U, 0x00020000U), |
| 94 | EMIT_MASKWRITE(0xF8006068, 0x03FFFFFFU, 0x00284141U), |
| 95 | EMIT_MASKWRITE(0xF800606C, 0x0000FFFFU, 0x00001610U), |
| 96 | EMIT_MASKWRITE(0xF8006078, 0x03FFFFFFU, 0x00466111U), |
| 97 | EMIT_MASKWRITE(0xF800607C, 0x000FFFFFU, 0x00032222U), |
| 98 | EMIT_MASKWRITE(0xF80060A4, 0xFFFFFFFFU, 0x10200802U), |
| 99 | EMIT_MASKWRITE(0xF80060A8, 0x0FFFFFFFU, 0x0690CB73U), |
| 100 | EMIT_MASKWRITE(0xF80060AC, 0x000001FFU, 0x000001FEU), |
| 101 | EMIT_MASKWRITE(0xF80060B0, 0x1FFFFFFFU, 0x1CFFFFFFU), |
| 102 | EMIT_MASKWRITE(0xF80060B4, 0x00000200U, 0x00000200U), |
| 103 | EMIT_MASKWRITE(0xF80060B8, 0x01FFFFFFU, 0x00200066U), |
| 104 | EMIT_MASKWRITE(0xF80060C4, 0x00000003U, 0x00000000U), |
| 105 | EMIT_MASKWRITE(0xF80060C8, 0x000000FFU, 0x00000000U), |
| 106 | EMIT_MASKWRITE(0xF80060DC, 0x00000001U, 0x00000000U), |
| 107 | EMIT_MASKWRITE(0xF80060F0, 0x0000FFFFU, 0x00000000U), |
| 108 | EMIT_MASKWRITE(0xF80060F4, 0x0000000FU, 0x00000008U), |
| 109 | EMIT_MASKWRITE(0xF8006114, 0x000000FFU, 0x00000000U), |
| 110 | EMIT_MASKWRITE(0xF8006118, 0x7FFFFFCFU, 0x40000001U), |
| 111 | EMIT_MASKWRITE(0xF800611C, 0x7FFFFFCFU, 0x40000001U), |
| 112 | EMIT_MASKWRITE(0xF8006120, 0x7FFFFFCFU, 0x40000001U), |
| 113 | EMIT_MASKWRITE(0xF8006124, 0x7FFFFFCFU, 0x40000001U), |
| 114 | EMIT_MASKWRITE(0xF800612C, 0x000FFFFFU, 0x00027000U), |
| 115 | EMIT_MASKWRITE(0xF8006130, 0x000FFFFFU, 0x00027000U), |
| 116 | EMIT_MASKWRITE(0xF8006134, 0x000FFFFFU, 0x00026C00U), |
| 117 | EMIT_MASKWRITE(0xF8006138, 0x000FFFFFU, 0x00028800U), |
| 118 | EMIT_MASKWRITE(0xF8006140, 0x000FFFFFU, 0x00000035U), |
| 119 | EMIT_MASKWRITE(0xF8006144, 0x000FFFFFU, 0x00000035U), |
| 120 | EMIT_MASKWRITE(0xF8006148, 0x000FFFFFU, 0x00000035U), |
| 121 | EMIT_MASKWRITE(0xF800614C, 0x000FFFFFU, 0x00000035U), |
| 122 | EMIT_MASKWRITE(0xF8006154, 0x000FFFFFU, 0x0000007AU), |
| 123 | EMIT_MASKWRITE(0xF8006158, 0x000FFFFFU, 0x0000007AU), |
| 124 | EMIT_MASKWRITE(0xF800615C, 0x000FFFFFU, 0x0000007CU), |
| 125 | EMIT_MASKWRITE(0xF8006160, 0x000FFFFFU, 0x00000073U), |
| 126 | EMIT_MASKWRITE(0xF8006168, 0x001FFFFFU, 0x000000F1U), |
| 127 | EMIT_MASKWRITE(0xF800616C, 0x001FFFFFU, 0x000000F1U), |
| 128 | EMIT_MASKWRITE(0xF8006170, 0x001FFFFFU, 0x000000F0U), |
| 129 | EMIT_MASKWRITE(0xF8006174, 0x001FFFFFU, 0x000000F7U), |
| 130 | EMIT_MASKWRITE(0xF800617C, 0x000FFFFFU, 0x000000BAU), |
| 131 | EMIT_MASKWRITE(0xF8006180, 0x000FFFFFU, 0x000000BAU), |
| 132 | EMIT_MASKWRITE(0xF8006184, 0x000FFFFFU, 0x000000BCU), |
| 133 | EMIT_MASKWRITE(0xF8006188, 0x000FFFFFU, 0x000000B3U), |
| 134 | EMIT_MASKWRITE(0xF8006190, 0x6FFFFEFEU, 0x00040080U), |
| 135 | EMIT_MASKWRITE(0xF8006194, 0x000FFFFFU, 0x0001FC82U), |
| 136 | EMIT_MASKWRITE(0xF8006204, 0xFFFFFFFFU, 0x00000000U), |
| 137 | EMIT_MASKWRITE(0xF8006208, 0x000703FFU, 0x000003FFU), |
| 138 | EMIT_MASKWRITE(0xF800620C, 0x000703FFU, 0x000003FFU), |
| 139 | EMIT_MASKWRITE(0xF8006210, 0x000703FFU, 0x000003FFU), |
| 140 | EMIT_MASKWRITE(0xF8006214, 0x000703FFU, 0x000003FFU), |
| 141 | EMIT_MASKWRITE(0xF8006218, 0x000F03FFU, 0x000003FFU), |
| 142 | EMIT_MASKWRITE(0xF800621C, 0x000F03FFU, 0x000003FFU), |
| 143 | EMIT_MASKWRITE(0xF8006220, 0x000F03FFU, 0x000003FFU), |
| 144 | EMIT_MASKWRITE(0xF8006224, 0x000F03FFU, 0x000003FFU), |
| 145 | EMIT_MASKWRITE(0xF80062A8, 0x00000FF5U, 0x00000000U), |
| 146 | EMIT_MASKWRITE(0xF80062AC, 0xFFFFFFFFU, 0x00000000U), |
| 147 | EMIT_MASKWRITE(0xF80062B0, 0x003FFFFFU, 0x00005125U), |
| 148 | EMIT_MASKWRITE(0xF80062B4, 0x0003FFFFU, 0x000012A8U), |
| 149 | EMIT_MASKPOLL(0xF8000B74, 0x00002000U), |
| 150 | EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000081U), |
| 151 | EMIT_MASKPOLL(0xF8006054, 0x00000007U), |
| 152 | EMIT_EXIT(), |
| 153 | }; |
| 154 | |
| 155 | static unsigned long ps7_mio_init_data_3_0[] = { |
| 156 | EMIT_WRITE(0xF8000008, 0x0000DF0DU), |
| 157 | EMIT_MASKWRITE(0xF8000B40, 0x00000FFFU, 0x00000600U), |
| 158 | EMIT_MASKWRITE(0xF8000B44, 0x00000FFFU, 0x00000600U), |
| 159 | EMIT_MASKWRITE(0xF8000B48, 0x00000FFFU, 0x00000672U), |
| 160 | EMIT_MASKWRITE(0xF8000B4C, 0x00000FFFU, 0x00000672U), |
| 161 | EMIT_MASKWRITE(0xF8000B50, 0x00000FFFU, 0x00000674U), |
| 162 | EMIT_MASKWRITE(0xF8000B54, 0x00000FFFU, 0x00000674U), |
| 163 | EMIT_MASKWRITE(0xF8000B58, 0x00000FFFU, 0x00000600U), |
| 164 | EMIT_MASKWRITE(0xF8000B5C, 0xFFFFFFFFU, 0x0018C068U), |
| 165 | EMIT_MASKWRITE(0xF8000B60, 0xFFFFFFFFU, 0x00F98068U), |
| 166 | EMIT_MASKWRITE(0xF8000B64, 0xFFFFFFFFU, 0x00F98068U), |
| 167 | EMIT_MASKWRITE(0xF8000B68, 0xFFFFFFFFU, 0x00F98068U), |
| 168 | EMIT_MASKWRITE(0xF8000B6C, 0x00007FFFU, 0x00000260U), |
| 169 | EMIT_MASKWRITE(0xF8000B70, 0x00000001U, 0x00000001U), |
| 170 | EMIT_MASKWRITE(0xF8000B70, 0x00000021U, 0x00000020U), |
| 171 | EMIT_MASKWRITE(0xF8000B70, 0x07FEFFFFU, 0x00000823U), |
| 172 | EMIT_MASKWRITE(0xF8000700, 0x00003FFFU, 0x00001600U), |
| 173 | EMIT_MASKWRITE(0xF8000704, 0x00003FFFU, 0x00001602U), |
| 174 | EMIT_MASKWRITE(0xF8000708, 0x00003FFFU, 0x00000602U), |
| 175 | EMIT_MASKWRITE(0xF800070C, 0x00003FFFU, 0x00000602U), |
| 176 | EMIT_MASKWRITE(0xF8000710, 0x00003FFFU, 0x00000602U), |
| 177 | EMIT_MASKWRITE(0xF8000714, 0x00003FFFU, 0x00000602U), |
| 178 | EMIT_MASKWRITE(0xF8000718, 0x00003FFFU, 0x00000602U), |
| 179 | EMIT_MASKWRITE(0xF800071C, 0x00003FFFU, 0x00000600U), |
| 180 | EMIT_MASKWRITE(0xF8000720, 0x00003FFFU, 0x00000602U), |
| 181 | EMIT_MASKWRITE(0xF8000724, 0x00003FFFU, 0x00001600U), |
| 182 | EMIT_MASKWRITE(0xF8000728, 0x00003FFFU, 0x00001600U), |
| 183 | EMIT_MASKWRITE(0xF800072C, 0x00003FFFU, 0x00001600U), |
| 184 | EMIT_MASKWRITE(0xF8000730, 0x00003FFFU, 0x00001600U), |
| 185 | EMIT_MASKWRITE(0xF8000734, 0x00003FFFU, 0x00001600U), |
| 186 | EMIT_MASKWRITE(0xF8000738, 0x00003FFFU, 0x00001600U), |
| 187 | EMIT_MASKWRITE(0xF800073C, 0x00003FFFU, 0x00001600U), |
| 188 | EMIT_MASKWRITE(0xF8000740, 0x00003FFFU, 0x00001302U), |
| 189 | EMIT_MASKWRITE(0xF8000744, 0x00003FFFU, 0x00001302U), |
| 190 | EMIT_MASKWRITE(0xF8000748, 0x00003FFFU, 0x00001302U), |
| 191 | EMIT_MASKWRITE(0xF800074C, 0x00003FFFU, 0x00001302U), |
| 192 | EMIT_MASKWRITE(0xF8000750, 0x00003FFFU, 0x00001302U), |
| 193 | EMIT_MASKWRITE(0xF8000754, 0x00003FFFU, 0x00001302U), |
| 194 | EMIT_MASKWRITE(0xF8000758, 0x00003FFFU, 0x00001303U), |
| 195 | EMIT_MASKWRITE(0xF800075C, 0x00003FFFU, 0x00001303U), |
| 196 | EMIT_MASKWRITE(0xF8000760, 0x00003FFFU, 0x00001303U), |
| 197 | EMIT_MASKWRITE(0xF8000764, 0x00003FFFU, 0x00001303U), |
| 198 | EMIT_MASKWRITE(0xF8000768, 0x00003FFFU, 0x00001303U), |
| 199 | EMIT_MASKWRITE(0xF800076C, 0x00003FFFU, 0x00001303U), |
| 200 | EMIT_MASKWRITE(0xF8000770, 0x00003FFFU, 0x00001304U), |
| 201 | EMIT_MASKWRITE(0xF8000774, 0x00003FFFU, 0x00001305U), |
| 202 | EMIT_MASKWRITE(0xF8000778, 0x00003FFFU, 0x00001304U), |
| 203 | EMIT_MASKWRITE(0xF800077C, 0x00003FFFU, 0x00001305U), |
| 204 | EMIT_MASKWRITE(0xF8000780, 0x00003FFFU, 0x00001304U), |
| 205 | EMIT_MASKWRITE(0xF8000784, 0x00003FFFU, 0x00001304U), |
| 206 | EMIT_MASKWRITE(0xF8000788, 0x00003FFFU, 0x00001304U), |
| 207 | EMIT_MASKWRITE(0xF800078C, 0x00003FFFU, 0x00001304U), |
| 208 | EMIT_MASKWRITE(0xF8000790, 0x00003FFFU, 0x00001305U), |
| 209 | EMIT_MASKWRITE(0xF8000794, 0x00003FFFU, 0x00001304U), |
| 210 | EMIT_MASKWRITE(0xF8000798, 0x00003FFFU, 0x00001304U), |
| 211 | EMIT_MASKWRITE(0xF800079C, 0x00003FFFU, 0x00001304U), |
| 212 | EMIT_MASKWRITE(0xF80007A0, 0x00003FFFU, 0x00001280U), |
| 213 | EMIT_MASKWRITE(0xF80007A4, 0x00003FFFU, 0x00001280U), |
| 214 | EMIT_MASKWRITE(0xF80007A8, 0x00003FFFU, 0x00001280U), |
| 215 | EMIT_MASKWRITE(0xF80007AC, 0x00003FFFU, 0x00001280U), |
| 216 | EMIT_MASKWRITE(0xF80007B0, 0x00003FFFU, 0x00001280U), |
| 217 | EMIT_MASKWRITE(0xF80007B4, 0x00003FFFU, 0x00001280U), |
| 218 | EMIT_MASKWRITE(0xF80007B8, 0x00003FFFU, 0x00001200U), |
| 219 | EMIT_MASKWRITE(0xF80007BC, 0x00003F01U, 0x00001201U), |
| 220 | EMIT_MASKWRITE(0xF80007C0, 0x00003FFFU, 0x000012E0U), |
| 221 | EMIT_MASKWRITE(0xF80007C4, 0x00003FFFU, 0x000012E1U), |
Milan Obuch | 3107a72 | 2020-01-19 22:33:30 -0300 | [diff] [blame] | 222 | EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00000200U), |
| 223 | EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00000200U), |
Luis Araneda | c1c763d | 2018-07-24 11:31:19 -0400 | [diff] [blame] | 224 | EMIT_MASKWRITE(0xF80007D0, 0x00003FFFU, 0x00001280U), |
| 225 | EMIT_MASKWRITE(0xF80007D4, 0x00003FFFU, 0x00001280U), |
| 226 | EMIT_MASKWRITE(0xF8000830, 0x003F003FU, 0x002F0037U), |
| 227 | EMIT_WRITE(0xF8000004, 0x0000767BU), |
| 228 | EMIT_EXIT(), |
| 229 | }; |
| 230 | |
| 231 | static unsigned long ps7_peripherals_init_data_3_0[] = { |
| 232 | EMIT_WRITE(0xF8000008, 0x0000DF0DU), |
| 233 | EMIT_MASKWRITE(0xF8000B48, 0x00000180U, 0x00000180U), |
| 234 | EMIT_MASKWRITE(0xF8000B4C, 0x00000180U, 0x00000180U), |
| 235 | EMIT_MASKWRITE(0xF8000B50, 0x00000180U, 0x00000180U), |
| 236 | EMIT_MASKWRITE(0xF8000B54, 0x00000180U, 0x00000180U), |
| 237 | EMIT_WRITE(0xF8000004, 0x0000767BU), |
Luis Araneda | c1c763d | 2018-07-24 11:31:19 -0400 | [diff] [blame] | 238 | EMIT_MASKWRITE(0xE000D000, 0x00080000U, 0x00080000U), |
| 239 | EMIT_MASKWRITE(0xF8007000, 0x20000000U, 0x00000000U), |
| 240 | EMIT_MASKWRITE(0xE000A244, 0x003FFFFFU, 0x00004000U), |
| 241 | EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF4000U), |
| 242 | EMIT_MASKWRITE(0xE000A248, 0x003FFFFFU, 0x00004000U), |
| 243 | EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF0000U), |
| 244 | EMIT_MASKDELAY(0xF8F00200, 1), |
| 245 | EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF4000U), |
| 246 | EMIT_EXIT(), |
| 247 | }; |
| 248 | |
| 249 | static unsigned long ps7_post_config_3_0[] = { |
| 250 | EMIT_WRITE(0xF8000008, 0x0000DF0DU), |
| 251 | EMIT_MASKWRITE(0xF8000900, 0x0000000FU, 0x0000000FU), |
| 252 | EMIT_MASKWRITE(0xF8000240, 0xFFFFFFFFU, 0x00000000U), |
| 253 | EMIT_WRITE(0xF8000004, 0x0000767BU), |
| 254 | EMIT_EXIT(), |
| 255 | }; |
| 256 | |
| 257 | int ps7_post_config(void) |
| 258 | { |
| 259 | int ret = -1; |
| 260 | |
| 261 | ret = ps7_config(ps7_post_config_3_0); |
| 262 | if (ret != PS7_INIT_SUCCESS) |
| 263 | return ret; |
| 264 | |
| 265 | return PS7_INIT_SUCCESS; |
| 266 | } |
| 267 | |
| 268 | int ps7_init(void) |
| 269 | { |
| 270 | int ret; |
| 271 | |
| 272 | ret = ps7_config(ps7_mio_init_data_3_0); |
| 273 | if (ret != PS7_INIT_SUCCESS) |
| 274 | return ret; |
| 275 | |
| 276 | ret = ps7_config(ps7_pll_init_data_3_0); |
| 277 | if (ret != PS7_INIT_SUCCESS) |
| 278 | return ret; |
| 279 | |
| 280 | ret = ps7_config(ps7_clock_init_data_3_0); |
| 281 | if (ret != PS7_INIT_SUCCESS) |
| 282 | return ret; |
| 283 | |
| 284 | ret = ps7_config(ps7_ddr_init_data_3_0); |
| 285 | if (ret != PS7_INIT_SUCCESS) |
| 286 | return ret; |
| 287 | |
| 288 | ret = ps7_config(ps7_peripherals_init_data_3_0); |
| 289 | if (ret != PS7_INIT_SUCCESS) |
| 290 | return ret; |
| 291 | |
| 292 | return PS7_INIT_SUCCESS; |
| 293 | } |