Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2015 Linaro |
| 4 | * |
| 5 | * Peter Griffin <peter.griffin@linaro.org> |
| 6 | * |
| 7 | * Configuration for HiKey 96boards CE. Parts were derived from other ARM |
| 8 | * configurations. |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #ifndef __HIKEY_H |
| 12 | #define __HIKEY_H |
| 13 | |
Peter Griffin | 6719baa | 2015-09-10 21:55:13 +0100 | [diff] [blame] | 14 | #include <linux/sizes.h> |
| 15 | |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 16 | #define CONFIG_POWER |
| 17 | #define CONFIG_POWER_HI6553 |
| 18 | |
| 19 | #define CONFIG_REMAKE_ELF |
| 20 | |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 21 | /* Physical Memory Map */ |
| 22 | |
| 23 | /* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */ |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 24 | |
Peter Griffin | 9967fd0 | 2016-04-20 17:14:02 +0100 | [diff] [blame] | 25 | #define CONFIG_NR_DRAM_BANKS 6 |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 26 | #define PHYS_SDRAM_1 0x00000000 |
| 27 | |
| 28 | /* 1008 MB (the last 16Mb are secured for TrustZone by ATF*/ |
Peter Griffin | 7de4acf | 2015-09-10 21:55:18 +0100 | [diff] [blame] | 29 | #define PHYS_SDRAM_1_SIZE 0x3EFFFFFF |
| 30 | |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 31 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 32 | |
| 33 | #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 |
| 34 | |
| 35 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) |
| 36 | |
| 37 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x80000) |
| 38 | |
| 39 | /* Generic Timer Definitions */ |
| 40 | #define COUNTER_FREQUENCY 19000000 |
| 41 | |
| 42 | /* Generic Interrupt Controller Definitions */ |
| 43 | #define GICD_BASE 0xf6801000 |
| 44 | #define GICC_BASE 0xf6802000 |
| 45 | |
| 46 | /* Size of malloc() pool */ |
Peter Griffin | 6719baa | 2015-09-10 21:55:13 +0100 | [diff] [blame] | 47 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_8M) |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 48 | |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 49 | #ifdef CONFIG_CMD_USB |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 50 | #define CONFIG_USB_DWC2_REG_ADDR 0xF72C0000 |
| 51 | /*#define CONFIG_DWC2_DFLT_SPEED_FULL*/ |
| 52 | #define CONFIG_DWC2_ENABLE_DYNAMIC_FIFO |
| 53 | |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 54 | #define CONFIG_MISC_INIT_R |
| 55 | #endif |
| 56 | |
| 57 | #define CONFIG_HIKEY_GPIO |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 58 | |
| 59 | /* SD/MMC configuration */ |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 60 | #define CONFIG_BOUNCE_BUFFER |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 61 | |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 62 | /* Command line configuration */ |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 63 | |
| 64 | #define CONFIG_MTD_PARTITIONS |
| 65 | |
| 66 | /* BOOTP options */ |
| 67 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 68 | |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 69 | /* Initial environment variables */ |
| 70 | |
| 71 | /* |
| 72 | * Defines where the kernel and FDT will be put in RAM |
| 73 | */ |
| 74 | |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 75 | #define BOOT_TARGET_DEVICES(func) \ |
| 76 | func(USB, usb, 0) \ |
| 77 | func(MMC, mmc, 1) \ |
| 78 | func(DHCP, dhcp, na) |
| 79 | #include <config_distro_bootcmd.h> |
| 80 | |
| 81 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 82 | "kernel_name=Image\0" \ |
| 83 | "kernel_addr_r=0x00080000\0" \ |
Alexander Graf | af68480 | 2016-03-04 01:10:11 +0100 | [diff] [blame] | 84 | "fdtfile=hi6220-hikey.dtb\0" \ |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 85 | "fdt_addr_r=0x02000000\0" \ |
| 86 | "fdt_high=0xffffffffffffffff\0" \ |
| 87 | "initrd_high=0xffffffffffffffff\0" \ |
| 88 | BOOTENV |
| 89 | |
Robert P. J. Day | 8c60f92 | 2016-05-04 04:47:31 -0400 | [diff] [blame] | 90 | /* Preserve environment on sd card */ |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 91 | #define CONFIG_ENV_SIZE 0x1000 |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 92 | |
| 93 | /* Monitor Command Prompt */ |
| 94 | #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 95 | #define CONFIG_SYS_MAXARGS 64 /* max command args */ |
| 96 | |
Peter Griffin | 31f327e | 2015-07-30 18:55:23 +0100 | [diff] [blame] | 97 | #endif /* __HIKEY_H */ |