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git01.mediatek.com / filogic / uboot / 8e28ecc3b970151a1cc2adc838126ccedd21f48a / . / include / configs / db-88f6820-amc.h
blob: 2f1ffa2754c76d2d46e1ff08c544049edf83c251 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]2/*
3 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]4 */
5
6#ifndef _CONFIG_DB_88F6820_AMC_H
7#define _CONFIG_DB_88F6820_AMC_H
8
9/*
10 * High Level Configuration Options (easy to change)
11 */
12
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]13/*
14 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
15 * for DDR ECC byte filling in the SPL before loading the main
16 * U-Boot into it.
17 */
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]18#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
19
20/*
21 * Commands configuration
22 */
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]23
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]24/* SPI NOR flash default params, used by sf commands */
25#define CONFIG_SF_DEFAULT_BUS 1
26#define CONFIG_SF_DEFAULT_SPEED 1000000
27#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
28
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]29/* USB/EHCI configuration */
30#define CONFIG_EHCI_IS_TDI
31
32/* Environment in SPI NOR flash */
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]33#define CONFIG_ENV_SPI_BUS 1
34#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
35#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
36#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
37
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]38#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
39
40/* PCIe support */
41#ifndef CONFIG_SPL_BUILD
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]42#define CONFIG_PCI_MVEBU
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]43#define CONFIG_PCI_SCAN_SHOW
44#endif
45
Chris Packham228efd02016-09-22 12:56:15 +1200[diff] [blame]46/* NAND */
47#define CONFIG_SYS_NAND_USE_FLASH_BBT
48#define CONFIG_SYS_NAND_ONFI_DETECTION
49
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]50/* Keep device tree and initrd in lower memory so the kernel can access them */
51#define CONFIG_EXTRA_ENV_SETTINGS \
52 "fdt_high=0x10000000\0" \
53 "initrd_high=0x10000000\0"
54
55/* SPL */
56/*
57 * Select the boot device here
58 *
59 * Currently supported are:
60 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
61 *
62 * MMC is not populated on this board.
63 * NAND support may be added in the future.
64 */
65#define SPL_BOOT_SPI_NOR_FLASH 1
66#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
67
68/* Defines for SPL */
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]69#define CONFIG_SPL_SIZE (140 << 10)
70#define CONFIG_SPL_TEXT_BASE 0x40000030
71#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
72
73#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
74#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
75
76#ifdef CONFIG_SPL_BUILD
77#define CONFIG_SYS_MALLOC_SIMPLE
78#endif
79
80#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
81#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
82
83#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
84/* SPL related SPI defines */
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]85#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
86#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
87#endif
88
89/*
90 * mv-common.h should be defined after CMD configs since it used them
91 * to enable certain macros
92 */
93#include "mv-common.h"
94#undef CONFIG_SYS_MAXARGS
95#define CONFIG_SYS_MAXARGS 96
96
97#endif /* _CONFIG_DB_88F6820_AMC_H */