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Ley Foon Tan10b69642017-04-26 02:44:46 +08001/*
2 * Copyright (C) 2015-2017 Altera Corporation <www.altera.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0
5 */
6
7#ifndef __CONFIG_SOCFGPA_ARRIA10_H__
8#define __CONFIG_SOCFGPA_ARRIA10_H__
9
10#include <asm/arch/base_addr_a10.h>
Tom Rinid8532af2017-06-02 11:03:50 -040011
Ley Foon Tan10b69642017-04-26 02:44:46 +080012/* Booting Linux */
13#define CONFIG_LOADADDR 0x01000000
14#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
15
16/*
17 * U-Boot general configurations
18 */
19/* Cache options */
20#define CONFIG_SYS_DCACHE_OFF
21
22/* Memory configurations */
23#define PHYS_SDRAM_1_SIZE 0x40000000
24
25/* Ethernet on SoC (EMAC) */
Ley Foon Tan10b69642017-04-26 02:44:46 +080026
27/*
28 * U-Boot environment configurations
29 */
Ley Foon Tan10b69642017-04-26 02:44:46 +080030
31/*
Ley Foon Tan10b69642017-04-26 02:44:46 +080032 * Serial / UART configurations
33 */
34#define CONFIG_SYS_NS16550_MEM32
35#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
36
37/*
38 * L4 OSC1 Timer 0
39 */
40/* reload value when timer count to zero */
41#define TIMER_LOAD_VAL 0xFFFFFFFF
42
43/*
44 * Flash configurations
45 */
46#define CONFIG_SYS_MAX_FLASH_BANKS 1
47
48/* The rest of the configuration is shared */
49#include <configs/socfpga_common.h>
50
51#endif /* __CONFIG_SOCFGPA_ARRIA10_H__ */