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Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +09001/*
2 * include/configs/gose.h
3 *
4 * Copyright (C) 2014 Renesas Electronics Corporation
5 *
6 * SPDX-License-Identifier: GPL-2.0
7 */
8
9#ifndef __GOSE_H
10#define __GOSE_H
11
12#undef DEBUG
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +090013#define CONFIG_ARCH_RMOBILE_BOARD_STRING "Gose"
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +090014
Nobuhiro Iwamatsub6169ac2014-11-10 14:34:07 +090015#include "rcar-gen2-common.h"
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +090016
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +090017/* STACK */
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +090018#if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +090019#define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC
20#else
21#define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC
22#endif
23
24#define STACK_AREA_SIZE 0xC000
25#define LOW_LEVEL_MERAM_STACK \
26 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
27
28/* MEMORY */
Nobuhiro Iwamatsub6169ac2014-11-10 14:34:07 +090029#define RCAR_GEN2_SDRAM_BASE 0x40000000
30#define RCAR_GEN2_SDRAM_SIZE 0x40000000
31#define RCAR_GEN2_UBOOT_SDRAM_SIZE 0x20000000
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +090032
33/* SCIF */
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +090034
35/* FLASH */
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +090036#define CONFIG_SPI
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +090037
Nobuhiro Iwamatsueef1f232014-11-06 15:42:24 +090038/* SH Ether */
Nobuhiro Iwamatsueef1f232014-11-06 15:42:24 +090039#define CONFIG_SH_ETHER_USE_PORT 0
40#define CONFIG_SH_ETHER_PHY_ADDR 0x1
41#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
42#define CONFIG_SH_ETHER_CACHE_WRITEBACK
43#define CONFIG_SH_ETHER_CACHE_INVALIDATE
Nobuhiro Iwamatsueef1f232014-11-06 15:42:24 +090044#define CONFIG_BITBANGMII
45#define CONFIG_BITBANGMII_MULTI
46#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
47
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +090048/* Board Clock */
49#define RMOBILE_XTAL_CLK 20000000u
50#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
51#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +090052#define CONFIG_SYS_TMU_CLK_DIV 4
53
54/* I2C */
55#define CONFIG_SYS_I2C
56#define CONFIG_SYS_I2C_SH
57#define CONFIG_SYS_I2C_SLAVE 0x7F
58#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +090059#define CONFIG_SYS_I2C_SH_SPEED0 400000
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +090060#define CONFIG_SYS_I2C_SH_SPEED1 400000
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +090061#define CONFIG_SYS_I2C_SH_SPEED2 400000
62#define CONFIG_SH_I2C_DATA_HIGH 4
63#define CONFIG_SH_I2C_DATA_LOW 5
64#define CONFIG_SH_I2C_CLOCK 10000000
65
66#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
67
Nobuhiro Iwamatsu87adc0a2014-11-06 15:42:25 +090068/* USB */
Nobuhiro Iwamatsu87adc0a2014-11-06 15:42:25 +090069#define CONFIG_USB_EHCI_RMOBILE
70#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
71
Nobuhiro Iwamatsue02f1742014-12-02 16:52:24 +090072/* Module stop status bits */
73/* INTC-RT */
74#define CONFIG_SMSTP0_ENA 0x00400000
75/* MSIF */
76#define CONFIG_SMSTP2_ENA 0x00002000
77/* INTC-SYS, IRQC */
78#define CONFIG_SMSTP4_ENA 0x00000180
79/* SCIF0 */
80#define CONFIG_SMSTP7_ENA 0x00200000
81
Nobuhiro Iwamatsu161af502014-11-12 11:29:39 +090082/* SDHI */
Nobuhiro Iwamatsu161af502014-11-12 11:29:39 +090083#define CONFIG_SH_SDHI_FREQ 97500000
84
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +090085#endif /* __GOSE_H */