Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2005 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
Wolfgang Denk | bd8ec7e | 2013-10-07 13:07:26 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * TQM8349 board configuration file |
| 10 | */ |
| 11 | |
| 12 | #ifndef __CONFIG_H |
| 13 | #define __CONFIG_H |
| 14 | |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 15 | /* |
| 16 | * High Level Configuration Options |
| 17 | */ |
| 18 | #define CONFIG_E300 1 /* E300 Family */ |
Peter Tyser | 72f2d39 | 2009-05-22 17:23:25 -0500 | [diff] [blame] | 19 | #define CONFIG_MPC834x 1 /* MPC834x specific */ |
Timur Tabi | c0b114a | 2006-10-31 21:23:16 -0600 | [diff] [blame] | 20 | #define CONFIG_MPC8349 1 /* MPC8349 specific */ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 21 | |
Mike Williams | bf895ad | 2011-07-22 04:01:30 +0000 | [diff] [blame] | 22 | /* IMMR Base Address Register, use Freescale default: 0xff400000 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 23 | #define CONFIG_SYS_IMMR 0xff400000 |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 24 | |
| 25 | /* System clock. Primary input clock when in PCI host mode */ |
| 26 | #define CONFIG_83XX_CLKIN 66666000 /* 66,666 MHz */ |
| 27 | |
| 28 | /* |
| 29 | * Local Bus LCRR |
| 30 | * LCRR: DLL bypass, Clock divider is 8 |
| 31 | * |
| 32 | * for CSB = 266 MHz it gives LCB clock frequency = 33 MHz |
| 33 | * |
| 34 | * External Local Bus rate is |
| 35 | * CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV |
| 36 | */ |
Kim Phillips | 328040a | 2009-09-25 18:19:44 -0500 | [diff] [blame] | 37 | #define CONFIG_SYS_LCRR_DBYP LCRR_DBYP |
| 38 | #define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_8 |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 39 | |
| 40 | /* board pre init: do not call, nothing to do */ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 41 | |
| 42 | /* detect the number of flash banks */ |
| 43 | #define CONFIG_BOARD_EARLY_INIT_R |
| 44 | |
| 45 | /* |
| 46 | * DDR Setup |
| 47 | */ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 48 | /* DDR is system memory*/ |
| 49 | #define CONFIG_SYS_DDR_BASE 0x00000000 |
| 50 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 51 | #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 52 | #define DDR_CASLAT_25 /* CASLAT set to 2.5 */ |
| 53 | #undef CONFIG_DDR_ECC /* only for ECC DDR module */ |
| 54 | #undef CONFIG_SPD_EEPROM /* do not use SPD EEPROM for DDR setup */ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 55 | |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 56 | #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 57 | #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */ |
| 58 | #define CONFIG_SYS_MEMTEST_END 0x00100000 |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 59 | |
| 60 | /* |
| 61 | * FLASH on the Local Bus |
| 62 | */ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 63 | #define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ |
| 64 | #define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 65 | #undef CONFIG_SYS_FLASH_CHECKSUM |
| 66 | #define CONFIG_SYS_FLASH_BASE 0x80000000 /* start of FLASH */ |
| 67 | #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size in MB */ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 68 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sectors */ |
Wolfgang Denk | 5a272ec3 | 2009-05-15 09:19:52 +0200 | [diff] [blame] | 69 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 70 | |
| 71 | /* |
| 72 | * FLASH bank number detection |
| 73 | */ |
| 74 | |
| 75 | /* |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 76 | * When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is defined, the actual number of |
| 77 | * Flash banks has to be determined at runtime and stored in a gloabl variable |
| 78 | * tqm834x_num_flash_banks. The value of CONFIG_SYS_MAX_FLASH_BANKS_DETECT is |
| 79 | * only used instead of CONFIG_SYS_MAX_FLASH_BANKS to allocate the array |
| 80 | * flash_info, and should be made sufficiently large to accomodate the number |
| 81 | * of banks that might actually be detected. Since most (all?) Flash related |
| 82 | * functions use CONFIG_SYS_MAX_FLASH_BANKS as the number of actual banks on |
| 83 | * the board, it is defined as tqm834x_num_flash_banks. |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 84 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 85 | #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 2 |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 86 | |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 87 | #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max sectors per device */ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 88 | |
| 89 | /* 32 bit device at 0x80000000 via GPCM (0x8000_1801) */ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 90 | #define CONFIG_SYS_BR0_PRELIM ((CONFIG_SYS_FLASH_BASE & BR_BA) \ |
| 91 | | BR_MS_GPCM \ |
| 92 | | BR_PS_32 \ |
| 93 | | BR_V) |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 94 | |
| 95 | /* FLASH timing (0x0000_0c54) */ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 96 | #define CONFIG_SYS_OR_TIMING_FLASH (OR_GPCM_CSNT \ |
| 97 | | OR_GPCM_ACS_DIV4 \ |
| 98 | | OR_GPCM_SCY_5 \ |
| 99 | | OR_GPCM_TRLX) |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 100 | |
Joe Hershberger | f05b933 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 101 | #define CONFIG_SYS_PRELIM_OR_AM OR_AM_1GB /* OR addr mask: 1 GiB */ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 102 | |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 103 | #define CONFIG_SYS_OR0_PRELIM (CONFIG_SYS_PRELIM_OR_AM \ |
| 104 | | CONFIG_SYS_OR_TIMING_FLASH) |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 105 | |
Joe Hershberger | f05b933 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 106 | #define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_1GB) |
Rafal Jaworowski | 384da5e | 2005-10-17 02:39:53 +0200 | [diff] [blame] | 107 | |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 108 | /* Window base at flash base */ |
| 109 | #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 110 | |
| 111 | /* disable remaining mappings */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 112 | #define CONFIG_SYS_BR1_PRELIM 0x00000000 |
| 113 | #define CONFIG_SYS_OR1_PRELIM 0x00000000 |
| 114 | #define CONFIG_SYS_LBLAWBAR1_PRELIM 0x00000000 |
| 115 | #define CONFIG_SYS_LBLAWAR1_PRELIM 0x00000000 |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 116 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 117 | #define CONFIG_SYS_BR2_PRELIM 0x00000000 |
| 118 | #define CONFIG_SYS_OR2_PRELIM 0x00000000 |
| 119 | #define CONFIG_SYS_LBLAWBAR2_PRELIM 0x00000000 |
| 120 | #define CONFIG_SYS_LBLAWAR2_PRELIM 0x00000000 |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 121 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 122 | #define CONFIG_SYS_BR3_PRELIM 0x00000000 |
| 123 | #define CONFIG_SYS_OR3_PRELIM 0x00000000 |
| 124 | #define CONFIG_SYS_LBLAWBAR3_PRELIM 0x00000000 |
| 125 | #define CONFIG_SYS_LBLAWAR3_PRELIM 0x00000000 |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 126 | |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 127 | /* |
| 128 | * Monitor config |
| 129 | */ |
Wolfgang Denk | 0708bc6 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 130 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 131 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 132 | #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) |
Wolfgang Denk | 9559357 | 2009-05-14 23:18:34 +0200 | [diff] [blame] | 133 | # define CONFIG_SYS_RAMBOOT |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 134 | #else |
Wolfgang Denk | 9559357 | 2009-05-14 23:18:34 +0200 | [diff] [blame] | 135 | # undef CONFIG_SYS_RAMBOOT |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 136 | #endif |
| 137 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 138 | #define CONFIG_SYS_INIT_RAM_LOCK 1 |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 139 | #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 /* Initial RAM address */ |
| 140 | #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM*/ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 141 | |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 142 | #define CONFIG_SYS_GBL_DATA_OFFSET \ |
| 143 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 144 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 145 | |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 146 | /* Reserve 384 kB = 3 sect. for Mon */ |
| 147 | #define CONFIG_SYS_MONITOR_LEN (384 * 1024) |
| 148 | /* Reserve 512 kB for malloc */ |
| 149 | #define CONFIG_SYS_MALLOC_LEN (512 * 1024) |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 150 | |
| 151 | /* |
| 152 | * Serial Port |
| 153 | */ |
| 154 | #define CONFIG_CONS_INDEX 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 155 | #define CONFIG_SYS_NS16550_SERIAL |
| 156 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
| 157 | #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 158 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 159 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 160 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 161 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 162 | #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x4500) |
| 163 | #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x4600) |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 164 | |
| 165 | /* |
| 166 | * I2C |
| 167 | */ |
Heiko Schocher | f285074 | 2012-10-24 13:48:22 +0200 | [diff] [blame] | 168 | #define CONFIG_SYS_I2C |
| 169 | #define CONFIG_SYS_I2C_FSL |
| 170 | #define CONFIG_SYS_FSL_I2C_SPEED 400000 |
| 171 | #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F |
| 172 | #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 173 | |
| 174 | /* I2C EEPROM, configuration for onboard EEPROMs 24C256 and 24C32 */ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 175 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */ |
| 176 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16 bit */ |
| 177 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 32 bytes/write */ |
| 178 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 12 /* 10ms +/- 20% */ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 179 | |
| 180 | /* I2C RTC */ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 181 | #define CONFIG_RTC_DS1337 /* use ds1337 rtc via i2c */ |
| 182 | #define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 183 | |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 184 | /* |
| 185 | * TSEC |
| 186 | */ |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 187 | #define CONFIG_TSEC_ENET /* tsec ethernet support */ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 188 | #define CONFIG_MII |
| 189 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 190 | #define CONFIG_SYS_TSEC1_OFFSET 0x24000 |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 191 | #define CONFIG_SYS_TSEC1 (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 192 | #define CONFIG_SYS_TSEC2_OFFSET 0x25000 |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 193 | #define CONFIG_SYS_TSEC2 (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC2_OFFSET) |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 194 | |
| 195 | #if defined(CONFIG_TSEC_ENET) |
| 196 | |
Kim Phillips | 177e58f | 2007-05-16 16:52:19 -0500 | [diff] [blame] | 197 | #define CONFIG_TSEC1 1 |
| 198 | #define CONFIG_TSEC1_NAME "TSEC0" |
| 199 | #define CONFIG_TSEC2 1 |
| 200 | #define CONFIG_TSEC2_NAME "TSEC1" |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 201 | #define TSEC1_PHY_ADDR 2 |
| 202 | #define TSEC2_PHY_ADDR 1 |
| 203 | #define TSEC1_PHYIDX 0 |
| 204 | #define TSEC2_PHYIDX 0 |
Andy Fleming | 09b88df | 2007-08-15 20:03:25 -0500 | [diff] [blame] | 205 | #define TSEC1_FLAGS TSEC_GIGABIT |
| 206 | #define TSEC2_FLAGS TSEC_GIGABIT |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 207 | |
| 208 | /* Options are: TSEC[0-1] */ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 209 | #define CONFIG_ETHPRIME "TSEC0" |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 210 | |
| 211 | #endif /* CONFIG_TSEC_ENET */ |
| 212 | |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 213 | #if defined(CONFIG_PCI) |
| 214 | |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 215 | #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 216 | |
Rafal Jaworowski | 384da5e | 2005-10-17 02:39:53 +0200 | [diff] [blame] | 217 | /* PCI1 host bridge */ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 218 | #define CONFIG_SYS_PCI1_MEM_BASE 0x90000000 |
| 219 | #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE |
| 220 | #define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */ |
| 221 | #define CONFIG_SYS_PCI1_MMIO_BASE \ |
| 222 | (CONFIG_SYS_PCI1_MEM_BASE + CONFIG_SYS_PCI1_MEM_SIZE) |
| 223 | #define CONFIG_SYS_PCI1_MMIO_PHYS CONFIG_SYS_PCI1_MMIO_BASE |
| 224 | #define CONFIG_SYS_PCI1_MMIO_SIZE 0x10000000 /* 256M */ |
| 225 | #define CONFIG_SYS_PCI1_IO_BASE 0xe2000000 |
| 226 | #define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE |
| 227 | #define CONFIG_SYS_PCI1_IO_SIZE 0x1000000 /* 16M */ |
Rafal Jaworowski | 384da5e | 2005-10-17 02:39:53 +0200 | [diff] [blame] | 228 | |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 229 | #undef CONFIG_EEPRO100 |
Marian Balakowicz | aab8c49 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 230 | #define CONFIG_EEPRO100 |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 231 | #undef CONFIG_TULIP |
| 232 | |
| 233 | #if !defined(CONFIG_PCI_PNP) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 234 | #define PCI_ENET0_IOADDR CONFIG_SYS_PCI1_IO_BASE |
| 235 | #define PCI_ENET0_MEMADDR CONFIG_SYS_PCI1_MEM_BASE |
Rafal Jaworowski | 384da5e | 2005-10-17 02:39:53 +0200 | [diff] [blame] | 236 | #define PCI_IDSEL_NUMBER 0x1c /* slot0 (IDSEL) = 28 */ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 237 | #endif |
| 238 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 239 | #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 240 | |
| 241 | #endif /* CONFIG_PCI */ |
| 242 | |
| 243 | /* |
| 244 | * Environment |
| 245 | */ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 246 | #define CONFIG_ENV_ADDR \ |
| 247 | (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) |
| 248 | #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) for env */ |
| 249 | #define CONFIG_ENV_SIZE 0x8000 /* 32K max size */ |
Wolfgang Denk | e96877e | 2009-05-14 23:18:33 +0200 | [diff] [blame] | 250 | #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) |
| 251 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) |
| 252 | |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 253 | #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
| 254 | #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 255 | |
Jon Loeliger | edccb46 | 2007-07-04 22:30:50 -0500 | [diff] [blame] | 256 | /* |
Jon Loeliger | beb9ff4 | 2007-07-10 09:22:23 -0500 | [diff] [blame] | 257 | * BOOTP options |
| 258 | */ |
| 259 | #define CONFIG_BOOTP_BOOTFILESIZE |
Jon Loeliger | beb9ff4 | 2007-07-10 09:22:23 -0500 | [diff] [blame] | 260 | |
Jon Loeliger | beb9ff4 | 2007-07-10 09:22:23 -0500 | [diff] [blame] | 261 | /* |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 262 | * Miscellaneous configurable options |
| 263 | */ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 264 | #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 265 | |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 266 | #undef CONFIG_WATCHDOG /* watchdog disabled */ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 267 | |
| 268 | /* |
| 269 | * For booting Linux, the board info and command line data |
Ira W. Snyder | c5a22d0 | 2010-09-10 15:42:32 -0700 | [diff] [blame] | 270 | * have to be in the first 256 MB of memory, since this is |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 271 | * the maximum mapped by the Linux kernel during initialization. |
| 272 | */ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 273 | /* Initial Memory map for Linux */ |
| 274 | #define CONFIG_SYS_BOOTMAPSZ (256 << 20) |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 275 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 276 | #define CONFIG_SYS_HRCW_LOW (\ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 277 | HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\ |
| 278 | HRCWL_DDR_TO_SCB_CLK_1X1 |\ |
| 279 | HRCWL_CSB_TO_CLKIN_4X1 |\ |
| 280 | HRCWL_VCO_1X2 |\ |
| 281 | HRCWL_CORE_TO_CSB_2X1) |
| 282 | |
| 283 | #if defined(PCI_64BIT) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 284 | #define CONFIG_SYS_HRCW_HIGH (\ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 285 | HRCWH_PCI_HOST |\ |
| 286 | HRCWH_64_BIT_PCI |\ |
| 287 | HRCWH_PCI1_ARBITER_ENABLE |\ |
| 288 | HRCWH_PCI2_ARBITER_DISABLE |\ |
| 289 | HRCWH_CORE_ENABLE |\ |
| 290 | HRCWH_FROM_0X00000100 |\ |
| 291 | HRCWH_BOOTSEQ_DISABLE |\ |
| 292 | HRCWH_SW_WATCHDOG_DISABLE |\ |
| 293 | HRCWH_ROM_LOC_LOCAL_16BIT |\ |
| 294 | HRCWH_TSEC1M_IN_GMII |\ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 295 | HRCWH_TSEC2M_IN_GMII) |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 296 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 297 | #define CONFIG_SYS_HRCW_HIGH (\ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 298 | HRCWH_PCI_HOST |\ |
| 299 | HRCWH_32_BIT_PCI |\ |
| 300 | HRCWH_PCI1_ARBITER_ENABLE |\ |
Rafal Jaworowski | 384da5e | 2005-10-17 02:39:53 +0200 | [diff] [blame] | 301 | HRCWH_PCI2_ARBITER_DISABLE |\ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 302 | HRCWH_CORE_ENABLE |\ |
| 303 | HRCWH_FROM_0X00000100 |\ |
| 304 | HRCWH_BOOTSEQ_DISABLE |\ |
| 305 | HRCWH_SW_WATCHDOG_DISABLE |\ |
| 306 | HRCWH_ROM_LOC_LOCAL_16BIT |\ |
| 307 | HRCWH_TSEC1M_IN_GMII |\ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 308 | HRCWH_TSEC2M_IN_GMII) |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 309 | #endif |
| 310 | |
Kumar Gala | e522143 | 2006-01-11 11:12:57 -0600 | [diff] [blame] | 311 | /* System IO Config */ |
Kim Phillips | f91cad6 | 2009-06-05 14:11:33 -0500 | [diff] [blame] | 312 | #define CONFIG_SYS_SICRH 0 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 313 | #define CONFIG_SYS_SICRL SICRL_LDP_A |
Kumar Gala | e522143 | 2006-01-11 11:12:57 -0600 | [diff] [blame] | 314 | |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 315 | /* i-cache and d-cache disabled */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 316 | #define CONFIG_SYS_HID0_INIT 0x000000000 |
Kim Phillips | f3c7cd9 | 2010-04-20 19:37:54 -0500 | [diff] [blame] | 317 | #define CONFIG_SYS_HID0_FINAL (CONFIG_SYS_HID0_INIT | \ |
| 318 | HID0_ENABLE_INSTRUCTION_CACHE) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 319 | #define CONFIG_SYS_HID2 HID2_HBE |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 320 | |
Becky Bruce | 03ea1be | 2008-05-08 19:02:12 -0500 | [diff] [blame] | 321 | #define CONFIG_HIGH_BATS 1 /* High BATs supported */ |
| 322 | |
Kumar Gala | d5d94d6 | 2006-02-10 15:40:06 -0600 | [diff] [blame] | 323 | /* DDR 0 - 512M */ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 324 | #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ |
Joe Hershberger | bfd8973 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 325 | | BATL_PP_RW \ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 326 | | BATL_MEMCOHERENCE) |
| 327 | #define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \ |
| 328 | | BATU_BL_256M \ |
| 329 | | BATU_VS \ |
| 330 | | BATU_VP) |
| 331 | #define CONFIG_SYS_IBAT1L (CONFIG_SYS_SDRAM_BASE + 0x10000000 \ |
Joe Hershberger | bfd8973 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 332 | | BATL_PP_RW \ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 333 | | BATL_MEMCOHERENCE) |
| 334 | #define CONFIG_SYS_IBAT1U (CONFIG_SYS_SDRAM_BASE + 0x10000000 \ |
| 335 | | BATU_BL_256M \ |
| 336 | | BATU_VS \ |
| 337 | | BATU_VP) |
Kumar Gala | d5d94d6 | 2006-02-10 15:40:06 -0600 | [diff] [blame] | 338 | |
| 339 | /* stack in DCACHE @ 512M (no backing mem) */ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 340 | #define CONFIG_SYS_IBAT2L (CONFIG_SYS_INIT_RAM_ADDR \ |
Joe Hershberger | bfd8973 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 341 | | BATL_PP_RW \ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 342 | | BATL_MEMCOHERENCE) |
| 343 | #define CONFIG_SYS_IBAT2U (CONFIG_SYS_INIT_RAM_ADDR \ |
| 344 | | BATU_BL_128K \ |
| 345 | | BATU_VS \ |
| 346 | | BATU_VP) |
Kumar Gala | d5d94d6 | 2006-02-10 15:40:06 -0600 | [diff] [blame] | 347 | |
| 348 | /* PCI */ |
Rafal Jaworowski | 7a1e6be | 2006-08-18 10:39:11 +0200 | [diff] [blame] | 349 | #ifdef CONFIG_PCI |
Gabor Juhos | b445873 | 2013-05-30 07:06:12 +0000 | [diff] [blame] | 350 | #define CONFIG_PCI_INDIRECT_BRIDGE |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 351 | #define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI1_MEM_BASE \ |
Joe Hershberger | bfd8973 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 352 | | BATL_PP_RW \ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 353 | | BATL_MEMCOHERENCE) |
| 354 | #define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI1_MEM_BASE \ |
| 355 | | BATU_BL_256M \ |
| 356 | | BATU_VS \ |
| 357 | | BATU_VP) |
| 358 | #define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI1_MMIO_BASE \ |
Joe Hershberger | bfd8973 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 359 | | BATL_PP_RW \ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 360 | | BATL_MEMCOHERENCE \ |
| 361 | | BATL_GUARDEDSTORAGE) |
| 362 | #define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI1_MMIO_BASE \ |
| 363 | | BATU_BL_256M \ |
| 364 | | BATU_VS \ |
| 365 | | BATU_VP) |
| 366 | #define CONFIG_SYS_IBAT5L (CONFIG_SYS_PCI1_IO_BASE \ |
Joe Hershberger | bfd8973 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 367 | | BATL_PP_RW \ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 368 | | BATL_CACHEINHIBIT \ |
| 369 | | BATL_GUARDEDSTORAGE) |
| 370 | #define CONFIG_SYS_IBAT5U (CONFIG_SYS_PCI1_IO_BASE \ |
| 371 | | BATU_BL_16M \ |
| 372 | | BATU_VS \ |
| 373 | | BATU_VP) |
Rafal Jaworowski | 7a1e6be | 2006-08-18 10:39:11 +0200 | [diff] [blame] | 374 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 375 | #define CONFIG_SYS_IBAT3L (0) |
| 376 | #define CONFIG_SYS_IBAT3U (0) |
| 377 | #define CONFIG_SYS_IBAT4L (0) |
| 378 | #define CONFIG_SYS_IBAT4U (0) |
| 379 | #define CONFIG_SYS_IBAT5L (0) |
| 380 | #define CONFIG_SYS_IBAT5U (0) |
Rafal Jaworowski | 7a1e6be | 2006-08-18 10:39:11 +0200 | [diff] [blame] | 381 | #endif |
Kumar Gala | d5d94d6 | 2006-02-10 15:40:06 -0600 | [diff] [blame] | 382 | |
| 383 | /* IMMRBAR */ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 384 | #define CONFIG_SYS_IBAT6L (CONFIG_SYS_IMMR \ |
Joe Hershberger | bfd8973 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 385 | | BATL_PP_RW \ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 386 | | BATL_CACHEINHIBIT \ |
| 387 | | BATL_GUARDEDSTORAGE) |
| 388 | #define CONFIG_SYS_IBAT6U (CONFIG_SYS_IMMR \ |
| 389 | | BATU_BL_1M \ |
| 390 | | BATU_VS \ |
| 391 | | BATU_VP) |
Kumar Gala | d5d94d6 | 2006-02-10 15:40:06 -0600 | [diff] [blame] | 392 | |
| 393 | /* FLASH */ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 394 | #define CONFIG_SYS_IBAT7L (CONFIG_SYS_FLASH_BASE \ |
Joe Hershberger | bfd8973 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 395 | | BATL_PP_RW \ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 396 | | BATL_CACHEINHIBIT \ |
| 397 | | BATL_GUARDEDSTORAGE) |
| 398 | #define CONFIG_SYS_IBAT7U (CONFIG_SYS_FLASH_BASE \ |
| 399 | | BATU_BL_256M \ |
| 400 | | BATU_VS \ |
| 401 | | BATU_VP) |
Kumar Gala | d5d94d6 | 2006-02-10 15:40:06 -0600 | [diff] [blame] | 402 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 403 | #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L |
| 404 | #define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U |
| 405 | #define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L |
| 406 | #define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U |
| 407 | #define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L |
| 408 | #define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U |
| 409 | #define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L |
| 410 | #define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U |
| 411 | #define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L |
| 412 | #define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U |
| 413 | #define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L |
| 414 | #define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U |
| 415 | #define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L |
| 416 | #define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U |
| 417 | #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L |
| 418 | #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U |
Kumar Gala | d5d94d6 | 2006-02-10 15:40:06 -0600 | [diff] [blame] | 419 | |
Jon Loeliger | edccb46 | 2007-07-04 22:30:50 -0500 | [diff] [blame] | 420 | #if defined(CONFIG_CMD_KGDB) |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 421 | #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 422 | #endif |
| 423 | |
| 424 | /* |
| 425 | * Environment Configuration |
| 426 | */ |
| 427 | |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 428 | /* default location for tftp and bootm */ |
| 429 | #define CONFIG_LOADADDR 400000 |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 430 | |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 431 | #define CONFIG_PREBOOT "echo;" \ |
Wolfgang Denk | 1baed66 | 2008-03-03 12:16:44 +0100 | [diff] [blame] | 432 | "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 433 | "echo" |
| 434 | |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 435 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 436 | "netdev=eth0\0" \ |
Wolfgang Denk | 7c37fa8 | 2008-02-14 23:18:01 +0100 | [diff] [blame] | 437 | "hostname=tqm834x\0" \ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 438 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ |
Wolfgang Denk | 86eb3b7 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 439 | "nfsroot=${serverip}:${rootpath}\0" \ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 440 | "ramargs=setenv bootargs root=/dev/ram rw\0" \ |
Wolfgang Denk | 86eb3b7 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 441 | "addip=setenv bootargs ${bootargs} " \ |
| 442 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ |
| 443 | ":${hostname}:${netdev}:off panic=1\0" \ |
Joe Hershberger | 13fccc0 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 444 | "addcons=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ |
Wolfgang Denk | 9559357 | 2009-05-14 23:18:34 +0200 | [diff] [blame] | 445 | "flash_nfs_old=run nfsargs addip addcons;" \ |
Wolfgang Denk | 86eb3b7 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 446 | "bootm ${kernel_addr}\0" \ |
Wolfgang Denk | 9559357 | 2009-05-14 23:18:34 +0200 | [diff] [blame] | 447 | "flash_nfs=run nfsargs addip addcons;" \ |
| 448 | "bootm ${kernel_addr} - ${fdt_addr}\0" \ |
| 449 | "flash_self_old=run ramargs addip addcons;" \ |
Wolfgang Denk | 86eb3b7 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 450 | "bootm ${kernel_addr} ${ramdisk_addr}\0" \ |
Wolfgang Denk | 9559357 | 2009-05-14 23:18:34 +0200 | [diff] [blame] | 451 | "flash_self=run ramargs addip addcons;" \ |
| 452 | "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ |
| 453 | "net_nfs_old=tftp 400000 ${bootfile};" \ |
| 454 | "run nfsargs addip addcons;bootm\0" \ |
| 455 | "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ |
| 456 | "tftp ${fdt_addr_r} ${fdt_file}; " \ |
| 457 | "run nfsargs addip addcons; " \ |
| 458 | "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 459 | "rootpath=/opt/eldk/ppc_6xx\0" \ |
Wolfgang Denk | 9559357 | 2009-05-14 23:18:34 +0200 | [diff] [blame] | 460 | "bootfile=tqm834x/uImage\0" \ |
| 461 | "fdtfile=tqm834x/tqm834x.dtb\0" \ |
| 462 | "kernel_addr_r=400000\0" \ |
| 463 | "fdt_addr_r=600000\0" \ |
| 464 | "ramdisk_addr_r=800000\0" \ |
| 465 | "kernel_addr=800C0000\0" \ |
| 466 | "fdt_addr=800A0000\0" \ |
| 467 | "ramdisk_addr=80300000\0" \ |
| 468 | "u-boot=tqm834x/u-boot.bin\0" \ |
| 469 | "load=tftp 200000 ${u-boot}\0" \ |
| 470 | "update=protect off 80000000 +${filesize};" \ |
| 471 | "era 80000000 +${filesize};" \ |
| 472 | "cp.b 200000 80000000 ${filesize}\0" \ |
Detlev Zundel | 406e578 | 2008-03-06 16:45:53 +0100 | [diff] [blame] | 473 | "upd=run load update\0" \ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 474 | "" |
| 475 | |
| 476 | #define CONFIG_BOOTCOMMAND "run flash_self" |
| 477 | |
| 478 | /* |
| 479 | * JFFS2 partitions |
| 480 | */ |
| 481 | /* mtdparts command line support */ |
Stefan Roese | 5dc958f | 2009-05-12 14:32:58 +0200 | [diff] [blame] | 482 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ |
| 483 | #define CONFIG_FLASH_CFI_MTD |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 484 | |
| 485 | /* default mtd partition table */ |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 486 | #endif /* __CONFIG_H */ |