| Álvaro Fernández Rojas | 75d4cf2 | 2018-01-20 14:16:55 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <dt-bindings/clock/bcm6368-clock.h> |
| 8 | #include <dt-bindings/gpio/gpio.h> |
| 9 | #include <dt-bindings/reset/bcm6368-reset.h> |
| 10 | #include "skeleton.dtsi" |
| 11 | |
| 12 | / { |
| 13 | compatible = "brcm,bcm6368"; |
| 14 | |
| 15 | aliases { |
| 16 | spi0 = &spi; |
| 17 | }; |
| 18 | |
| 19 | cpus { |
| 20 | reg = <0x10000000 0x4>; |
| 21 | #address-cells = <1>; |
| 22 | #size-cells = <0>; |
| 23 | u-boot,dm-pre-reloc; |
| 24 | |
| 25 | cpu@0 { |
| 26 | compatible = "brcm,bcm6368-cpu", "mips,mips4Kc"; |
| 27 | device_type = "cpu"; |
| 28 | reg = <0>; |
| 29 | u-boot,dm-pre-reloc; |
| 30 | }; |
| 31 | |
| 32 | cpu@1 { |
| 33 | compatible = "brcm,bcm6368-cpu", "mips,mips4Kc"; |
| 34 | device_type = "cpu"; |
| 35 | reg = <1>; |
| 36 | u-boot,dm-pre-reloc; |
| 37 | }; |
| 38 | }; |
| 39 | |
| 40 | clocks { |
| 41 | compatible = "simple-bus"; |
| 42 | #address-cells = <1>; |
| 43 | #size-cells = <1>; |
| 44 | u-boot,dm-pre-reloc; |
| 45 | |
| 46 | periph_osc: periph-osc { |
| 47 | compatible = "fixed-clock"; |
| 48 | #clock-cells = <0>; |
| 49 | clock-frequency = <50000000>; |
| 50 | u-boot,dm-pre-reloc; |
| 51 | }; |
| 52 | |
| 53 | periph_clk: periph-clk { |
| 54 | compatible = "brcm,bcm6345-clk"; |
| 55 | reg = <0x10000004 0x4>; |
| 56 | #clock-cells = <1>; |
| 57 | }; |
| 58 | }; |
| 59 | |
| 60 | pflash: nor@18000000 { |
| 61 | compatible = "cfi-flash"; |
| 62 | reg = <0x18000000 0x2000000>; |
| 63 | bank-width = <2>; |
| 64 | #address-cells = <1>; |
| 65 | #size-cells = <1>; |
| 66 | |
| 67 | status = "disabled"; |
| 68 | }; |
| 69 | |
| 70 | ubus { |
| 71 | compatible = "simple-bus"; |
| 72 | #address-cells = <1>; |
| 73 | #size-cells = <1>; |
| 74 | u-boot,dm-pre-reloc; |
| 75 | |
| 76 | pll_cntl: syscon@10000008 { |
| 77 | compatible = "syscon"; |
| 78 | reg = <0x10000008 0x4>; |
| 79 | }; |
| 80 | |
| 81 | syscon-reboot { |
| 82 | compatible = "syscon-reboot"; |
| 83 | regmap = <&pll_cntl>; |
| 84 | offset = <0x0>; |
| 85 | mask = <0x1>; |
| 86 | }; |
| 87 | |
| 88 | periph_rst: reset-controller@10000010 { |
| 89 | compatible = "brcm,bcm6345-reset"; |
| 90 | reg = <0x10000010 0x4>; |
| 91 | #reset-cells = <1>; |
| 92 | }; |
| 93 | |
| 94 | wdt: watchdog@1000005c { |
| 95 | compatible = "brcm,bcm6345-wdt"; |
| 96 | reg = <0x1000005c 0xc>; |
| 97 | clocks = <&periph_osc>; |
| 98 | }; |
| 99 | |
| 100 | wdt-reboot { |
| 101 | compatible = "wdt-reboot"; |
| 102 | wdt = <&wdt>; |
| 103 | }; |
| 104 | |
| 105 | gpio1: gpio-controller@10000080 { |
| 106 | compatible = "brcm,bcm6345-gpio"; |
| 107 | reg = <0x10000080 0x4>, <0x10000088 0x4>; |
| 108 | gpio-controller; |
| 109 | #gpio-cells = <2>; |
| 110 | ngpios = <6>; |
| 111 | |
| 112 | status = "disabled"; |
| 113 | }; |
| 114 | |
| 115 | gpio0: gpio-controller@10000084 { |
| 116 | compatible = "brcm,bcm6345-gpio"; |
| 117 | reg = <0x10000084 0x4>, <0x1000008c 0x4>; |
| 118 | gpio-controller; |
| 119 | #gpio-cells = <2>; |
| 120 | |
| 121 | status = "disabled"; |
| 122 | }; |
| 123 | |
| 124 | leds: led-controller@100000d0 { |
| 125 | compatible = "brcm,bcm6358-leds"; |
| 126 | reg = <0x100000d0 0x8>; |
| 127 | #address-cells = <1>; |
| 128 | #size-cells = <0>; |
| 129 | |
| 130 | status = "disabled"; |
| 131 | }; |
| 132 | |
| 133 | uart0: serial@10000100 { |
| 134 | compatible = "brcm,bcm6345-uart"; |
| 135 | reg = <0x10000100 0x18>; |
| 136 | clocks = <&periph_osc>; |
| 137 | |
| 138 | status = "disabled"; |
| 139 | }; |
| 140 | |
| 141 | uart1: serial@10000120 { |
| 142 | compatible = "brcm,bcm6345-uart"; |
| 143 | reg = <0x10000120 0x18>; |
| 144 | clocks = <&periph_osc>; |
| 145 | |
| 146 | status = "disabled"; |
| 147 | }; |
| 148 | |
| 149 | spi: spi@10000800 { |
| 150 | compatible = "brcm,bcm6358-spi"; |
| 151 | reg = <0x10000800 0x70c>; |
| 152 | #address-cells = <1>; |
| 153 | #size-cells = <0>; |
| 154 | clocks = <&periph_clk BCM6368_CLK_SPI>; |
| 155 | resets = <&periph_rst BCM6368_RST_SPI>; |
| 156 | spi-max-frequency = <20000000>; |
| 157 | num-cs = <6>; |
| 158 | |
| 159 | status = "disabled"; |
| 160 | }; |
| 161 | |
| 162 | memory-controller@10001200 { |
| 163 | compatible = "brcm,bcm6358-mc"; |
| 164 | reg = <0x10001200 0x4c>; |
| 165 | u-boot,dm-pre-reloc; |
| 166 | }; |
| 167 | }; |
| 168 | }; |