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git01.mediatek.com / filogic / uboot / 8de5f8201d6676e446b33a0e49d80fb34d1272e4 / . / arch / arm / dts / logicpd-torpedo-baseboard.dtsi
blob: 642e809e757a150e29e284533521d9a0bbfdaa32 [file] [log] [blame]
Adam Ford8de5f822019-07-15 14:07:52 -0500[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0-only
Adam Forda2ab7eb2018-07-09 20:18:14 -0500[diff] [blame]2
3/ {
4 gpio_keys {
5 compatible = "gpio-keys";
6 pinctrl-names = "default";
7 pinctrl-0 = <&gpio_key_pins &gpio_key_pins_wkup>;
8
9 sysboot2 {
10 label = "sysboot2";
11 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; /* gpio2 */
12 linux,code = <BTN_0>;
13 wakeup-source;
14 };
15
16 sysboot5 {
17 label = "sysboot5";
18 gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; /* gpio7 */
19 linux,code = <BTN_1>;
20 wakeup-source;
21 };
22
23 gpio1 {
24 label = "gpio1";
25 gpios = <&gpio6 21 GPIO_ACTIVE_LOW>; /* gpio181 */
26 linux,code = <BTN_2>;
27 wakeup-source;
28 };
29
30 gpio2 {
31 label = "gpio2";
32 gpios = <&gpio6 18 GPIO_ACTIVE_LOW>; /* gpio178 */
33 linux,code = <BTN_3>;
34 wakeup-source;
35 };
36 };
37
38 sound {
39 compatible = "ti,omap-twl4030";
40 ti,model = "omap3logic";
41 ti,mcbsp = <&mcbsp2>;
42 };
43
44 leds {
45 compatible = "gpio-leds";
46 pinctrl-names = "default";
47 pinctrl-0 = <&led_pins>;
48
49 led1 {
50 label = "led1";
51 gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>; /* gpio180 */
52 linux,default-trigger = "cpu0";
53 };
54
55 led2 {
56 label = "led2";
57 gpios = <&gpio6 19 GPIO_ACTIVE_HIGH>; /* gpio179 */
58 linux,default-trigger = "none";
59 };
60 };
61
62 pwm10: dmtimer-pwm {
63 compatible = "ti,omap-dmtimer-pwm";
64 pinctrl-names = "default";
65 pinctrl-0 = <&pwm_pins>;
66 ti,timers = <&timer10>;
67 #pwm-cells = <3>;
68 };
69
70};
71
72&vaux1 {
73 regulator-min-microvolt = <3000000>;
74 regulator-max-microvolt = <3000000>;
75};
76
77&vaux4 {
78 regulator-min-microvolt = <1800000>;
79 regulator-max-microvolt = <1800000>;
80};
81
82&mcbsp2 {
83 status = "okay";
84};
85
86&charger {
87 ti,bb-uvolt = <3200000>;
88 ti,bb-uamp = <150>;
89};
90
91&gpmc {
92 ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */
93 1 0 0x2c000000 0x1000000>; /* CS1: 16MB for LAN9221 */
94
95 ethernet@gpmc {
96 pinctrl-names = "default";
97 pinctrl-0 = <&lan9221_pins>;
98 interrupt-parent = <&gpio5>;
99 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; /* gpio129 */
100 reg = <1 0 0xff>;
101 };
102};
103
104&vpll2 {
105 regulator-always-on;
106};
107
108&dss {
109 status = "ok";
110 vdds_dsi-supply = <&vpll2>;
111 vdda_video-supply = <&video_reg>;
112 pinctrl-names = "default";
113 pinctrl-0 = <&dss_dpi_pins1>;
114 port {
115 dpi_out: endpoint {
116 remote-endpoint = <&lcd_in>;
117 data-lines = <16>;
118 };
119 };
120};
121
122/ {
123 aliases {
124 display0 = &lcd0;
125 };
126
127 video_reg: video_reg {
128 pinctrl-names = "default";
129 pinctrl-0 = <&panel_pwr_pins>;
130 compatible = "regulator-fixed";
131 regulator-name = "fixed-supply";
132 regulator-min-microvolt = <3300000>;
133 regulator-max-microvolt = <3300000>;
134 gpio = <&gpio5 27 GPIO_ACTIVE_HIGH>; /* gpio155, lcd INI */
135 };
136
137 lcd0: display {
138 compatible = "panel-dpi";
139 label = "15";
140 status = "okay";
141 /* default-on; */
142 pinctrl-names = "default";
143
144 port {
145 lcd_in: endpoint {
146 remote-endpoint = <&dpi_out>;
147 };
148 };
149
150 panel-timing {
151 clock-frequency = <9000000>;
152 hactive = <480>;
153 vactive = <272>;
154 hfront-porch = <3>;
155 hback-porch = <2>;
156 hsync-len = <42>;
157 vback-porch = <3>;
158 vfront-porch = <4>;
159 vsync-len = <11>;
160 hsync-active = <0>;
161 vsync-active = <0>;
162 de-active = <1>;
163 pixelclk-active = <1>;
164 };
165 };
166
167 bl: backlight {
168 compatible = "pwm-backlight";
169 pinctrl-names = "default";
170 pinctrl-0 = <&backlight_pins>;
171 pwms = <&pwm10 0 5000000 0>;
172 brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
173 default-brightness-level = <7>;
174 enable-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>; /* gpio_154 */
175 };
176};
177
178&mmc1 {
179 interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
180 pinctrl-names = "default";
181 pinctrl-0 = <&mmc1_pins &mmc1_cd>;
182 cd-gpios = <&gpio4 31 GPIO_ACTIVE_LOW>; /* gpio127 */
183 vmmc-supply = <&vmmc1>;
184 bus-width = <4>;
185 cap-power-off-card;
186};
187
188&omap3_pmx_core {
189 gpio_key_pins: pinmux_gpio_key_pins {
190 pinctrl-single,pins = <
191 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLUP | MUX_MODE4) /* mcspi2_clk.gpio_178 */
192 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLUP | MUX_MODE4) /* mcspi2_cs0.gpio_181 */
193 >;
194 };
195
196 pwm_pins: pinmux_pwm_pins {
197 pinctrl-single,pins = <
198 OMAP3_CORE1_IOPAD(0x20B8, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* gpmc_ncs5.gpt_10_pwm_evt */
199 >;
200 };
201
202 led_pins: pinmux_led_pins {
203 pinctrl-single,pins = <
204 OMAP3_CORE1_IOPAD(0x21d8, PIN_OUTPUT | MUX_MODE4) /* gpio_179 */
205 OMAP3_CORE1_IOPAD(0x21da, PIN_OUTPUT | MUX_MODE4) /* gpio_180 */
206 >;
207 };
208
209 mmc1_pins: pinmux_mmc1_pins {
210 pinctrl-single,pins = <
211 OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
212 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
213 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
214 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
215 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
216 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
217 >;
218 };
219
220 tsc2004_pins: pinmux_tsc2004_pins {
221 pinctrl-single,pins = <
222 OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4) /* mcbsp4_dr.gpio_153 */
223 >;
224 };
225
226 backlight_pins: pinmux_backlight_pins {
227 pinctrl-single,pins = <
228 OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4) /* mcbsp4_dx.gpio_154 */
229 >;
230 };
231
232 isp_pins: pinmux_isp_pins {
233 pinctrl-single,pins = <
234 OMAP3_CORE1_IOPAD(0x210c, PIN_INPUT | MUX_MODE0) /* cam_hs.cam_hs */
235 OMAP3_CORE1_IOPAD(0x210e, PIN_INPUT | MUX_MODE0) /* cam_vs.cam_vs */
236 OMAP3_CORE1_IOPAD(0x2110, PIN_INPUT | MUX_MODE0) /* cam_xclka.cam_xclka */
237 OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT | MUX_MODE0) /* cam_pclk.cam_pclk */
238
239 OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT | MUX_MODE0) /* cam_d0.cam_d0 */
240 OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT | MUX_MODE0) /* cam_d1.cam_d1 */
241 OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT | MUX_MODE0) /* cam_d2.cam_d2 */
242 OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT | MUX_MODE0) /* cam_d3.cam_d3 */
243 OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT | MUX_MODE0) /* cam_d4.cam_d4 */
244 OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT | MUX_MODE0) /* cam_d5.cam_d5 */
245 OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0) /* cam_d6.cam_d6 */
246 OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0) /* cam_d7.cam_d7 */
247 >;
248 };
249
250 panel_pwr_pins: pinmux_panel_pwr_pins {
251 pinctrl-single,pins = <
252 OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4) /* mcbsp4_fs.gpio_155 */
253 >;
254 };
255
256 dss_dpi_pins1: pinmux_dss_dpi_pins1 {
257 pinctrl-single,pins = <
258 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_pclk.dss_pclk */
259 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_hsync.dss_hsync */
260 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_vsync.dss_vsync */
261 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_acbias.dss_acbias */
262
263 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data6.dss_data6 */
264 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data7.dss_data7 */
265 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data8.dss_data8 */
266 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data9.dss_data9 */
267 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data10.dss_data10 */
268 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data11.dss_data11 */
269 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data12.dss_data12 */
270 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data13.dss_data13 */
271 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data14.dss_data14 */
272 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data15.dss_data15 */
273 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data16.dss_data16 */
274 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data17.dss_data17 */
275
276 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data18.dss_data0 */
277 OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data19.dss_data1 */
278 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data20.dss_data2 */
279 OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data21.dss_data3 */
280 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data22.dss_data4 */
281 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data23.dss_data5 */
282 >;
283 };
284};
285
286&omap3_pmx_wkup {
287 gpio_key_pins_wkup: pinmux_gpio_key_pins_wkup {
288 pinctrl-single,pins = <
289 OMAP3_WKUP_IOPAD(0x2a0a, PIN_INPUT_PULLUP | MUX_MODE4) /* sys_boot0.gpio_2 */
290 OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT_PULLUP | MUX_MODE4) /* sys_boot5.gpio_7 */
291 >;
292 };
293
294 lan9221_pins: pinmux_lan9221_pins {
295 pinctrl-single,pins = <
296 OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4) /* reserved.gpio_129 */
297 >;
298 };
299
300 mmc1_cd: pinmux_mmc1_cd {
301 pinctrl-single,pins = <
302 OMAP3_WKUP_IOPAD(0x2a54, PIN_INPUT_PULLUP | MUX_MODE4) /* reserved.gpio_127 */
303 >;
304 };
305};
306
307&i2c2 {
308 mt9p031@48 {
309 compatible = "aptina,mt9p031";
310 reg = <0x48>;
311 clocks = <&isp 0>;
312 vaa-supply = <&vaux4>;
313 vdd-supply = <&vaux4>;
314 vdd_io-supply = <&vaux4>;
315 port {
316 mt9p031_out: endpoint {
317 input-clock-frequency = <24000000>;
318 pixel-clock-frequency = <72000000>;
319 remote-endpoint = <&ccdc_ep>;
320 };
321 };
322 };
323};
324
325&i2c3 {
326 touchscreen: tsc2004@48 {
327 compatible = "ti,tsc2004";
328 reg = <0x48>;
329 vio-supply = <&vaux1>;
330 pinctrl-names = "default";
331 pinctrl-0 = <&tsc2004_pins>;
332 interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_RISING>; /* gpio 153 */
333
334 touchscreen-fuzz-x = <4>;
335 touchscreen-fuzz-y = <7>;
336 touchscreen-fuzz-pressure = <2>;
337 touchscreen-size-x = <4096>;
338 touchscreen-size-y = <4096>;
339 touchscreen-max-pressure = <2048>;
340
341 ti,x-plate-ohms = <280>;
342 ti,esd-recovery-timeout-ms = <8000>;
343 };
344};
345
346&mcspi1 {
347 at25@0 {
348 compatible = "atmel,at25";
349 reg = <0>;
350 spi-max-frequency = <5000000>;
351 spi-cpha;
352 spi-cpol;
353
354 pagesize = <64>;
355 size = <32768>;
356 address-width = <16>;
357 };
358};
359
360&isp {
361 pinctrl-names = "default";
362 pinctrl-0 = <&isp_pins>;
363 ports {
364 port@0 {
365 reg = <0>;
366 ccdc_ep: endpoint {
367 remote-endpoint = <&mt9p031_out>;
368 bus-width = <8>;
369 hsync-active = <1>;
370 vsync-active = <1>;
371 pclk-sample = <0>;
372 };
373 };
374 };
375};
376
377&uart1 {
378 interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
379};
380
381/* Wired to the tps65950 on the SOM, only the USB connector is on the devkit */
382&usb_otg_hs {
383 pinctrl-names = "default";
384 pinctrl-0 = <&hsusb_otg_pins>;
385 interface-type = <0>;
386 usb-phy = <&usb2_phy>;
387 phys = <&usb2_phy>;
388 phy-names = "usb2-phy";
389 mode = <3>;
390 power = <50>;
391};