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git01.mediatek.com / filogic / uboot / 8dda587e1f6779497bd8c38e77c2665dd09644ee / . / arch / x86 / lib / fsp / fsp_car.S
blob: fbe8aef540cf856e80bd012f4d7dca32cce3bf7b [file] [log] [blame]
Bin Meng08e484c2014-12-17 15:50:36 +0800[diff] [blame]1/*
2 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <config.h>
8#include <asm/post.h>
9
10.globl car_init
11car_init:
12 /*
13 * Note: ebp holds the BIST value (built-in self test) so far, but ebp
14 * will be destroyed through the FSP call, thus we have to test the
15 * BIST value here before we call into FSP.
16 */
17 test %ebp, %ebp
18 jz car_init_start
19 post_code(POST_BIST_FAILURE)
20 jmp die
21
22car_init_start:
23 post_code(POST_CAR_START)
24 lea find_fsp_header_romstack, %esp
25 jmp find_fsp_header
26
27find_fsp_header_ret:
28 /* EAX points to FSP_INFO_HEADER */
29 mov %eax, %ebp
30
31 /* sanity test */
Bin Meng293f4972014-12-17 15:50:42 +0800[diff] [blame]32 cmp $CONFIG_FSP_ADDR, %eax
Bin Meng08e484c2014-12-17 15:50:36 +0800[diff] [blame]33 jb die
34
35 /* calculate TempRamInitEntry address */
36 mov 0x30(%ebp), %eax
37 add 0x1c(%ebp), %eax
38
39 /* call FSP TempRamInitEntry to setup temporary stack */
40 lea temp_ram_init_romstack, %esp
41 jmp *%eax
42
43temp_ram_init_ret:
44 addl $4, %esp
45 cmp $0, %eax
46 jnz car_init_fail
47
48 post_code(POST_CAR_CPU_CACHE)
49
50 /*
51 * The FSP TempRamInit initializes the ecx and edx registers to
52 * point to a temporary but writable memory range (Cache-As-RAM).
53 * ecx: the start of this temporary memory range,
54 * edx: the end of this range.
55 */
56
57 /* stack grows down from top of CAR */
58 movl %edx, %esp
Bin Mengd560c5c2015-06-07 11:33:14 +0800[diff] [blame]59 subl $4, %esp
Bin Meng08e484c2014-12-17 15:50:36 +0800[diff] [blame]60
Bin Mengd560c5c2015-06-07 11:33:14 +0800[diff] [blame]61 xor %esi, %esi
62 jmp car_init_done
Bin Meng08e484c2014-12-17 15:50:36 +0800[diff] [blame]63
64.global fsp_init_done
65fsp_init_done:
66 /*
Bin Meng73574dc2015-08-20 06:40:20 -0700[diff] [blame]67 * We come here from fsp_continue() with eax pointing to the HOB list.
Bin Meng08e484c2014-12-17 15:50:36 +0800[diff] [blame]68 * Save eax to esi temporarily.
69 */
70 movl %eax, %esi
Bin Mengd560c5c2015-06-07 11:33:14 +0800[diff] [blame]71
72car_init_done:
Bin Meng08e484c2014-12-17 15:50:36 +0800[diff] [blame]73 /*
74 * Re-initialize the ebp (BIST) to zero, as we already reach here
75 * which means we passed BIST testing before.
76 */
77 xorl %ebp, %ebp
78 jmp car_init_ret
79
80car_init_fail:
81 post_code(POST_CAR_FAILURE)
82
83die:
84 hlt
85 jmp die
86 hlt
87
88 /*
89 * The function call before CAR initialization is tricky. It cannot
90 * be called using the 'call' instruction but only the 'jmp' with
91 * the help of a handcrafted stack in the ROM. The stack needs to
92 * contain the function return address as well as the parameters.
93 */
94 .balign 4
95find_fsp_header_romstack:
96 .long find_fsp_header_ret
97
98 .balign 4
99temp_ram_init_romstack:
100 .long temp_ram_init_ret
101 .long temp_ram_init_params
102temp_ram_init_params:
Simon Glass8bfe0662014-12-17 15:50:37 +0800[diff] [blame]103_dt_ucode_base_size:
104 /* These next two fields are filled in by ifdtool */
Simon Glass8dda5872016-03-11 22:07:11 -0700[diff] [blame^]105.globl ucode_base
106ucode_base: /* Declared in micrcode.h */
Simon Glass8bfe0662014-12-17 15:50:37 +0800[diff] [blame]107 .long 0 /* microcode base */
108 .long 0 /* microcode size */
Bin Meng08e484c2014-12-17 15:50:36 +0800[diff] [blame]109 .long CONFIG_SYS_MONITOR_BASE /* code region base */
110 .long CONFIG_SYS_MONITOR_LEN /* code region size */