Etienne Carriere | 78928e1 | 2020-09-09 18:44:04 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2019-2020 Linaro Limited |
| 4 | */ |
Patrick Delaunay | 1285f8e | 2021-10-28 19:13:13 +0200 | [diff] [blame] | 5 | |
| 6 | #define LOG_CATEGORY UCLASS_CLK |
| 7 | |
Etienne Carriere | 78928e1 | 2020-09-09 18:44:04 +0200 | [diff] [blame] | 8 | #include <common.h> |
| 9 | #include <clk-uclass.h> |
| 10 | #include <dm.h> |
| 11 | #include <scmi_agent.h> |
| 12 | #include <scmi_protocols.h> |
| 13 | #include <asm/types.h> |
Etienne Carriere | 4c4ec90 | 2022-02-21 09:22:42 +0100 | [diff] [blame] | 14 | #include <linux/clk-provider.h> |
| 15 | |
| 16 | static int scmi_clk_get_num_clock(struct udevice *dev, size_t *num_clocks) |
| 17 | { |
| 18 | struct scmi_clk_protocol_attr_out out; |
| 19 | struct scmi_msg msg = { |
| 20 | .protocol_id = SCMI_PROTOCOL_ID_CLOCK, |
| 21 | .message_id = SCMI_PROTOCOL_ATTRIBUTES, |
| 22 | .out_msg = (u8 *)&out, |
| 23 | .out_msg_sz = sizeof(out), |
| 24 | }; |
| 25 | int ret; |
| 26 | |
| 27 | ret = devm_scmi_process_msg(dev, &msg); |
| 28 | if (ret) |
| 29 | return ret; |
| 30 | |
| 31 | *num_clocks = out.attributes & SCMI_CLK_PROTO_ATTR_COUNT_MASK; |
| 32 | |
| 33 | return 0; |
| 34 | } |
| 35 | |
| 36 | static int scmi_clk_get_attibute(struct udevice *dev, int clkid, char **name) |
| 37 | { |
| 38 | struct scmi_clk_attribute_in in = { |
| 39 | .clock_id = clkid, |
| 40 | }; |
| 41 | struct scmi_clk_attribute_out out; |
| 42 | struct scmi_msg msg = { |
| 43 | .protocol_id = SCMI_PROTOCOL_ID_CLOCK, |
| 44 | .message_id = SCMI_CLOCK_ATTRIBUTES, |
| 45 | .in_msg = (u8 *)&in, |
| 46 | .in_msg_sz = sizeof(in), |
| 47 | .out_msg = (u8 *)&out, |
| 48 | .out_msg_sz = sizeof(out), |
| 49 | }; |
| 50 | int ret; |
| 51 | |
| 52 | ret = devm_scmi_process_msg(dev, &msg); |
| 53 | if (ret) |
| 54 | return ret; |
| 55 | |
Heinrich Schuchardt | ba9c892 | 2022-04-26 23:26:31 +0200 | [diff] [blame] | 56 | *name = strdup(out.clock_name); |
Etienne Carriere | 4c4ec90 | 2022-02-21 09:22:42 +0100 | [diff] [blame] | 57 | |
| 58 | return 0; |
| 59 | } |
Etienne Carriere | 78928e1 | 2020-09-09 18:44:04 +0200 | [diff] [blame] | 60 | |
| 61 | static int scmi_clk_gate(struct clk *clk, int enable) |
| 62 | { |
| 63 | struct scmi_clk_state_in in = { |
| 64 | .clock_id = clk->id, |
| 65 | .attributes = enable, |
| 66 | }; |
| 67 | struct scmi_clk_state_out out; |
| 68 | struct scmi_msg msg = SCMI_MSG_IN(SCMI_PROTOCOL_ID_CLOCK, |
| 69 | SCMI_CLOCK_CONFIG_SET, |
| 70 | in, out); |
| 71 | int ret; |
| 72 | |
Etienne Carriere | 2f26c04 | 2022-02-21 09:22:40 +0100 | [diff] [blame] | 73 | ret = devm_scmi_process_msg(clk->dev, &msg); |
Etienne Carriere | 78928e1 | 2020-09-09 18:44:04 +0200 | [diff] [blame] | 74 | if (ret) |
| 75 | return ret; |
| 76 | |
| 77 | return scmi_to_linux_errno(out.status); |
| 78 | } |
| 79 | |
| 80 | static int scmi_clk_enable(struct clk *clk) |
| 81 | { |
| 82 | return scmi_clk_gate(clk, 1); |
| 83 | } |
| 84 | |
| 85 | static int scmi_clk_disable(struct clk *clk) |
| 86 | { |
| 87 | return scmi_clk_gate(clk, 0); |
| 88 | } |
| 89 | |
| 90 | static ulong scmi_clk_get_rate(struct clk *clk) |
| 91 | { |
| 92 | struct scmi_clk_rate_get_in in = { |
| 93 | .clock_id = clk->id, |
| 94 | }; |
| 95 | struct scmi_clk_rate_get_out out; |
| 96 | struct scmi_msg msg = SCMI_MSG_IN(SCMI_PROTOCOL_ID_CLOCK, |
| 97 | SCMI_CLOCK_RATE_GET, |
| 98 | in, out); |
| 99 | int ret; |
| 100 | |
Etienne Carriere | 2f26c04 | 2022-02-21 09:22:40 +0100 | [diff] [blame] | 101 | ret = devm_scmi_process_msg(clk->dev, &msg); |
Etienne Carriere | 78928e1 | 2020-09-09 18:44:04 +0200 | [diff] [blame] | 102 | if (ret < 0) |
| 103 | return ret; |
| 104 | |
| 105 | ret = scmi_to_linux_errno(out.status); |
| 106 | if (ret < 0) |
| 107 | return ret; |
| 108 | |
| 109 | return (ulong)(((u64)out.rate_msb << 32) | out.rate_lsb); |
| 110 | } |
| 111 | |
| 112 | static ulong scmi_clk_set_rate(struct clk *clk, ulong rate) |
| 113 | { |
| 114 | struct scmi_clk_rate_set_in in = { |
| 115 | .clock_id = clk->id, |
| 116 | .flags = SCMI_CLK_RATE_ROUND_CLOSEST, |
| 117 | .rate_lsb = (u32)rate, |
| 118 | .rate_msb = (u32)((u64)rate >> 32), |
| 119 | }; |
| 120 | struct scmi_clk_rate_set_out out; |
| 121 | struct scmi_msg msg = SCMI_MSG_IN(SCMI_PROTOCOL_ID_CLOCK, |
| 122 | SCMI_CLOCK_RATE_SET, |
| 123 | in, out); |
| 124 | int ret; |
| 125 | |
Etienne Carriere | 2f26c04 | 2022-02-21 09:22:40 +0100 | [diff] [blame] | 126 | ret = devm_scmi_process_msg(clk->dev, &msg); |
Etienne Carriere | 78928e1 | 2020-09-09 18:44:04 +0200 | [diff] [blame] | 127 | if (ret < 0) |
| 128 | return ret; |
| 129 | |
| 130 | ret = scmi_to_linux_errno(out.status); |
| 131 | if (ret < 0) |
| 132 | return ret; |
| 133 | |
| 134 | return scmi_clk_get_rate(clk); |
| 135 | } |
| 136 | |
Etienne Carriere | 4c4ec90 | 2022-02-21 09:22:42 +0100 | [diff] [blame] | 137 | static int scmi_clk_probe(struct udevice *dev) |
| 138 | { |
| 139 | struct clk *clk; |
| 140 | size_t num_clocks, i; |
| 141 | int ret; |
| 142 | |
| 143 | if (!CONFIG_IS_ENABLED(CLK_CCF)) |
| 144 | return 0; |
| 145 | |
| 146 | /* register CCF children: CLK UCLASS, no probed again */ |
| 147 | if (device_get_uclass_id(dev->parent) == UCLASS_CLK) |
| 148 | return 0; |
| 149 | |
| 150 | ret = scmi_clk_get_num_clock(dev, &num_clocks); |
| 151 | if (ret) |
| 152 | return ret; |
| 153 | |
| 154 | for (i = 0; i < num_clocks; i++) { |
Heinrich Schuchardt | ba9c892 | 2022-04-26 23:26:31 +0200 | [diff] [blame] | 155 | char *clock_name; |
Etienne Carriere | 4c4ec90 | 2022-02-21 09:22:42 +0100 | [diff] [blame] | 156 | |
Heinrich Schuchardt | ba9c892 | 2022-04-26 23:26:31 +0200 | [diff] [blame] | 157 | if (!scmi_clk_get_attibute(dev, i, &clock_name)) { |
Etienne Carriere | 4c4ec90 | 2022-02-21 09:22:42 +0100 | [diff] [blame] | 158 | clk = kzalloc(sizeof(*clk), GFP_KERNEL); |
| 159 | if (!clk || !clock_name) |
| 160 | ret = -ENOMEM; |
| 161 | else |
| 162 | ret = clk_register(clk, dev->driver->name, |
| 163 | clock_name, dev->name); |
| 164 | |
| 165 | if (ret) { |
| 166 | free(clk); |
| 167 | free(clock_name); |
| 168 | return ret; |
| 169 | } |
| 170 | |
| 171 | clk_dm(i, clk); |
| 172 | } |
| 173 | } |
| 174 | |
| 175 | return 0; |
| 176 | } |
| 177 | |
Etienne Carriere | 78928e1 | 2020-09-09 18:44:04 +0200 | [diff] [blame] | 178 | static const struct clk_ops scmi_clk_ops = { |
| 179 | .enable = scmi_clk_enable, |
| 180 | .disable = scmi_clk_disable, |
| 181 | .get_rate = scmi_clk_get_rate, |
| 182 | .set_rate = scmi_clk_set_rate, |
| 183 | }; |
| 184 | |
| 185 | U_BOOT_DRIVER(scmi_clock) = { |
| 186 | .name = "scmi_clk", |
| 187 | .id = UCLASS_CLK, |
| 188 | .ops = &scmi_clk_ops, |
Etienne Carriere | 4c4ec90 | 2022-02-21 09:22:42 +0100 | [diff] [blame] | 189 | .probe = &scmi_clk_probe, |
Etienne Carriere | 78928e1 | 2020-09-09 18:44:04 +0200 | [diff] [blame] | 190 | }; |