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Simon Glassb2672ea2020-04-08 16:57:38 -06001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Generic code used to generate ACPI tables
4 *
5 * Copyright 2019 Google LLC
6 */
7
Simon Glasse9629892020-04-08 16:57:39 -06008#include <dm.h>
9#include <cpu.h>
Simon Glass0f2af882020-05-10 11:40:05 -060010#include <log.h>
Simon Glass575a5472020-04-26 09:19:50 -060011#include <mapmem.h>
12#include <tables_csum.h>
Maximilian Bruned7fa54b2024-10-23 15:19:44 +020013#include <serial.h>
Simon Glass90b01272023-04-29 19:21:46 -060014#include <version_string.h>
Simon Glass0e113842020-04-26 09:19:47 -060015#include <acpi/acpi_table.h>
Maximilian Bruned7fa54b2024-10-23 15:19:44 +020016#include <acpi/acpi_device.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060017#include <asm/global_data.h>
Simon Glass0e113842020-04-26 09:19:47 -060018#include <dm/acpi.h>
Simon Glasse9629892020-04-08 16:57:39 -060019
Pali Rohárf0de20e2021-07-10 13:10:01 +020020/*
21 * OEM_REVISION is 32-bit unsigned number. It should be increased only when
22 * changing software version. Therefore it should not depend on build time.
23 * U-Boot calculates it from U-Boot version and represent it in hexadecimal
24 * notation. As U-Boot version is in form year.month set low 8 bits to 0x01
25 * to have valid date. So for U-Boot version 2021.04 OEM_REVISION is set to
26 * value 0x20210401.
27 */
Simon Glass90b01272023-04-29 19:21:46 -060028#define OEM_REVISION ((((version_num / 1000) % 10) << 28) | \
29 (((version_num / 100) % 10) << 24) | \
30 (((version_num / 10) % 10) << 20) | \
31 ((version_num % 10) << 16) | \
32 (((version_num_patch / 10) % 10) << 12) | \
33 ((version_num_patch % 10) << 8) | \
Pali Rohárf0de20e2021-07-10 13:10:01 +020034 0x01)
35
Simon Glasse9629892020-04-08 16:57:39 -060036int acpi_create_dmar(struct acpi_dmar *dmar, enum dmar_flags flags)
37{
38 struct acpi_table_header *header = &dmar->header;
39 struct cpu_info info;
40 struct udevice *cpu;
41 int ret;
42
Michal Suchanekac12a2f2022-10-12 21:57:59 +020043 ret = uclass_first_device_err(UCLASS_CPU, &cpu);
Simon Glasse9629892020-04-08 16:57:39 -060044 if (ret)
45 return log_msg_ret("cpu", ret);
46 ret = cpu_get_info(cpu, &info);
47 if (ret)
48 return log_msg_ret("info", ret);
49 memset((void *)dmar, 0, sizeof(struct acpi_dmar));
50
51 /* Fill out header fields. */
52 acpi_fill_header(&dmar->header, "DMAR");
53 header->length = sizeof(struct acpi_dmar);
54 header->revision = acpi_get_table_revision(ACPITAB_DMAR);
55
56 dmar->host_address_width = info.address_width - 1;
57 dmar->flags = flags;
58
59 return 0;
60}
Simon Glassb2672ea2020-04-08 16:57:38 -060061
62int acpi_get_table_revision(enum acpi_tables table)
63{
64 switch (table) {
65 case ACPITAB_FADT:
66 return ACPI_FADT_REV_ACPI_3_0;
67 case ACPITAB_MADT:
68 return ACPI_MADT_REV_ACPI_3_0;
69 case ACPITAB_MCFG:
70 return ACPI_MCFG_REV_ACPI_3_0;
71 case ACPITAB_TCPA:
72 /* This version and the rest are open-coded */
73 return 2;
74 case ACPITAB_TPM2:
75 return 4;
76 case ACPITAB_SSDT: /* ACPI 3.0 upto 6.3: 2 */
77 return 2;
78 case ACPITAB_SRAT: /* ACPI 2.0: 1, ACPI 3.0: 2, ACPI 4.0 to 6.3: 3 */
79 return 1; /* TODO Should probably be upgraded to 2 */
80 case ACPITAB_DMAR:
81 return 1;
82 case ACPITAB_SLIT: /* ACPI 2.0 upto 6.3: 1 */
83 return 1;
84 case ACPITAB_SPMI: /* IMPI 2.0 */
85 return 5;
86 case ACPITAB_HPET: /* Currently 1. Table added in ACPI 2.0 */
87 return 1;
88 case ACPITAB_VFCT: /* ACPI 2.0/3.0/4.0: 1 */
89 return 1;
90 case ACPITAB_IVRS:
91 return IVRS_FORMAT_FIXED;
92 case ACPITAB_DBG2:
93 return 0;
94 case ACPITAB_FACS: /* ACPI 2.0/3.0: 1, ACPI 4.0 to 6.3: 2 */
95 return 1;
96 case ACPITAB_RSDT: /* ACPI 1.0 upto 6.3: 1 */
97 return 1;
98 case ACPITAB_XSDT: /* ACPI 2.0 upto 6.3: 1 */
99 return 1;
100 case ACPITAB_RSDP: /* ACPI 2.0 upto 6.3: 2 */
101 return 2;
102 case ACPITAB_HEST:
103 return 1;
104 case ACPITAB_NHLT:
105 return 5;
106 case ACPITAB_BERT:
107 return 1;
108 case ACPITAB_SPCR:
109 return 2;
110 default:
111 return -EINVAL;
112 }
113}
Simon Glass17968c32020-04-26 09:19:46 -0600114
115void acpi_fill_header(struct acpi_table_header *header, char *signature)
116{
117 memcpy(header->signature, signature, 4);
118 memcpy(header->oem_id, OEM_ID, 6);
119 memcpy(header->oem_table_id, OEM_TABLE_ID, 8);
Pali Rohárf0de20e2021-07-10 13:10:01 +0200120 header->oem_revision = OEM_REVISION;
Heinrich Schuchardt10de8a82024-01-21 12:52:48 +0100121 memcpy(header->creator_id, ASLC_ID, 4);
Heinrich Schuchardt9838d342024-04-18 05:11:13 +0200122 header->creator_revision = ASL_REVISION;
Simon Glass17968c32020-04-26 09:19:46 -0600123}
Simon Glass0e113842020-04-26 09:19:47 -0600124
125void acpi_align(struct acpi_ctx *ctx)
126{
127 ctx->current = (void *)ALIGN((ulong)ctx->current, 16);
128}
129
130void acpi_align64(struct acpi_ctx *ctx)
131{
132 ctx->current = (void *)ALIGN((ulong)ctx->current, 64);
133}
134
135void acpi_inc(struct acpi_ctx *ctx, uint amount)
136{
137 ctx->current += amount;
138}
139
140void acpi_inc_align(struct acpi_ctx *ctx, uint amount)
141{
142 ctx->current += amount;
143 acpi_align(ctx);
144}
Simon Glass575a5472020-04-26 09:19:50 -0600145
146/**
147 * Add an ACPI table to the RSDT (and XSDT) structure, recalculate length
148 * and checksum.
149 */
150int acpi_add_table(struct acpi_ctx *ctx, void *table)
151{
152 int i, entries_num;
153 struct acpi_rsdt *rsdt;
154 struct acpi_xsdt *xsdt;
155
156 /* The RSDT is mandatory while the XSDT is not */
157 rsdt = ctx->rsdt;
158
159 /* This should always be MAX_ACPI_TABLES */
160 entries_num = ARRAY_SIZE(rsdt->entry);
161
162 for (i = 0; i < entries_num; i++) {
163 if (rsdt->entry[i] == 0)
164 break;
165 }
166
167 if (i >= entries_num) {
168 log_err("ACPI: Error: too many tables\n");
169 return -E2BIG;
170 }
171
172 /* Add table to the RSDT */
Simon Glass919f8352023-12-31 08:25:54 -0700173 rsdt->entry[i] = nomap_to_sysmem(table);
Simon Glass575a5472020-04-26 09:19:50 -0600174
175 /* Fix RSDT length or the kernel will assume invalid entries */
176 rsdt->header.length = sizeof(struct acpi_table_header) +
177 (sizeof(u32) * (i + 1));
178
179 /* Re-calculate checksum */
180 rsdt->header.checksum = 0;
181 rsdt->header.checksum = table_compute_checksum((u8 *)rsdt,
182 rsdt->header.length);
183
184 /*
185 * And now the same thing for the XSDT. We use the same index as for
186 * now we want the XSDT and RSDT to always be in sync in U-Boot
187 */
Simon Glassabeaca82020-04-26 09:19:52 -0600188 xsdt = ctx->xsdt;
Simon Glass575a5472020-04-26 09:19:50 -0600189
190 /* Add table to the XSDT */
Simon Glass919f8352023-12-31 08:25:54 -0700191 xsdt->entry[i] = nomap_to_sysmem(table);
Simon Glass575a5472020-04-26 09:19:50 -0600192
193 /* Fix XSDT length */
194 xsdt->header.length = sizeof(struct acpi_table_header) +
195 (sizeof(u64) * (i + 1));
196
197 /* Re-calculate checksum */
198 xsdt->header.checksum = 0;
199 xsdt->header.checksum = table_compute_checksum((u8 *)xsdt,
200 xsdt->header.length);
201
202 return 0;
203}
Simon Glass9c442a62020-04-26 09:19:51 -0600204
Maximilian Brune8dc45122024-10-23 15:19:45 +0200205int acpi_write_fadt(struct acpi_ctx *ctx, const struct acpi_writer *entry)
206{
207 struct acpi_table_header *header;
208 struct acpi_fadt *fadt;
209
210 fadt = ctx->current;
211 header = &fadt->header;
212
213 memset((void *)fadt, '\0', sizeof(struct acpi_fadt));
214
215 acpi_fill_header(header, "FACP");
216 header->length = sizeof(struct acpi_fadt);
217 header->revision = acpi_get_table_revision(ACPITAB_FADT);
218 memcpy(header->oem_id, OEM_ID, 6);
219 memcpy(header->oem_table_id, OEM_TABLE_ID, 8);
220 memcpy(header->creator_id, ASLC_ID, 4);
221 header->creator_revision = 1;
222
223 fadt->x_firmware_ctrl = map_to_sysmem(ctx->facs);
224 fadt->x_dsdt = map_to_sysmem(ctx->dsdt);
225
226 if (fadt->x_firmware_ctrl < 0x100000000ULL)
227 fadt->firmware_ctrl = fadt->x_firmware_ctrl;
228
229 if (fadt->x_dsdt < 0x100000000ULL)
230 fadt->dsdt = fadt->x_dsdt;
231
232 fadt->preferred_pm_profile = ACPI_PM_UNSPECIFIED;
233
234 acpi_fill_fadt(fadt);
235
236 header->checksum = table_compute_checksum(fadt, header->length);
237
238 return acpi_add_fadt(ctx, fadt);
239}
240
241ACPI_WRITER(5fadt, "FADT", acpi_write_fadt, 0);
242
Simon Glass95971892020-09-22 12:45:10 -0600243void acpi_create_dbg2(struct acpi_dbg2_header *dbg2,
244 int port_type, int port_subtype,
245 struct acpi_gen_regaddr *address, u32 address_size,
246 const char *device_path)
247{
248 uintptr_t current;
249 struct acpi_dbg2_device *device;
250 u32 *dbg2_addr_size;
251 struct acpi_table_header *header;
252 size_t path_len;
253 const char *path;
254 char *namespace;
255
256 /* Fill out header fields. */
257 current = (uintptr_t)dbg2;
258 memset(dbg2, '\0', sizeof(struct acpi_dbg2_header));
259 header = &dbg2->header;
260
261 header->revision = acpi_get_table_revision(ACPITAB_DBG2);
262 acpi_fill_header(header, "DBG2");
Simon Glass95971892020-09-22 12:45:10 -0600263
264 /* One debug device defined */
265 dbg2->devices_offset = sizeof(struct acpi_dbg2_header);
266 dbg2->devices_count = 1;
267 current += sizeof(struct acpi_dbg2_header);
268
269 /* Device comes after the header */
270 device = (struct acpi_dbg2_device *)current;
271 memset(device, 0, sizeof(struct acpi_dbg2_device));
272 current += sizeof(struct acpi_dbg2_device);
273
274 device->revision = 0;
275 device->address_count = 1;
276 device->port_type = port_type;
277 device->port_subtype = port_subtype;
278
279 /* Base Address comes after device structure */
280 memcpy((void *)current, address, sizeof(struct acpi_gen_regaddr));
281 device->base_address_offset = current - (uintptr_t)device;
282 current += sizeof(struct acpi_gen_regaddr);
283
284 /* Address Size comes after address structure */
285 dbg2_addr_size = (uint32_t *)current;
286 device->address_size_offset = current - (uintptr_t)device;
287 *dbg2_addr_size = address_size;
288 current += sizeof(uint32_t);
289
290 /* Namespace string comes last, use '.' if not provided */
291 path = device_path ? : ".";
292 /* Namespace string length includes NULL terminator */
293 path_len = strlen(path) + 1;
294 namespace = (char *)current;
295 device->namespace_string_length = path_len;
296 device->namespace_string_offset = current - (uintptr_t)device;
297 strncpy(namespace, path, path_len);
298 current += path_len;
299
300 /* Update structure lengths and checksum */
301 device->length = current - (uintptr_t)device;
302 header->length = current - (uintptr_t)dbg2;
303 header->checksum = table_compute_checksum(dbg2, header->length);
304}
Maximilian Bruned7fa54b2024-10-23 15:19:44 +0200305
306int acpi_write_dbg2_pci_uart(struct acpi_ctx *ctx, struct udevice *dev,
307 uint access_size)
308{
309 struct acpi_dbg2_header *dbg2 = ctx->current;
310 char path[ACPI_PATH_MAX];
311 struct acpi_gen_regaddr address;
312 u64 addr;
313 int ret;
314
315 if (!device_active(dev)) {
316 log_info("Device not enabled\n");
317 return -EACCES;
318 }
319 /*
320 * PCI devices don't remember their resource allocation information in
321 * U-Boot at present. We assume that MMIO is used for the UART and that
322 * the address space is 32 bytes: ns16550 uses 8 registers of up to
323 * 32-bits each. This is only for debugging so it is not a big deal.
324 */
325 addr = dm_pci_read_bar32(dev, 0);
326 log_debug("UART addr %lx\n", (ulong)addr);
327
328 ret = acpi_device_path(dev, path, sizeof(path));
329 if (ret)
330 return log_msg_ret("path", ret);
331
332 memset(&address, '\0', sizeof(address));
333 address.space_id = ACPI_ADDRESS_SPACE_MEMORY;
334 address.addrl = (uint32_t)addr;
335 address.addrh = (uint32_t)((addr >> 32) & 0xffffffff);
336 address.access_size = access_size;
337
338 ret = acpi_device_path(dev, path, sizeof(path));
339 if (ret)
340 return log_msg_ret("path", ret);
341 acpi_create_dbg2(dbg2, ACPI_DBG2_SERIAL_PORT,
342 ACPI_DBG2_16550_COMPATIBLE, &address, 0x1000, path);
343
344 acpi_inc_align(ctx, dbg2->header.length);
345 acpi_add_table(ctx, dbg2);
346
347 return 0;
348}
349
350static int acpi_write_spcr(struct acpi_ctx *ctx, const struct acpi_writer *entry)
351{
352 struct serial_device_info serial_info = {0};
353 ulong serial_address, serial_offset;
354 struct acpi_table_header *header;
355 struct acpi_spcr *spcr;
356 struct udevice *dev;
357 uint serial_config;
358 uint serial_width;
359 int access_size;
360 int space_id;
361 int ret = -ENODEV;
362
363 spcr = ctx->current;
364 header = &spcr->header;
365
366 memset(spcr, '\0', sizeof(struct acpi_spcr));
367
368 /* Fill out header fields */
369 acpi_fill_header(header, "SPCR");
370 header->length = sizeof(struct acpi_spcr);
371 header->revision = 2;
372
373 /* Read the device once, here. It is reused below */
374 dev = gd->cur_serial_dev;
375 if (dev)
376 ret = serial_getinfo(dev, &serial_info);
377 if (ret)
378 serial_info.type = SERIAL_CHIP_UNKNOWN;
379
380 /* Encode chip type */
381 switch (serial_info.type) {
382 case SERIAL_CHIP_16550_COMPATIBLE:
383 spcr->interface_type = ACPI_DBG2_16550_COMPATIBLE;
384 break;
385 case SERIAL_CHIP_PL01X:
386 spcr->interface_type = ACPI_DBG2_ARM_PL011;
387 break;
388 case SERIAL_CHIP_UNKNOWN:
389 default:
390 spcr->interface_type = ACPI_DBG2_UNKNOWN;
391 break;
392 }
393
394 /* Encode address space */
395 switch (serial_info.addr_space) {
396 case SERIAL_ADDRESS_SPACE_MEMORY:
397 space_id = ACPI_ADDRESS_SPACE_MEMORY;
398 break;
399 case SERIAL_ADDRESS_SPACE_IO:
400 default:
401 space_id = ACPI_ADDRESS_SPACE_IO;
402 break;
403 }
404
405 serial_width = serial_info.reg_width * 8;
406 serial_offset = serial_info.reg_offset << serial_info.reg_shift;
407 serial_address = serial_info.addr + serial_offset;
408
409 /* Encode register access size */
410 switch (serial_info.reg_shift) {
411 case 0:
412 access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
413 break;
414 case 1:
415 access_size = ACPI_ACCESS_SIZE_WORD_ACCESS;
416 break;
417 case 2:
418 access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
419 break;
420 case 3:
421 access_size = ACPI_ACCESS_SIZE_QWORD_ACCESS;
422 break;
423 default:
424 access_size = ACPI_ACCESS_SIZE_UNDEFINED;
425 break;
426 }
427
428 debug("UART type %u @ %lx\n", spcr->interface_type, serial_address);
429
430 /* Fill GAS */
431 spcr->serial_port.space_id = space_id;
432 spcr->serial_port.bit_width = serial_width;
433 spcr->serial_port.bit_offset = 0;
434 spcr->serial_port.access_size = access_size;
435 spcr->serial_port.addrl = lower_32_bits(serial_address);
436 spcr->serial_port.addrh = upper_32_bits(serial_address);
437
438 /* Encode baud rate */
439 switch (serial_info.baudrate) {
440 case 9600:
441 spcr->baud_rate = 3;
442 break;
443 case 19200:
444 spcr->baud_rate = 4;
445 break;
446 case 57600:
447 spcr->baud_rate = 6;
448 break;
449 case 115200:
450 spcr->baud_rate = 7;
451 break;
452 default:
453 spcr->baud_rate = 0;
454 break;
455 }
456
457 serial_config = SERIAL_DEFAULT_CONFIG;
458 if (dev)
459 ret = serial_getconfig(dev, &serial_config);
460
461 spcr->parity = SERIAL_GET_PARITY(serial_config);
462 spcr->stop_bits = SERIAL_GET_STOP(serial_config);
463
464 /* No PCI devices for now */
465 spcr->pci_device_id = 0xffff;
466 spcr->pci_vendor_id = 0xffff;
467
468 /*
469 * SPCR has no clue if the UART base clock speed is different
470 * to the default one. However, the SPCR 1.04 defines baud rate
471 * 0 as a preconfigured state of UART and OS is supposed not
472 * to touch the configuration of the serial device.
473 */
474 if (serial_info.clock != SERIAL_DEFAULT_CLOCK)
475 spcr->baud_rate = 0;
476
477 /* Fix checksum */
478 header->checksum = table_compute_checksum((void *)spcr, header->length);
479
480 acpi_add_table(ctx, spcr);
481 acpi_inc(ctx, spcr->header.length);
482
483 return 0;
484}
485
486ACPI_WRITER(5spcr, "SPCR", acpi_write_spcr, 0);