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Matthias Weisser93416c12011-03-10 21:36:32 +00001/*
2 * linux/arch/arm/lib/memset.S
3 *
4 * Copyright (C) 1995-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * ASM optimised string functions
11 */
Stefan Agnera257f2e2014-12-18 18:10:33 +010012#include <linux/linkage.h>
Matthias Weisser93416c12011-03-10 21:36:32 +000013#include <asm/assembler.h>
14
15 .text
16 .align 5
Matthias Weisser93416c12011-03-10 21:36:32 +000017
Stefan Agnera257f2e2014-12-18 18:10:33 +010018 .syntax unified
Tom Rini1c640a62017-03-18 09:01:44 -040019#if CONFIG_IS_ENABLED(SYS_THUMB_BUILD) && !defined(MEMSET_NO_THUMB_BUILD)
Stefan Agnera257f2e2014-12-18 18:10:33 +010020 .thumb
21 .thumb_func
22#endif
23ENTRY(memset)
Matthias Weisser93416c12011-03-10 21:36:32 +000024 ands r3, r0, #3 @ 1 unaligned?
Stefan Agnera257f2e2014-12-18 18:10:33 +010025 mov ip, r0 @ preserve r0 as return value
26 bne 6f @ 1
Matthias Weisser93416c12011-03-10 21:36:32 +000027/*
Stefan Agnera257f2e2014-12-18 18:10:33 +010028 * we know that the pointer in ip is aligned to a word boundary.
Matthias Weisser93416c12011-03-10 21:36:32 +000029 */
Stefan Agnera257f2e2014-12-18 18:10:33 +0100301: orr r1, r1, r1, lsl #8
Matthias Weisser93416c12011-03-10 21:36:32 +000031 orr r1, r1, r1, lsl #16
32 mov r3, r1
33 cmp r2, #16
34 blt 4f
35
36#if ! CALGN(1)+0
37
38/*
Stefan Agnera257f2e2014-12-18 18:10:33 +010039 * We need 2 extra registers for this loop - use r8 and the LR
Matthias Weisser93416c12011-03-10 21:36:32 +000040 */
Stefan Agnera257f2e2014-12-18 18:10:33 +010041 stmfd sp!, {r8, lr}
42 mov r8, r1
Matthias Weisser93416c12011-03-10 21:36:32 +000043 mov lr, r1
44
452: subs r2, r2, #64
Stefan Agnera257f2e2014-12-18 18:10:33 +010046 stmiage ip!, {r1, r3, r8, lr} @ 64 bytes at a time.
47 stmiage ip!, {r1, r3, r8, lr}
48 stmiage ip!, {r1, r3, r8, lr}
49 stmiage ip!, {r1, r3, r8, lr}
Matthias Weisser93416c12011-03-10 21:36:32 +000050 bgt 2b
Stefan Agnera257f2e2014-12-18 18:10:33 +010051 ldmfdeq sp!, {r8, pc} @ Now <64 bytes to go.
Matthias Weisser93416c12011-03-10 21:36:32 +000052/*
53 * No need to correct the count; we're only testing bits from now on
54 */
55 tst r2, #32
Stefan Agnera257f2e2014-12-18 18:10:33 +010056 stmiane ip!, {r1, r3, r8, lr}
57 stmiane ip!, {r1, r3, r8, lr}
Matthias Weisser93416c12011-03-10 21:36:32 +000058 tst r2, #16
Stefan Agnera257f2e2014-12-18 18:10:33 +010059 stmiane ip!, {r1, r3, r8, lr}
60 ldmfd sp!, {r8, lr}
Matthias Weisser93416c12011-03-10 21:36:32 +000061
62#else
63
64/*
65 * This version aligns the destination pointer in order to write
66 * whole cache lines at once.
67 */
68
Stefan Agnera257f2e2014-12-18 18:10:33 +010069 stmfd sp!, {r4-r8, lr}
Matthias Weisser93416c12011-03-10 21:36:32 +000070 mov r4, r1
71 mov r5, r1
72 mov r6, r1
73 mov r7, r1
Stefan Agnera257f2e2014-12-18 18:10:33 +010074 mov r8, r1
Matthias Weisser93416c12011-03-10 21:36:32 +000075 mov lr, r1
76
77 cmp r2, #96
Stefan Agnera257f2e2014-12-18 18:10:33 +010078 tstgt ip, #31
Matthias Weisser93416c12011-03-10 21:36:32 +000079 ble 3f
80
Stefan Agnera257f2e2014-12-18 18:10:33 +010081 and r8, ip, #31
82 rsb r8, r8, #32
83 sub r2, r2, r8
84 movs r8, r8, lsl #(32 - 4)
85 stmiacs ip!, {r4, r5, r6, r7}
86 stmiami ip!, {r4, r5}
87 tst r8, #(1 << 30)
88 mov r8, r1
89 strne r1, [ip], #4
Matthias Weisser93416c12011-03-10 21:36:32 +000090
913: subs r2, r2, #64
Stefan Agnera257f2e2014-12-18 18:10:33 +010092 stmiage ip!, {r1, r3-r8, lr}
93 stmiage ip!, {r1, r3-r8, lr}
Matthias Weisser93416c12011-03-10 21:36:32 +000094 bgt 3b
Stefan Agnera257f2e2014-12-18 18:10:33 +010095 ldmfdeq sp!, {r4-r8, pc}
Matthias Weisser93416c12011-03-10 21:36:32 +000096
97 tst r2, #32
Stefan Agnera257f2e2014-12-18 18:10:33 +010098 stmiane ip!, {r1, r3-r8, lr}
Matthias Weisser93416c12011-03-10 21:36:32 +000099 tst r2, #16
Stefan Agnera257f2e2014-12-18 18:10:33 +0100100 stmiane ip!, {r4-r7}
101 ldmfd sp!, {r4-r8, lr}
Matthias Weisser93416c12011-03-10 21:36:32 +0000102
103#endif
104
1054: tst r2, #8
Stefan Agnera257f2e2014-12-18 18:10:33 +0100106 stmiane ip!, {r1, r3}
Matthias Weisser93416c12011-03-10 21:36:32 +0000107 tst r2, #4
Stefan Agnera257f2e2014-12-18 18:10:33 +0100108 strne r1, [ip], #4
Matthias Weisser93416c12011-03-10 21:36:32 +0000109/*
110 * When we get here, we've got less than 4 bytes to zero. We
111 * may have an unaligned pointer as well.
112 */
1135: tst r2, #2
Stefan Agnera257f2e2014-12-18 18:10:33 +0100114 strbne r1, [ip], #1
115 strbne r1, [ip], #1
Matthias Weisser93416c12011-03-10 21:36:32 +0000116 tst r2, #1
Stefan Agnera257f2e2014-12-18 18:10:33 +0100117 strbne r1, [ip], #1
118 ret lr
119
1206: subs r2, r2, #4 @ 1 do we have enough
121 blt 5b @ 1 bytes to align with?
122 cmp r3, #2 @ 1
123 strblt r1, [ip], #1 @ 1
124 strble r1, [ip], #1 @ 1
125 strb r1, [ip], #1 @ 1
126 add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
127 b 1b
128ENDPROC(memset)