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git01.mediatek.com / filogic / uboot / 8d2af75145dfba815b05ca94d726421c4a959e3e / . / configs / evb-rk3399_defconfig
blob: 756d6952de1f8aeb18e327e1f742593778212fd1 [file] [log] [blame]
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]3CONFIG_COUNTER_FREQUENCY=24000000
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]4CONFIG_ARCH_ROCKCHIP=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]5CONFIG_NR_DRAM_BANKS=1
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]6CONFIG_SF_DEFAULT_SPEED=20000000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]7CONFIG_ENV_OFFSET=0x3F8000
Jonas Karlman219b41a2024-05-04 19:42:57 +0000[diff] [blame]8CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-evb"
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]9CONFIG_DM_RESET=y
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]10CONFIG_ROCKCHIP_RK3399=y
Kever Yang1b662092020-02-19 17:51:07 +0800[diff] [blame]11CONFIG_TARGET_EVB_RK3399=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]12CONFIG_DEBUG_UART_BASE=0xFF1A0000
13CONFIG_DEBUG_UART_CLOCK=24000000
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]14CONFIG_SYS_LOAD_ADDR=0x800800
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]15CONFIG_DEBUG_UART=y
Klaus Goger2b6b4f22018-05-25 23:45:05 +0200[diff] [blame]16CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-evb.dtb"
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]17CONFIG_DISPLAY_BOARDINFO_LATE=y
Jonas Karlmanf764fe52024-05-01 16:22:28 +0000[diff] [blame]18CONFIG_SPL_MAX_SIZE=0x40000
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]19CONFIG_SPL_PAD_TO=0x7f8000
Kever Yang20673542019-08-20 11:47:02 +0800[diff] [blame]20# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Quentin Schulz95edee72023-06-21 18:02:52 +0200[diff] [blame]21CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
Kever Yangb5aba0d2018-11-09 11:21:38 +0800[diff] [blame]22CONFIG_TPL=y
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]23CONFIG_CMD_BOOTZ=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]24CONFIG_CMD_GPT=y
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]25CONFIG_CMD_MMC=y
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]26CONFIG_CMD_USB=y
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]27# CONFIG_CMD_SETEXPR is not set
28CONFIG_CMD_TIME=y
Kever Yang16efdfd2017-02-22 16:56:38 +0800[diff] [blame]29CONFIG_SPL_OF_CONTROL=y
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]30CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]31CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]32CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]33CONFIG_ROCKCHIP_GPIO=y
Tom Rini79f4eea2017-05-01 11:41:11 -0400[diff] [blame]34CONFIG_SYS_I2C_ROCKCHIP=y
Yifeng Zhaod631e232021-06-29 16:24:43 +0800[diff] [blame]35CONFIG_MMC_HS400_SUPPORT=y
Masahiro Yamada7942e912017-01-10 13:32:04 +0900[diff] [blame]36CONFIG_MMC_DW=y
Kever Yangb8c40882020-08-11 14:47:01 +0800[diff] [blame]37CONFIG_MMC_DW_ROCKCHIP=y
Masahiro Yamada7db8c172016-12-07 22:10:28 +0900[diff] [blame]38CONFIG_MMC_SDHCI=y
Yifeng Zhaod631e232021-06-29 16:24:43 +0800[diff] [blame]39CONFIG_MMC_SDHCI_SDMA=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]40CONFIG_MMC_SDHCI_ROCKCHIP=y
Jonas Karlmanf764fe52024-05-01 16:22:28 +0000[diff] [blame]41CONFIG_PHY_REALTEK=y
42CONFIG_DM_ETH_PHY=y
Kever Yang92830982017-05-01 16:16:01 -0600[diff] [blame]43CONFIG_ETH_DESIGNWARE=y
Kever Yang92830982017-05-01 16:16:01 -0600[diff] [blame]44CONFIG_GMAC_ROCKCHIP=y
Frank Wang3c71bfc2020-05-26 11:35:15 +0800[diff] [blame]45CONFIG_PHY_ROCKCHIP_INNO_USB2=y
46CONFIG_PHY_ROCKCHIP_TYPEC=y
Jacob Chen614704b2017-05-02 14:54:52 +0800[diff] [blame]47CONFIG_PMIC_RK8XX=y
Kever Yangbbdbec72016-09-23 15:57:23 +0800[diff] [blame]48CONFIG_REGULATOR_PWM=y
Jacob Chen614704b2017-05-02 14:54:52 +0800[diff] [blame]49CONFIG_REGULATOR_RK8XX=y
Masahiro Yamada74f09b82016-12-07 22:10:25 +0900[diff] [blame]50CONFIG_PWM_ROCKCHIP=y
Philipp Tomsich29c8bc02017-03-17 20:34:53 +0100[diff] [blame]51CONFIG_BAUDRATE=1500000
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]52CONFIG_DEBUG_UART_SHIFT=2
Tom Rinidc172ee2022-12-04 09:39:03 -0500[diff] [blame]53CONFIG_SYS_NS16550_MEM32=y
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]54CONFIG_SYSRESET=y
MengDongyang0a8ea092016-08-24 12:02:19 +0800[diff] [blame]55CONFIG_USB=y
MengDongyang0a8ea092016-08-24 12:02:19 +0800[diff] [blame]56CONFIG_USB_XHCI_HCD=y
MengDongyang0a8ea092016-08-24 12:02:19 +0800[diff] [blame]57CONFIG_USB_EHCI_HCD=y
58CONFIG_USB_EHCI_GENERIC=y
Frank Wang3c71bfc2020-05-26 11:35:15 +0800[diff] [blame]59CONFIG_USB_DWC3=y
60CONFIG_USB_DWC3_GENERIC=y
Chris Packham547cf412017-08-28 20:50:45 +1200[diff] [blame]61CONFIG_USB_HOST_ETHER=y
Chris Packhamb110e112017-08-28 20:50:46 +1200[diff] [blame]62CONFIG_USB_ETHER_ASIX=y
63CONFIG_USB_ETHER_ASIX88179=y
64CONFIG_USB_ETHER_MCS7830=y
65CONFIG_USB_ETHER_RTL8152=y
66CONFIG_USB_ETHER_SMSC95XX=y
Simon Glass52cb5042022-10-18 07:46:31 -0600[diff] [blame]67CONFIG_VIDEO=y
Anatolij Gustschindba36702020-02-04 22:43:06 +0100[diff] [blame]68# CONFIG_VIDEO_BPP8 is not set
Eric Gao1bec3f22017-05-02 18:23:57 +0800[diff] [blame]69CONFIG_DISPLAY=y
70CONFIG_VIDEO_ROCKCHIP=y
eric.gao@rock-chips.com64ee9f62017-06-21 11:20:32 +0800[diff] [blame]71CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
Eric Gao1bec3f22017-05-02 18:23:57 +0800[diff] [blame]72CONFIG_DISPLAY_ROCKCHIP_MIPI=y
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]73CONFIG_ERRNO_STR=y