Wolfgang Denk | 97caf67 | 2006-03-12 02:12:27 +0100 | [diff] [blame] | 1 | /* |
| 2 | * cdefBF532.h |
| 3 | * |
| 4 | * This file is subject to the terms and conditions of the GNU Public |
| 5 | * License. See the file "COPYING" in the main directory of this archive |
| 6 | * for more details. |
| 7 | * |
| 8 | * Non-GPL License also available as part of VisualDSP++ |
| 9 | * |
| 10 | * http://www.analog.com/processors/resources/crosscore/visualDspDevSoftware.html |
| 11 | * |
| 12 | * (c) Copyright 2001-2005 Analog Devices, Inc. All rights reserved |
| 13 | * |
| 14 | * This file under source code control, please send bugs or changes to: |
| 15 | * dsptools.support@analog.com |
| 16 | * |
| 17 | */ |
| 18 | |
| 19 | #ifndef _CDEF_BF532_H |
| 20 | #define _CDEF_BF532_H |
| 21 | |
| 22 | /* |
| 23 | * #if !defined(__ADSPLPBLACKFIN__) |
| 24 | * #warning cdefBF532.h should only be included for 532 compatible chips. |
| 25 | * #endif |
| 26 | */ |
| 27 | |
| 28 | /* include all Core registers and bit definitions */ |
Aubrey.Li | 9da597f | 2007-03-09 13:38:44 +0800 | [diff] [blame] | 29 | #include <asm/arch-bf533/defBF532.h> |
Wolfgang Denk | 97caf67 | 2006-03-12 02:12:27 +0100 | [diff] [blame] | 30 | |
| 31 | /* include core specific register pointer definitions */ |
Aubrey.Li | 9da597f | 2007-03-09 13:38:44 +0800 | [diff] [blame] | 32 | #include <asm/arch-common/cdef_LPBlackfin.h> |
Wolfgang Denk | 97caf67 | 2006-03-12 02:12:27 +0100 | [diff] [blame] | 33 | |
| 34 | /* Clock and System Control (0xFFC0 0400-0xFFC0 07FF) */ |
| 35 | #define pPLL_CTL ((volatile unsigned short *)PLL_CTL) |
| 36 | #define pPLL_STAT ((volatile unsigned short *)PLL_STAT) |
| 37 | #define pPLL_LOCKCNT ((volatile unsigned short *)PLL_LOCKCNT) |
| 38 | #define pCHIPID ((volatile unsigned long *)CHIPID) |
| 39 | #define pSWRST ((volatile unsigned short *)SWRST) |
| 40 | #define pSYSCR ((volatile unsigned short *)SYSCR) |
| 41 | #define pPLL_DIV ((volatile unsigned short *)PLL_DIV) |
| 42 | #define pVR_CTL ((volatile unsigned short *)VR_CTL) |
| 43 | |
| 44 | /* System Interrupt Controller (0xFFC0 0C00-0xFFC0 0FFF) */ |
| 45 | #define pSIC_IAR0 ((volatile unsigned long *)SIC_IAR0) |
| 46 | #define pSIC_IAR1 ((volatile unsigned long *)SIC_IAR1) |
| 47 | #define pSIC_IAR2 ((volatile unsigned long *)SIC_IAR2) |
| 48 | #define pSIC_IAR3 ((volatile unsigned long *)SIC_IAR3) |
| 49 | #define pSIC_IMASK ((volatile unsigned long *)SIC_IMASK) |
| 50 | #define pSIC_ISR ((volatile unsigned long *)SIC_ISR) |
| 51 | #define pSIC_IWR ((volatile unsigned long *)SIC_IWR) |
| 52 | |
| 53 | /* Watchdog Timer (0xFFC0 1000-0xFFC0 13FF) */ |
| 54 | #define pWDOG_CTL ((volatile unsigned short *)WDOG_CTL) |
| 55 | #define pWDOG_CNT ((volatile unsigned long *)WDOG_CNT) |
| 56 | #define pWDOG_STAT ((volatile unsigned long *)WDOG_STAT) |
| 57 | |
| 58 | /* Real Time Clock (0xFFC0 1400-0xFFC0 17FF) */ |
| 59 | #define pRTC_STAT ((volatile unsigned long *)RTC_STAT) |
| 60 | #define pRTC_ICTL ((volatile unsigned short *)RTC_ICTL) |
| 61 | #define pRTC_ISTAT ((volatile unsigned short *)RTC_ISTAT) |
| 62 | #define pRTC_SWCNT ((volatile unsigned short *)RTC_SWCNT) |
| 63 | #define pRTC_ALARM ((volatile unsigned long *)RTC_ALARM) |
| 64 | #define pRTC_FAST ((volatile unsigned short *)RTC_FAST) |
| 65 | #define pRTC_PREN ((volatile unsigned short *)RTC_PREN) |
| 66 | |
| 67 | /* General Purpose IO (0xFFC0 2400-0xFFC0 27FF) */ |
| 68 | #define pFIO_DIR ((volatile unsigned short *)FIO_DIR) |
| 69 | #define pFIO_FLAG_C ((volatile unsigned short *)FIO_FLAG_C) |
| 70 | #define pFIO_FLAG_S ((volatile unsigned short *)FIO_FLAG_S) |
| 71 | #define pFIO_MASKA_C ((volatile unsigned short *)FIO_MASKA_C) |
| 72 | #define pFIO_MASKA_S ((volatile unsigned short *)FIO_MASKA_S) |
| 73 | #define pFIO_MASKB_C ((volatile unsigned short *)FIO_MASKB_C) |
| 74 | #define pFIO_MASKB_S ((volatile unsigned short *)FIO_MASKB_S) |
| 75 | #define pFIO_POLAR ((volatile unsigned short *)FIO_POLAR) |
| 76 | #define pFIO_EDGE ((volatile unsigned short *)FIO_EDGE) |
| 77 | #define pFIO_BOTH ((volatile unsigned short *)FIO_BOTH) |
| 78 | #define pFIO_INEN ((volatile unsigned short *)FIO_INEN) |
| 79 | #define pFIO_FLAG_D ((volatile unsigned short *)FIO_FLAG_D) |
| 80 | #define pFIO_FLAG_T ((volatile unsigned short *)FIO_FLAG_T) |
| 81 | #define pFIO_MASKA_D ((volatile unsigned short *)FIO_MASKA_D) |
| 82 | #define pFIO_MASKA_T ((volatile unsigned short *)FIO_MASKA_T) |
| 83 | #define pFIO_MASKB_D ((volatile unsigned short *)FIO_MASKB_D) |
| 84 | #define pFIO_MASKB_T ((volatile unsigned short *)FIO_MASKB_T) |
| 85 | |
| 86 | /* DMA Test Registers */ |
| 87 | #define pDMA_CCOMP ((volatile unsigned long *)DMA_CCOMP) |
| 88 | #define pDMA_ACOMP ((volatile unsigned long *)DMA_ACOMP) |
| 89 | #define pDMA_MISR ((volatile unsigned long *)DMA_MISR) |
| 90 | #define pDMA_TCPER ((volatile unsigned short *)DMA_TCPER) |
| 91 | #define pDMA_TCCNT ((volatile unsigned short *)DMA_TCCNT) |
| 92 | #define pDMA_TMODE ((volatile unsigned short *)DMA_TMODE) |
| 93 | #define pDMA_TMCHAN ((volatile unsigned short *)DMA_TMCHAN) |
| 94 | #define pDMA_TMSTAT ((volatile unsigned short *)DMA_TMSTAT) |
| 95 | #define pDMA_TMBD ((volatile unsigned short *)DMA_TMBD) |
| 96 | #define pDMA_TMM0D ((volatile unsigned short *)DMA_TMM0D) |
| 97 | #define pDMA_TMM1D ((volatile unsigned short *)DMA_TMM1D) |
| 98 | #define pDMA_TMMA ((volatile void **)DMA_TMMA) |
| 99 | |
| 100 | /* DMA Controller */ |
| 101 | #define pDMA0_CONFIG ((volatile unsigned short *)DMA0_CONFIG) |
| 102 | #define pDMA0_NEXT_DESC_PTR ((volatile void **)DMA0_NEXT_DESC_PTR) |
| 103 | #define pDMA0_START_ADDR ((volatile void **)DMA0_START_ADDR) |
| 104 | #define pDMA0_X_COUNT ((volatile unsigned short *)DMA0_X_COUNT) |
| 105 | #define pDMA0_Y_COUNT ((volatile unsigned short *)DMA0_Y_COUNT) |
| 106 | #define pDMA0_X_MODIFY ((volatile signed short *)DMA0_X_MODIFY) |
| 107 | #define pDMA0_Y_MODIFY ((volatile signed short *)DMA0_Y_MODIFY) |
| 108 | #define pDMA0_CURR_DESC_PTR ((volatile void **)DMA0_CURR_DESC_PTR) |
| 109 | #define pDMA0_CURR_ADDR ((volatile void **)DMA0_CURR_ADDR) |
| 110 | #define pDMA0_CURR_X_COUNT ((volatile unsigned short *)DMA0_CURR_X_COUNT) |
| 111 | #define pDMA0_CURR_Y_COUNT ((volatile unsigned short *)DMA0_CURR_Y_COUNT) |
| 112 | #define pDMA0_IRQ_STATUS ((volatile unsigned short *)DMA0_IRQ_STATUS) |
| 113 | #define pDMA0_PERIPHERAL_MAP ((volatile unsigned short *)DMA0_PERIPHERAL_MAP) |
| 114 | |
| 115 | #define pDMA1_CONFIG ((volatile unsigned short *)DMA1_CONFIG) |
| 116 | #define pDMA1_NEXT_DESC_PTR ((volatile void **)DMA1_NEXT_DESC_PTR) |
| 117 | #define pDMA1_START_ADDR ((volatile void **)DMA1_START_ADDR) |
| 118 | #define pDMA1_X_COUNT ((volatile unsigned short *)DMA1_X_COUNT) |
| 119 | #define pDMA1_Y_COUNT ((volatile unsigned short *)DMA1_Y_COUNT) |
| 120 | #define pDMA1_X_MODIFY ((volatile signed short *)DMA1_X_MODIFY) |
| 121 | #define pDMA1_Y_MODIFY ((volatile signed short *)DMA1_Y_MODIFY) |
| 122 | #define pDMA1_CURR_DESC_PTR ((volatile void **)DMA1_CURR_DESC_PTR) |
| 123 | #define pDMA1_CURR_ADDR ((volatile void **)DMA1_CURR_ADDR) |
| 124 | #define pDMA1_CURR_X_COUNT ((volatile unsigned short *)DMA1_CURR_X_COUNT) |
| 125 | #define pDMA1_CURR_Y_COUNT ((volatile unsigned short *)DMA1_CURR_Y_COUNT) |
| 126 | #define pDMA1_IRQ_STATUS ((volatile unsigned short *)DMA1_IRQ_STATUS) |
| 127 | #define pDMA1_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_PERIPHERAL_MAP) |
| 128 | |
| 129 | #define pDMA2_CONFIG ((volatile unsigned short *)DMA2_CONFIG) |
| 130 | #define pDMA2_NEXT_DESC_PTR ((volatile void **)DMA2_NEXT_DESC_PTR) |
| 131 | #define pDMA2_START_ADDR ((volatile void **)DMA2_START_ADDR) |
| 132 | #define pDMA2_X_COUNT ((volatile unsigned short *)DMA2_X_COUNT) |
| 133 | #define pDMA2_Y_COUNT ((volatile unsigned short *)DMA2_Y_COUNT) |
| 134 | #define pDMA2_X_MODIFY ((volatile signed short *)DMA2_X_MODIFY) |
| 135 | #define pDMA2_Y_MODIFY ((volatile signed short *)DMA2_Y_MODIFY) |
| 136 | #define pDMA2_CURR_DESC_PTR ((volatile void **)DMA2_CURR_DESC_PTR) |
| 137 | #define pDMA2_CURR_ADDR ((volatile void **)DMA2_CURR_ADDR) |
| 138 | #define pDMA2_CURR_X_COUNT ((volatile unsigned short *)DMA2_CURR_X_COUNT) |
| 139 | #define pDMA2_CURR_Y_COUNT ((volatile unsigned short *)DMA2_CURR_Y_COUNT) |
| 140 | #define pDMA2_IRQ_STATUS ((volatile unsigned short *)DMA2_IRQ_STATUS) |
| 141 | #define pDMA2_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_PERIPHERAL_MAP) |
| 142 | |
| 143 | #define pDMA3_CONFIG ((volatile unsigned short *)DMA3_CONFIG) |
| 144 | #define pDMA3_NEXT_DESC_PTR ((volatile void **)DMA3_NEXT_DESC_PTR) |
| 145 | #define pDMA3_START_ADDR ((volatile void **)DMA3_START_ADDR) |
| 146 | #define pDMA3_X_COUNT ((volatile unsigned short *)DMA3_X_COUNT) |
| 147 | #define pDMA3_Y_COUNT ((volatile unsigned short *)DMA3_Y_COUNT) |
| 148 | #define pDMA3_X_MODIFY ((volatile signed short *)DMA3_X_MODIFY) |
| 149 | #define pDMA3_Y_MODIFY ((volatile signed short *)DMA3_Y_MODIFY) |
| 150 | #define pDMA3_CURR_DESC_PTR ((volatile void **)DMA3_CURR_DESC_PTR) |
| 151 | #define pDMA3_CURR_ADDR ((volatile void **)DMA3_CURR_ADDR) |
| 152 | #define pDMA3_CURR_X_COUNT ((volatile unsigned short *)DMA3_CURR_X_COUNT) |
| 153 | #define pDMA3_CURR_Y_COUNT ((volatile unsigned short *)DMA3_CURR_Y_COUNT) |
| 154 | #define pDMA3_IRQ_STATUS ((volatile unsigned short *)DMA3_IRQ_STATUS) |
| 155 | #define pDMA3_PERIPHERAL_MAP ((volatile unsigned short *)DMA3_PERIPHERAL_MAP) |
| 156 | |
| 157 | #define pDMA4_CONFIG ((volatile unsigned short *)DMA4_CONFIG) |
| 158 | #define pDMA4_NEXT_DESC_PTR ((volatile void **)DMA4_NEXT_DESC_PTR) |
| 159 | #define pDMA4_START_ADDR ((volatile void **)DMA4_START_ADDR) |
| 160 | #define pDMA4_X_COUNT ((volatile unsigned short *)DMA4_X_COUNT) |
| 161 | #define pDMA4_Y_COUNT ((volatile unsigned short *)DMA4_Y_COUNT) |
| 162 | #define pDMA4_X_MODIFY ((volatile signed short *)DMA4_X_MODIFY) |
| 163 | #define pDMA4_Y_MODIFY ((volatile signed short *)DMA4_Y_MODIFY) |
| 164 | #define pDMA4_CURR_DESC_PTR ((volatile void **)DMA4_CURR_DESC_PTR) |
| 165 | #define pDMA4_CURR_ADDR ((volatile void **)DMA4_CURR_ADDR) |
| 166 | #define pDMA4_CURR_X_COUNT ((volatile unsigned short *)DMA4_CURR_X_COUNT) |
| 167 | #define pDMA4_CURR_Y_COUNT ((volatile unsigned short *)DMA4_CURR_Y_COUNT) |
| 168 | #define pDMA4_IRQ_STATUS ((volatile unsigned short *)DMA4_IRQ_STATUS) |
| 169 | #define pDMA4_PERIPHERAL_MAP ((volatile unsigned short *)DMA4_PERIPHERAL_MAP) |
| 170 | |
| 171 | #define pDMA5_CONFIG ((volatile unsigned short *)DMA5_CONFIG) |
| 172 | #define pDMA5_NEXT_DESC_PTR ((volatile void **)DMA5_NEXT_DESC_PTR) |
| 173 | #define pDMA5_START_ADDR ((volatile void **)DMA5_START_ADDR) |
| 174 | #define pDMA5_X_COUNT ((volatile unsigned short *)DMA5_X_COUNT) |
| 175 | #define pDMA5_Y_COUNT ((volatile unsigned short *)DMA5_Y_COUNT) |
| 176 | #define pDMA5_X_MODIFY ((volatile signed short *)DMA5_X_MODIFY) |
| 177 | #define pDMA5_Y_MODIFY ((volatile signed short *)DMA5_Y_MODIFY) |
| 178 | #define pDMA5_CURR_DESC_PTR ((volatile void **)DMA5_CURR_DESC_PTR) |
| 179 | #define pDMA5_CURR_ADDR ((volatile void **)DMA5_CURR_ADDR) |
| 180 | #define pDMA5_CURR_X_COUNT ((volatile unsigned short *)DMA5_CURR_X_COUNT) |
| 181 | #define pDMA5_CURR_Y_COUNT ((volatile unsigned short *)DMA5_CURR_Y_COUNT) |
| 182 | #define pDMA5_IRQ_STATUS ((volatile unsigned short *)DMA5_IRQ_STATUS) |
| 183 | #define pDMA5_PERIPHERAL_MAP ((volatile unsigned short *)DMA5_PERIPHERAL_MAP) |
| 184 | |
| 185 | #define pDMA6_CONFIG ((volatile unsigned short *)DMA6_CONFIG) |
| 186 | #define pDMA6_NEXT_DESC_PTR ((volatile void **)DMA6_NEXT_DESC_PTR) |
| 187 | #define pDMA6_START_ADDR ((volatile void **)DMA6_START_ADDR) |
| 188 | #define pDMA6_X_COUNT ((volatile unsigned short *)DMA6_X_COUNT) |
| 189 | #define pDMA6_Y_COUNT ((volatile unsigned short *)DMA6_Y_COUNT) |
| 190 | #define pDMA6_X_MODIFY ((volatile signed short *)DMA6_X_MODIFY) |
| 191 | #define pDMA6_Y_MODIFY ((volatile signed short *)DMA6_Y_MODIFY) |
| 192 | #define pDMA6_CURR_DESC_PTR ((volatile void **)DMA6_CURR_DESC_PTR) |
| 193 | #define pDMA6_CURR_ADDR ((volatile void **)DMA6_CURR_ADDR) |
| 194 | #define pDMA6_CURR_X_COUNT ((volatile unsigned short *)DMA6_CURR_X_COUNT) |
| 195 | #define pDMA6_CURR_Y_COUNT ((volatile unsigned short *)DMA6_CURR_Y_COUNT) |
| 196 | #define pDMA6_IRQ_STATUS ((volatile unsigned short *)DMA6_IRQ_STATUS) |
| 197 | #define pDMA6_PERIPHERAL_MAP ((volatile unsigned short *)DMA6_PERIPHERAL_MAP) |
| 198 | |
| 199 | #define pDMA7_CONFIG ((volatile unsigned short *)DMA7_CONFIG) |
| 200 | #define pDMA7_NEXT_DESC_PTR ((volatile void **)DMA7_NEXT_DESC_PTR) |
| 201 | #define pDMA7_START_ADDR ((volatile void **)DMA7_START_ADDR) |
| 202 | #define pDMA7_X_COUNT ((volatile unsigned short *)DMA7_X_COUNT) |
| 203 | #define pDMA7_Y_COUNT ((volatile unsigned short *)DMA7_Y_COUNT) |
| 204 | #define pDMA7_X_MODIFY ((volatile signed short *)DMA7_X_MODIFY) |
| 205 | #define pDMA7_Y_MODIFY ((volatile signed short *)DMA7_Y_MODIFY) |
| 206 | #define pDMA7_CURR_DESC_PTR ((volatile void **)DMA7_CURR_DESC_PTR) |
| 207 | #define pDMA7_CURR_ADDR ((volatile void **)DMA7_CURR_ADDR) |
| 208 | #define pDMA7_CURR_X_COUNT ((volatile unsigned short *)DMA7_CURR_X_COUNT) |
| 209 | #define pDMA7_CURR_Y_COUNT ((volatile unsigned short *)DMA7_CURR_Y_COUNT) |
| 210 | #define pDMA7_IRQ_STATUS ((volatile unsigned short *)DMA7_IRQ_STATUS) |
| 211 | #define pDMA7_PERIPHERAL_MAP ((volatile unsigned short *)DMA7_PERIPHERAL_MAP) |
| 212 | |
| 213 | #define pMDMA_D1_CONFIG ((volatile unsigned short *)MDMA_D1_CONFIG) |
| 214 | #define pMDMA_D1_NEXT_DESC_PTR ((volatile void **)MDMA_D1_NEXT_DESC_PTR) |
| 215 | #define pMDMA_D1_START_ADDR ((volatile void **)MDMA_D1_START_ADDR) |
| 216 | #define pMDMA_D1_X_COUNT ((volatile unsigned short *)MDMA_D1_X_COUNT) |
| 217 | #define pMDMA_D1_Y_COUNT ((volatile unsigned short *)MDMA_D1_Y_COUNT) |
| 218 | #define pMDMA_D1_X_MODIFY ((volatile signed short *)MDMA_D1_X_MODIFY) |
| 219 | #define pMDMA_D1_Y_MODIFY ((volatile signed short *)MDMA_D1_Y_MODIFY) |
| 220 | #define pMDMA_D1_CURR_DESC_PTR ((volatile void **)MDMA_D1_CURR_DESC_PTR) |
| 221 | #define pMDMA_D1_CURR_ADDR ((volatile void **)MDMA_D1_CURR_ADDR) |
| 222 | #define pMDMA_D1_CURR_X_COUNT ((volatile unsigned short *)MDMA_D1_CURR_X_COUNT) |
| 223 | #define pMDMA_D1_CURR_Y_COUNT ((volatile unsigned short *)MDMA_D1_CURR_Y_COUNT) |
| 224 | #define pMDMA_D1_IRQ_STATUS ((volatile unsigned short *)MDMA_D1_IRQ_STATUS) |
| 225 | #define pMDMA_D1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_D1_PERIPHERAL_MAP) |
| 226 | |
| 227 | #define pMDMA_S1_CONFIG ((volatile unsigned short *)MDMA_S1_CONFIG) |
| 228 | #define pMDMA_S1_NEXT_DESC_PTR ((volatile void **)MDMA_S1_NEXT_DESC_PTR) |
| 229 | #define pMDMA_S1_START_ADDR ((volatile void **)MDMA_S1_START_ADDR) |
| 230 | #define pMDMA_S1_X_COUNT ((volatile unsigned short *)MDMA_S1_X_COUNT) |
| 231 | #define pMDMA_S1_Y_COUNT ((volatile unsigned short *)MDMA_S1_Y_COUNT) |
| 232 | #define pMDMA_S1_X_MODIFY ((volatile signed short *)MDMA_S1_X_MODIFY) |
| 233 | #define pMDMA_S1_Y_MODIFY ((volatile signed short *)MDMA_S1_Y_MODIFY) |
| 234 | #define pMDMA_S1_CURR_DESC_PTR ((volatile void **)MDMA_S1_CURR_DESC_PTR) |
| 235 | #define pMDMA_S1_CURR_ADDR ((volatile void **)MDMA_S1_CURR_ADDR) |
| 236 | #define pMDMA_S1_CURR_X_COUNT ((volatile unsigned short *)MDMA_S1_CURR_X_COUNT) |
| 237 | #define pMDMA_S1_CURR_Y_COUNT ((volatile unsigned short *)MDMA_S1_CURR_Y_COUNT) |
| 238 | #define pMDMA_S1_IRQ_STATUS ((volatile unsigned short *)MDMA_S1_IRQ_STATUS) |
| 239 | #define pMDMA_S1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_S1_PERIPHERAL_MAP) |
| 240 | |
| 241 | #define pMDMA_D0_CONFIG ((volatile unsigned short *)MDMA_D0_CONFIG) |
| 242 | #define pMDMA_D0_NEXT_DESC_PTR ((volatile void **)MDMA_D0_NEXT_DESC_PTR) |
| 243 | #define pMDMA_D0_START_ADDR ((volatile void **)MDMA_D0_START_ADDR) |
| 244 | #define pMDMA_D0_X_COUNT ((volatile unsigned short *)MDMA_D0_X_COUNT) |
| 245 | #define pMDMA_D0_Y_COUNT ((volatile unsigned short *)MDMA_D0_Y_COUNT) |
| 246 | #define pMDMA_D0_X_MODIFY ((volatile signed short *)MDMA_D0_X_MODIFY) |
| 247 | #define pMDMA_D0_Y_MODIFY ((volatile signed short *)MDMA_D0_Y_MODIFY) |
| 248 | #define pMDMA_D0_CURR_DESC_PTR ((volatile void **)MDMA_D0_CURR_DESC_PTR) |
| 249 | #define pMDMA_D0_CURR_ADDR ((volatile void **)MDMA_D0_CURR_ADDR) |
| 250 | #define pMDMA_D0_CURR_X_COUNT ((volatile unsigned short *)MDMA_D0_CURR_X_COUNT) |
| 251 | #define pMDMA_D0_CURR_Y_COUNT ((volatile unsigned short *)MDMA_D0_CURR_Y_COUNT) |
| 252 | #define pMDMA_D0_IRQ_STATUS ((volatile unsigned short *)MDMA_D0_IRQ_STATUS) |
| 253 | #define pMDMA_D0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_D0_PERIPHERAL_MAP) |
| 254 | |
| 255 | #define pMDMA_S0_CONFIG ((volatile unsigned short *)MDMA_S0_CONFIG) |
| 256 | #define pMDMA_S0_NEXT_DESC_PTR ((volatile void **)MDMA_S0_NEXT_DESC_PTR) |
| 257 | #define pMDMA_S0_START_ADDR ((volatile void **)MDMA_S0_START_ADDR) |
| 258 | #define pMDMA_S0_X_COUNT ((volatile unsigned short *)MDMA_S0_X_COUNT) |
| 259 | #define pMDMA_S0_Y_COUNT ((volatile unsigned short *)MDMA_S0_Y_COUNT) |
| 260 | #define pMDMA_S0_X_MODIFY ((volatile signed short *)MDMA_S0_X_MODIFY) |
| 261 | #define pMDMA_S0_Y_MODIFY ((volatile signed short *)MDMA_S0_Y_MODIFY) |
| 262 | #define pMDMA_S0_CURR_DESC_PTR ((volatile void **)MDMA_S0_CURR_DESC_PTR) |
| 263 | #define pMDMA_S0_CURR_ADDR ((volatile void **)MDMA_S0_CURR_ADDR) |
| 264 | #define pMDMA_S0_CURR_X_COUNT ((volatile unsigned short *)MDMA_S0_CURR_X_COUNT) |
| 265 | #define pMDMA_S0_CURR_Y_COUNT ((volatile unsigned short *)MDMA_S0_CURR_Y_COUNT) |
| 266 | #define pMDMA_S0_IRQ_STATUS ((volatile unsigned short *)MDMA_S0_IRQ_STATUS) |
| 267 | #define pMDMA_S0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_S0_PERIPHERAL_MAP) |
| 268 | |
| 269 | /* Aysnchronous Memory Controller - External Bus Interface Unit (0xFFC0 3C00-0xFFC0 3FFF) */ |
| 270 | #define pEBIU_AMGCTL ((volatile unsigned short *)EBIU_AMGCTL) |
| 271 | #define pEBIU_AMBCTL0 ((volatile unsigned long *)EBIU_AMBCTL0) |
| 272 | #define pEBIU_AMBCTL1 ((volatile unsigned long *)EBIU_AMBCTL1) |
| 273 | |
| 274 | /* System Bus Interface Unit (0xFFC0 4800-0xFFC0 4FFF) */ |
| 275 | /* #define L1SBAR 0xFFC04840 */ /* L1 SRAM Base Address Register */ |
| 276 | /* #define L1CSR 0xFFC04844 */ /* L1 SRAM Control Initialization Register */ |
| 277 | |
| 278 | /* |
| 279 | * #define pDB_ACOMP ((volatile void **)DB_ACOMP) |
| 280 | * #define pDB_CCOMP ((volatile unsigned long *)DB_CCOMP) |
| 281 | */ |
| 282 | |
| 283 | /* SDRAM Controller External Bus Interface Unit (0xFFC0 4C00-0xFFC0 4FFF) */ |
| 284 | #define pEBIU_SDGCTL ((volatile unsigned long *)EBIU_SDGCTL) |
| 285 | #define pEBIU_SDRRC ((volatile unsigned short *)EBIU_SDRRC) |
| 286 | #define pEBIU_SDSTAT ((volatile unsigned short *)EBIU_SDSTAT) |
| 287 | #define pEBIU_SDBCTL ((volatile unsigned short *)EBIU_SDBCTL) |
| 288 | |
| 289 | /* UART Controller */ |
| 290 | #define pUART_THR ((volatile unsigned short *)UART_THR) |
| 291 | #define pUART_RBR ((volatile unsigned short *)UART_RBR) |
| 292 | #define pUART_DLL ((volatile unsigned short *)UART_DLL) |
| 293 | #define pUART_IER ((volatile unsigned short *)UART_IER) |
| 294 | #define pUART_DLH ((volatile unsigned short *)UART_DLH) |
| 295 | #define pUART_IIR ((volatile unsigned short *)UART_IIR) |
| 296 | #define pUART_LCR ((volatile unsigned short *)UART_LCR) |
| 297 | #define pUART_MCR ((volatile unsigned short *)UART_MCR) |
| 298 | #define pUART_LSR ((volatile unsigned short *)UART_LSR) |
| 299 | |
| 300 | /* |
| 301 | * #define UART_MSR |
| 302 | */ |
| 303 | #define pUART_SCR ((volatile unsigned short *)UART_SCR) |
| 304 | #define pUART_GCTL ((volatile unsigned short *)UART_GCTL) |
| 305 | |
| 306 | /* SPI Controller */ |
| 307 | #define pSPI_CTL ((volatile unsigned short *)SPI_CTL) |
| 308 | #define pSPI_FLG ((volatile unsigned short *)SPI_FLG) |
| 309 | #define pSPI_STAT ((volatile unsigned short *)SPI_STAT) |
| 310 | #define pSPI_TDBR ((volatile unsigned short *)SPI_TDBR) |
| 311 | #define pSPI_RDBR ((volatile unsigned short *)SPI_RDBR) |
| 312 | #define pSPI_BAUD ((volatile unsigned short *)SPI_BAUD) |
| 313 | #define pSPI_SHADOW ((volatile unsigned short *)SPI_SHADOW) |
| 314 | |
| 315 | /* TIMER 0, 1, 2 Registers */ |
| 316 | #define pTIMER0_CONFIG ((volatile unsigned short *)TIMER0_CONFIG) |
| 317 | #define pTIMER0_COUNTER ((volatile unsigned long *)TIMER0_COUNTER) |
| 318 | #define pTIMER0_PERIOD ((volatile unsigned long *)TIMER0_PERIOD) |
| 319 | #define pTIMER0_WIDTH ((volatile unsigned long *)TIMER0_WIDTH) |
| 320 | |
| 321 | #define pTIMER1_CONFIG ((volatile unsigned short *)TIMER1_CONFIG) |
| 322 | #define pTIMER1_COUNTER ((volatile unsigned long *)TIMER1_COUNTER) |
| 323 | #define pTIMER1_PERIOD ((volatile unsigned long *)TIMER1_PERIOD) |
| 324 | #define pTIMER1_WIDTH ((volatile unsigned long *)TIMER1_WIDTH) |
| 325 | |
| 326 | #define pTIMER2_CONFIG ((volatile unsigned short *)TIMER2_CONFIG) |
| 327 | #define pTIMER2_COUNTER ((volatile unsigned long *)TIMER2_COUNTER) |
| 328 | #define pTIMER2_PERIOD ((volatile unsigned long *)TIMER2_PERIOD) |
| 329 | #define pTIMER2_WIDTH ((volatile unsigned long *)TIMER2_WIDTH) |
| 330 | |
| 331 | #define pTIMER_ENABLE ((volatile unsigned short *)TIMER_ENABLE) |
| 332 | #define pTIMER_DISABLE ((volatile unsigned short *)TIMER_DISABLE) |
| 333 | #define pTIMER_STATUS ((volatile unsigned short *)TIMER_STATUS) |
| 334 | |
| 335 | /* SPORT0 Controller */ |
| 336 | #define pSPORT0_TCR1 ((volatile unsigned short *)SPORT0_TCR1) |
| 337 | #define pSPORT0_TCR2 ((volatile unsigned short *)SPORT0_TCR2) |
| 338 | #define pSPORT0_TCLKDIV ((volatile unsigned short *)SPORT0_TCLKDIV) |
| 339 | #define pSPORT0_TFSDIV ((volatile unsigned short *)SPORT0_TFSDIV) |
| 340 | #define pSPORT0_TX ((volatile long *)SPORT0_TX) |
| 341 | #define pSPORT0_RX ((volatile long *)SPORT0_RX) |
| 342 | #define pSPORT0_TX32 ((volatile long *)SPORT0_TX) |
| 343 | #define pSPORT0_RX32 ((volatile long *)SPORT0_RX) |
| 344 | #define pSPORT0_TX16 ((volatile unsigned short *)SPORT0_TX) |
| 345 | #define pSPORT0_RX16 ((volatile unsigned short *)SPORT0_RX) |
| 346 | #define pSPORT0_RCR1 ((volatile unsigned short *)SPORT0_RCR1) |
| 347 | #define pSPORT0_RCR2 ((volatile unsigned short *)SPORT0_RCR2) |
| 348 | #define pSPORT0_RCLKDIV ((volatile unsigned short *)SPORT0_RCLKDIV) |
| 349 | #define pSPORT0_RFSDIV ((volatile unsigned short *)SPORT0_RFSDIV) |
| 350 | #define pSPORT0_STAT ((volatile unsigned short *)SPORT0_STAT) |
| 351 | #define pSPORT0_CHNL ((volatile unsigned short *)SPORT0_CHNL) |
| 352 | #define pSPORT0_MCMC1 ((volatile unsigned short *)SPORT0_MCMC1) |
| 353 | #define pSPORT0_MCMC2 ((volatile unsigned short *)SPORT0_MCMC2) |
| 354 | #define pSPORT0_MTCS0 ((volatile unsigned long *)SPORT0_MTCS0) |
| 355 | #define pSPORT0_MTCS1 ((volatile unsigned long *)SPORT0_MTCS1) |
| 356 | #define pSPORT0_MTCS2 ((volatile unsigned long *)SPORT0_MTCS2) |
| 357 | #define pSPORT0_MTCS3 ((volatile unsigned long *)SPORT0_MTCS3) |
| 358 | #define pSPORT0_MRCS0 ((volatile unsigned long *)SPORT0_MRCS0) |
| 359 | #define pSPORT0_MRCS1 ((volatile unsigned long *)SPORT0_MRCS1) |
| 360 | #define pSPORT0_MRCS2 ((volatile unsigned long *)SPORT0_MRCS2) |
| 361 | #define pSPORT0_MRCS3 ((volatile unsigned long *)SPORT0_MRCS3) |
| 362 | |
| 363 | /* SPORT1 Controller */ |
| 364 | #define pSPORT1_TCR1 ((volatile unsigned short *)SPORT1_TCR1) |
| 365 | #define pSPORT1_TCR2 ((volatile unsigned short *)SPORT1_TCR2) |
| 366 | #define pSPORT1_TCLKDIV ((volatile unsigned short *)SPORT1_TCLKDIV) |
| 367 | #define pSPORT1_TFSDIV ((volatile unsigned short *)SPORT1_TFSDIV) |
| 368 | #define pSPORT1_TX ((volatile long *)SPORT1_TX) |
| 369 | #define pSPORT1_RX ((volatile long *)SPORT1_RX) |
| 370 | #define pSPORT1_TX32 ((volatile long *)SPORT1_TX) |
| 371 | #define pSPORT1_RX32 ((volatile long *)SPORT1_RX) |
| 372 | #define pSPORT1_TX16 ((volatile unsigned short *)SPORT1_TX) |
| 373 | #define pSPORT1_RX16 ((volatile unsigned short *)SPORT1_RX) |
| 374 | #define pSPORT1_RCR1 ((volatile unsigned short *)SPORT1_RCR1) |
| 375 | #define pSPORT1_RCR2 ((volatile unsigned short *)SPORT1_RCR2) |
| 376 | #define pSPORT1_RCLKDIV ((volatile unsigned short *)SPORT1_RCLKDIV) |
| 377 | #define pSPORT1_RFSDIV ((volatile unsigned short *)SPORT1_RFSDIV) |
| 378 | #define pSPORT1_STAT ((volatile unsigned short *)SPORT1_STAT) |
| 379 | #define pSPORT1_CHNL ((volatile unsigned short *)SPORT1_CHNL) |
| 380 | #define pSPORT1_MCMC1 ((volatile unsigned short *)SPORT1_MCMC1) |
| 381 | #define pSPORT1_MCMC2 ((volatile unsigned short *)SPORT1_MCMC2) |
| 382 | #define pSPORT1_MTCS0 ((volatile unsigned long *)SPORT1_MTCS0) |
| 383 | #define pSPORT1_MTCS1 ((volatile unsigned long *)SPORT1_MTCS1) |
| 384 | #define pSPORT1_MTCS2 ((volatile unsigned long *)SPORT1_MTCS2) |
| 385 | #define pSPORT1_MTCS3 ((volatile unsigned long *)SPORT1_MTCS3) |
| 386 | #define pSPORT1_MRCS0 ((volatile unsigned long *)SPORT1_MRCS0) |
| 387 | #define pSPORT1_MRCS1 ((volatile unsigned long *)SPORT1_MRCS1) |
| 388 | #define pSPORT1_MRCS2 ((volatile unsigned long *)SPORT1_MRCS2) |
| 389 | #define pSPORT1_MRCS3 ((volatile unsigned long *)SPORT1_MRCS3) |
| 390 | |
| 391 | /* Parallel Peripheral Interface (PPI) */ |
| 392 | #define pPPI_CONTROL ((volatile unsigned short *)PPI_CONTROL) |
| 393 | #define pPPI_STATUS ((volatile unsigned short *)PPI_STATUS) |
| 394 | #define pPPI_DELAY ((volatile unsigned short *)PPI_DELAY) |
| 395 | #define pPPI_COUNT ((volatile unsigned short *)PPI_COUNT) |
| 396 | #define pPPI_FRAME ((volatile unsigned short *)PPI_FRAME) |
| 397 | |
| 398 | #endif /* _CDEF_BF532_H */ |