blob: c58082c16c3cb8e7348ed52dcd51773c87d5c4bb [file] [log] [blame]
Peter Pandf1859e2018-08-16 17:30:13 +02001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2016-2017 Micron Technology, Inc.
4 *
5 * Authors:
6 * Peter Pan <peterpandong@micron.com>
7 */
8
9#ifndef __UBOOT__
Simon Glass9bc15642020-02-03 07:36:16 -070010#include <malloc.h>
Peter Pandf1859e2018-08-16 17:30:13 +020011#include <linux/device.h>
12#include <linux/kernel.h>
13#endif
Simon Glass4dcacfc2020-05-10 11:40:13 -060014#include <linux/bitops.h>
Peter Pandf1859e2018-08-16 17:30:13 +020015#include <linux/mtd/spinand.h>
16
17#define SPINAND_MFR_MICRON 0x2c
18
19#define MICRON_STATUS_ECC_MASK GENMASK(7, 4)
20#define MICRON_STATUS_ECC_NO_BITFLIPS (0 << 4)
21#define MICRON_STATUS_ECC_1TO3_BITFLIPS (1 << 4)
22#define MICRON_STATUS_ECC_4TO6_BITFLIPS (3 << 4)
23#define MICRON_STATUS_ECC_7TO8_BITFLIPS (5 << 4)
24
25static SPINAND_OP_VARIANTS(read_cache_variants,
26 SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
27 SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
28 SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
29 SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
30 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
31 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
32
33static SPINAND_OP_VARIANTS(write_cache_variants,
34 SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
35 SPINAND_PROG_LOAD(true, 0, NULL, 0));
36
37static SPINAND_OP_VARIANTS(update_cache_variants,
38 SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
39 SPINAND_PROG_LOAD(false, 0, NULL, 0));
40
Shivamurthy Shastricfe77252020-07-07 22:04:08 +020041static int micron_8_ooblayout_ecc(struct mtd_info *mtd, int section,
42 struct mtd_oob_region *region)
Peter Pandf1859e2018-08-16 17:30:13 +020043{
44 if (section)
45 return -ERANGE;
46
Shivamurthy Shastricfe77252020-07-07 22:04:08 +020047 region->offset = mtd->oobsize / 2;
48 region->length = mtd->oobsize / 2;
Peter Pandf1859e2018-08-16 17:30:13 +020049
50 return 0;
51}
52
Shivamurthy Shastricfe77252020-07-07 22:04:08 +020053static int micron_8_ooblayout_free(struct mtd_info *mtd, int section,
54 struct mtd_oob_region *region)
Peter Pandf1859e2018-08-16 17:30:13 +020055{
56 if (section)
57 return -ERANGE;
58
59 /* Reserve 2 bytes for the BBM. */
60 region->offset = 2;
Shivamurthy Shastricfe77252020-07-07 22:04:08 +020061 region->length = (mtd->oobsize / 2) - 2;
Peter Pandf1859e2018-08-16 17:30:13 +020062
63 return 0;
64}
65
Shivamurthy Shastricfe77252020-07-07 22:04:08 +020066static const struct mtd_ooblayout_ops micron_8_ooblayout = {
67 .ecc = micron_8_ooblayout_ecc,
68 .rfree = micron_8_ooblayout_free,
Peter Pandf1859e2018-08-16 17:30:13 +020069};
70
Shivamurthy Shastricfe77252020-07-07 22:04:08 +020071static int micron_8_ecc_get_status(struct spinand_device *spinand,
72 u8 status)
Peter Pandf1859e2018-08-16 17:30:13 +020073{
74 switch (status & MICRON_STATUS_ECC_MASK) {
75 case STATUS_ECC_NO_BITFLIPS:
76 return 0;
77
78 case STATUS_ECC_UNCOR_ERROR:
79 return -EBADMSG;
80
81 case MICRON_STATUS_ECC_1TO3_BITFLIPS:
82 return 3;
83
84 case MICRON_STATUS_ECC_4TO6_BITFLIPS:
85 return 6;
86
87 case MICRON_STATUS_ECC_7TO8_BITFLIPS:
88 return 8;
89
90 default:
91 break;
92 }
93
94 return -EINVAL;
95}
96
97static const struct spinand_info micron_spinand_table[] = {
Shivamurthy Shastria44f6a92020-07-07 22:04:09 +020098 /* M79A 2Gb 3.3V */
Peter Pandf1859e2018-08-16 17:30:13 +020099 SPINAND_INFO("MT29F2G01ABAGD", 0x24,
100 NAND_MEMORG(1, 2048, 128, 64, 2048, 2, 1, 1),
101 NAND_ECCREQ(8, 512),
102 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
103 &write_cache_variants,
104 &update_cache_variants),
105 0,
Shivamurthy Shastricfe77252020-07-07 22:04:08 +0200106 SPINAND_ECCINFO(&micron_8_ooblayout,
107 micron_8_ecc_get_status)),
Shivamurthy Shastri8d06c5b2020-07-07 22:04:10 +0200108 /* M79A 2Gb 1.8V */
109 SPINAND_INFO("MT29F2G01ABBGD", 0x25,
110 NAND_MEMORG(1, 2048, 128, 64, 2048, 2, 1, 1),
111 NAND_ECCREQ(8, 512),
112 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
113 &write_cache_variants,
114 &update_cache_variants),
115 0,
116 SPINAND_ECCINFO(&micron_8_ooblayout,
117 micron_8_ecc_get_status)),
118 /* M78A 1Gb 3.3V */
119 SPINAND_INFO("MT29F1G01ABAFD", 0x14,
120 NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
121 NAND_ECCREQ(8, 512),
122 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
123 &write_cache_variants,
124 &update_cache_variants),
125 0,
126 SPINAND_ECCINFO(&micron_8_ooblayout,
127 micron_8_ecc_get_status)),
128 /* M78A 1Gb 1.8V */
129 SPINAND_INFO("MT29F1G01ABAFD", 0x15,
130 NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
131 NAND_ECCREQ(8, 512),
132 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
133 &write_cache_variants,
134 &update_cache_variants),
135 0,
136 SPINAND_ECCINFO(&micron_8_ooblayout,
137 micron_8_ecc_get_status)),
Peter Pandf1859e2018-08-16 17:30:13 +0200138};
139
140static int micron_spinand_detect(struct spinand_device *spinand)
141{
142 u8 *id = spinand->id.data;
143 int ret;
144
145 /*
146 * Micron SPI NAND read ID need a dummy byte,
147 * so the first byte in raw_id is dummy.
148 */
149 if (id[1] != SPINAND_MFR_MICRON)
150 return 0;
151
152 ret = spinand_match_and_init(spinand, micron_spinand_table,
153 ARRAY_SIZE(micron_spinand_table), id[2]);
154 if (ret)
155 return ret;
156
157 return 1;
158}
159
160static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = {
161 .detect = micron_spinand_detect,
162};
163
164const struct spinand_manufacturer micron_spinand_manufacturer = {
165 .id = SPINAND_MFR_MICRON,
166 .name = "Micron",
167 .ops = &micron_spinand_manuf_ops,
168};