blob: dccfdc3a15dac76d51f22ef4ab39ab16a8069a35 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Patrick Bruennba81b042016-11-04 11:57:02 +01002/*
3 * Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG
4 * Patrick Bruenn <p.bruenn@beckhoff.com>
5 *
6 * Configuration settings for Beckhoff CX9020.
7 *
8 * Based on Freescale's Linux i.MX mx53loco.h file:
9 * Copyright (C) 2010-2011 Freescale Semiconductor.
Patrick Bruennba81b042016-11-04 11:57:02 +010010 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
15#include <asm/arch/imx-regs.h>
16
Tom Rinia17aa192022-12-04 10:04:55 -050017#define CFG_MXC_UART_BASE UART2_BASE
Patrick Bruennba81b042016-11-04 11:57:02 +010018
Patrick Bruennba81b042016-11-04 11:57:02 +010019/* MMC Configs */
Tom Rini376b88a2022-10-28 20:27:13 -040020#define CFG_SYS_FSL_ESDHC_ADDR 0
Patrick Bruennba81b042016-11-04 11:57:02 +010021
Patrick Bruennba81b042016-11-04 11:57:02 +010022/* bootz: zImage/initrd.img support */
Patrick Bruennba81b042016-11-04 11:57:02 +010023
Patrick Bruennba81b042016-11-04 11:57:02 +010024/* USB Configs */
Tom Rinib9796e82022-12-04 10:04:56 -050025#define CFG_MXC_USB_PORT 1
26#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
27#define CFG_MXC_USB_FLAGS 0
Patrick Bruennba81b042016-11-04 11:57:02 +010028
Patrick Bruennba81b042016-11-04 11:57:02 +010029/* Command definition */
Patrick Bruennba81b042016-11-04 11:57:02 +010030
Steffen Dirkwinkelab0ed602019-10-23 07:40:43 +020031#define BOOT_TARGET_DEVICES(func) \
32 func(MMC, mmc, 0) \
33 func(MMC, mmc, 1) \
34 func(USB, usb, 0) \
35 func(PXE, pxe, na)
36
37#include <config_distro_bootcmd.h>
38
Tom Rinic9edebe2022-12-04 10:03:50 -050039#define CFG_EXTRA_ENV_SETTINGS \
Steffen Dirkwinkelab0ed602019-10-23 07:40:43 +020040 "fdt_addr_r=0x75000000\0" \
Patrick Bruenn2ef943e2017-07-11 11:23:21 +020041 "pxefile_addr_r=0x73000000\0" \
Steffen Dirkwinkelab0ed602019-10-23 07:40:43 +020042 "scriptaddr=0x74000000\0" \
43 "ramdisk_addr_r=0x80000000\0" \
44 "kernel_addr_r=0x72000000\0" \
45 "fdt_high=0xffffffff\0" \
Patrick Bruennba81b042016-11-04 11:57:02 +010046 "console=ttymxc1,115200\0" \
Steffen Dirkwinkela2cab662019-10-23 07:40:42 +020047 "stdin=serial\0" \
48 "stdout=serial,vidconsole\0" \
49 "stderr=serial,vidconsole\0" \
Steffen Dirkwinkelab0ed602019-10-23 07:40:43 +020050 "fdtfile=imx53-cx9020.dtb\0" \
51 BOOTENV
Patrick Bruennba81b042016-11-04 11:57:02 +010052
Patrick Bruennba81b042016-11-04 11:57:02 +010053/* Miscellaneous configurable options */
Patrick Bruennba81b042016-11-04 11:57:02 +010054
Patrick Bruennba81b042016-11-04 11:57:02 +010055/* Physical Memory Map */
Patrick Bruennba81b042016-11-04 11:57:02 +010056#define PHYS_SDRAM_1 CSD0_BASE_ADDR
57#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
58#define PHYS_SDRAM_2 CSD1_BASE_ADDR
59#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
60#define PHYS_SDRAM_SIZE (gd->ram_size)
61
Tom Rinibb4dd962022-11-16 13:10:37 -050062#define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
Tom Rini6a5dccc2022-11-16 13:10:41 -050063#define CFG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
64#define CFG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
Patrick Bruennba81b042016-11-04 11:57:02 +010065
Masahiro Yamada8cea9b52017-02-11 22:43:54 +090066/* environment organization */
Patrick Bruennba81b042016-11-04 11:57:02 +010067
Patrick Bruennba81b042016-11-04 11:57:02 +010068#endif /* __CONFIG_H */