blob: 606b1539a776979c6c90fd118ad534fdf29ffeef [file] [log] [blame]
Claudiu Manoilc0566c22021-01-25 14:23:53 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019-2021 NXP
4 */
5
6#include <net/dsa.h>
7#include <dm/lists.h>
8#include <dm/device_compat.h>
9#include <dm/device-internal.h>
10#include <dm/uclass-internal.h>
11#include <linux/bitmap.h>
12#include <miiphy.h>
13
14#define DSA_PORT_CHILD_DRV_NAME "dsa-port"
15
16/* per-device internal state structure */
17struct dsa_priv {
18 struct phy_device *cpu_port_fixed_phy;
19 struct udevice *master_dev;
20 int num_ports;
21 u32 cpu_port;
22 int headroom;
23 int tailroom;
24};
25
26/* external API */
27int dsa_set_tagging(struct udevice *dev, ushort headroom, ushort tailroom)
28{
29 struct dsa_priv *priv;
30
Michael Walle340342a2021-02-24 17:40:41 +010031 if (!dev)
32 return -EINVAL;
Claudiu Manoilc0566c22021-01-25 14:23:53 +020033
34 if (headroom + tailroom > DSA_MAX_OVR)
35 return -EINVAL;
36
37 priv = dev_get_uclass_priv(dev);
38
39 if (headroom > 0)
40 priv->headroom = headroom;
41 if (tailroom > 0)
42 priv->tailroom = tailroom;
43
44 return 0;
45}
46
Vladimir Oltean966809c2021-09-29 18:04:38 +030047ofnode dsa_port_get_ofnode(struct udevice *dev, int port)
48{
49 struct dsa_pdata *pdata = dev_get_uclass_plat(dev);
50 struct dsa_port_pdata *port_pdata;
51 struct udevice *pdev;
52
53 if (port == pdata->cpu_port)
54 return pdata->cpu_port_node;
55
56 for (device_find_first_child(dev, &pdev);
57 pdev;
58 device_find_next_child(&pdev)) {
59 port_pdata = dev_get_parent_plat(pdev);
60 if (port_pdata->index == port)
61 return dev_ofnode(pdev);
62 }
63
64 return ofnode_null();
65}
66
Claudiu Manoilc0566c22021-01-25 14:23:53 +020067/* returns the DSA master Ethernet device */
68struct udevice *dsa_get_master(struct udevice *dev)
69{
Michael Walle340342a2021-02-24 17:40:41 +010070 struct dsa_priv *priv;
Claudiu Manoilc0566c22021-01-25 14:23:53 +020071
Michael Walle340342a2021-02-24 17:40:41 +010072 if (!dev)
Claudiu Manoilc0566c22021-01-25 14:23:53 +020073 return NULL;
74
Michael Walle340342a2021-02-24 17:40:41 +010075 priv = dev_get_uclass_priv(dev);
76
Claudiu Manoilc0566c22021-01-25 14:23:53 +020077 return priv->master_dev;
78}
79
80/*
81 * Start the desired port, the CPU port and the master Eth interface.
82 * TODO: if cascaded we may need to _start ports in other switches too
83 */
84static int dsa_port_start(struct udevice *pdev)
85{
86 struct udevice *dev = dev_get_parent(pdev);
87 struct dsa_priv *priv = dev_get_uclass_priv(dev);
88 struct udevice *master = dsa_get_master(dev);
89 struct dsa_ops *ops = dsa_get_ops(dev);
90 int err;
91
Claudiu Manoilc0566c22021-01-25 14:23:53 +020092 if (ops->port_enable) {
93 struct dsa_port_pdata *port_pdata;
94
95 port_pdata = dev_get_parent_plat(pdev);
96 err = ops->port_enable(dev, port_pdata->index,
97 port_pdata->phy);
98 if (err)
99 return err;
100
101 err = ops->port_enable(dev, priv->cpu_port,
102 priv->cpu_port_fixed_phy);
103 if (err)
104 return err;
105 }
106
107 return eth_get_ops(master)->start(master);
108}
109
110/* Stop the desired port, the CPU port and the master Eth interface */
111static void dsa_port_stop(struct udevice *pdev)
112{
113 struct udevice *dev = dev_get_parent(pdev);
114 struct dsa_priv *priv = dev_get_uclass_priv(dev);
115 struct udevice *master = dsa_get_master(dev);
116 struct dsa_ops *ops = dsa_get_ops(dev);
117
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200118 if (ops->port_disable) {
119 struct dsa_port_pdata *port_pdata;
120
121 port_pdata = dev_get_parent_plat(pdev);
122 ops->port_disable(dev, port_pdata->index, port_pdata->phy);
Vladimir Oltean65ad6122021-09-18 14:49:55 +0300123 ops->port_disable(dev, priv->cpu_port, priv->cpu_port_fixed_phy);
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200124 }
125
Michael Walle284118a2021-02-24 17:40:42 +0100126 eth_get_ops(master)->stop(master);
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200127}
128
129/*
130 * Insert a DSA tag and call master Ethernet send on the resulting packet
131 * We copy the frame to a stack buffer where we have reserved headroom and
132 * tailroom space. Headroom and tailroom are set to 0.
133 */
134static int dsa_port_send(struct udevice *pdev, void *packet, int length)
135{
136 struct udevice *dev = dev_get_parent(pdev);
137 struct dsa_priv *priv = dev_get_uclass_priv(dev);
138 int head = priv->headroom, tail = priv->tailroom;
139 struct udevice *master = dsa_get_master(dev);
140 struct dsa_ops *ops = dsa_get_ops(dev);
141 uchar dsa_packet_tmp[PKTSIZE_ALIGN];
142 struct dsa_port_pdata *port_pdata;
143 int err;
144
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200145 if (length + head + tail > PKTSIZE_ALIGN)
146 return -EINVAL;
147
148 memset(dsa_packet_tmp, 0, head);
149 memset(dsa_packet_tmp + head + length, 0, tail);
150 memcpy(dsa_packet_tmp + head, packet, length);
151 length += head + tail;
152 /* copy back to preserve original buffer alignment */
153 memcpy(packet, dsa_packet_tmp, length);
154
155 port_pdata = dev_get_parent_plat(pdev);
156 err = ops->xmit(dev, port_pdata->index, packet, length);
157 if (err)
158 return err;
159
160 return eth_get_ops(master)->send(master, packet, length);
161}
162
163/* Receive a frame from master Ethernet, process it and pass it on */
164static int dsa_port_recv(struct udevice *pdev, int flags, uchar **packetp)
165{
166 struct udevice *dev = dev_get_parent(pdev);
167 struct dsa_priv *priv = dev_get_uclass_priv(dev);
168 int head = priv->headroom, tail = priv->tailroom;
169 struct udevice *master = dsa_get_master(dev);
170 struct dsa_ops *ops = dsa_get_ops(dev);
171 struct dsa_port_pdata *port_pdata;
172 int length, port_index, err;
173
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200174 length = eth_get_ops(master)->recv(master, flags, packetp);
175 if (length <= 0)
176 return length;
177
178 /*
179 * If we receive frames from a different port or frames that DSA driver
180 * doesn't like we discard them here.
181 * In case of discard we return with no frame and expect to be called
182 * again instead of looping here, so upper layer can deal with timeouts.
183 */
184 port_pdata = dev_get_parent_plat(pdev);
185 err = ops->rcv(dev, &port_index, *packetp, length);
186 if (err || port_index != port_pdata->index || (length <= head + tail)) {
187 if (eth_get_ops(master)->free_pkt)
188 eth_get_ops(master)->free_pkt(master, *packetp, length);
189 return -EAGAIN;
190 }
191
192 /*
193 * We move the pointer over headroom here to avoid a copy. If free_pkt
194 * gets called we move the pointer back before calling master free_pkt.
195 */
196 *packetp += head;
197
198 return length - head - tail;
199}
200
201static int dsa_port_free_pkt(struct udevice *pdev, uchar *packet, int length)
202{
203 struct udevice *dev = dev_get_parent(pdev);
204 struct udevice *master = dsa_get_master(dev);
205 struct dsa_priv *priv;
206
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200207 priv = dev_get_uclass_priv(dev);
208 if (eth_get_ops(master)->free_pkt) {
209 /* return the original pointer and length to master Eth */
210 packet -= priv->headroom;
211 length += priv->headroom - priv->tailroom;
212
213 return eth_get_ops(master)->free_pkt(master, packet, length);
214 }
215
216 return 0;
217}
218
219static int dsa_port_of_to_pdata(struct udevice *pdev)
220{
221 struct dsa_port_pdata *port_pdata;
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200222 struct eth_pdata *eth_pdata;
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200223 const char *label;
224 u32 index;
225 int err;
226
227 if (!pdev)
228 return -ENODEV;
229
230 err = ofnode_read_u32(dev_ofnode(pdev), "reg", &index);
231 if (err)
232 return err;
233
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200234 port_pdata = dev_get_parent_plat(pdev);
235 port_pdata->index = index;
236
237 label = ofnode_read_string(dev_ofnode(pdev), "label");
238 if (label)
Vladimir Olteandce3bc62021-09-27 14:22:03 +0300239 strlcpy(port_pdata->name, label, DSA_PORT_NAME_LENGTH);
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200240
241 eth_pdata = dev_get_plat(pdev);
242 eth_pdata->priv_pdata = port_pdata;
243
244 dev_dbg(pdev, "port %d node %s\n", port_pdata->index,
245 ofnode_get_name(dev_ofnode(pdev)));
246
247 return 0;
248}
249
250static const struct eth_ops dsa_port_ops = {
251 .start = dsa_port_start,
252 .send = dsa_port_send,
253 .recv = dsa_port_recv,
254 .stop = dsa_port_stop,
255 .free_pkt = dsa_port_free_pkt,
256};
257
Vladimir Oltean1d508622021-08-24 15:00:40 +0300258/*
259 * Inherit port's hwaddr from the DSA master, unless the port already has a
260 * unique MAC address specified in the environment.
261 */
262static void dsa_port_set_hwaddr(struct udevice *pdev, struct udevice *master)
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200263{
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200264 struct eth_pdata *eth_pdata, *master_pdata;
265 unsigned char env_enetaddr[ARP_HLEN];
Vladimir Oltean1d508622021-08-24 15:00:40 +0300266
267 eth_env_get_enetaddr_by_index("eth", dev_seq(pdev), env_enetaddr);
268 if (!is_zero_ethaddr(env_enetaddr)) {
269 /* individual port mac addrs require master to be promisc */
270 struct eth_ops *eth_ops = eth_get_ops(master);
271
272 if (eth_ops->set_promisc)
Bin Menge2764742021-11-01 14:15:10 +0800273 eth_ops->set_promisc(master, true);
Vladimir Oltean1d508622021-08-24 15:00:40 +0300274
275 return;
276 }
277
278 master_pdata = dev_get_plat(master);
279 eth_pdata = dev_get_plat(pdev);
280 memcpy(eth_pdata->enetaddr, master_pdata->enetaddr, ARP_HLEN);
281 eth_env_set_enetaddr_by_index("eth", dev_seq(pdev),
282 master_pdata->enetaddr);
283}
284
285static int dsa_port_probe(struct udevice *pdev)
286{
287 struct udevice *dev = dev_get_parent(pdev);
Vladimir Oltean6ef71c662021-08-24 15:00:41 +0300288 struct dsa_ops *ops = dsa_get_ops(dev);
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200289 struct dsa_port_pdata *port_pdata;
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200290 struct udevice *master;
Vladimir Oltean50ddf8b2021-08-24 15:00:39 +0300291 int err;
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200292
293 port_pdata = dev_get_parent_plat(pdev);
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200294
295 port_pdata->phy = dm_eth_phy_connect(pdev);
296 if (!port_pdata->phy)
297 return -ENODEV;
298
Michael Walle322bbc62021-02-24 17:40:39 +0100299 master = dsa_get_master(dev);
300 if (!master)
301 return -ENODEV;
302
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200303 /*
Michael Walle785df8f2021-02-24 17:40:40 +0100304 * Probe the master device. We depend on the master device for proper
305 * operation and we also need it for MAC inheritance below.
Michael Walle284118a2021-02-24 17:40:42 +0100306 *
307 * TODO: we assume the master device is always there and doesn't get
308 * removed during runtime.
Michael Walle785df8f2021-02-24 17:40:40 +0100309 */
Vladimir Oltean50ddf8b2021-08-24 15:00:39 +0300310 err = device_probe(master);
311 if (err)
312 return err;
Michael Walle785df8f2021-02-24 17:40:40 +0100313
Vladimir Oltean1d508622021-08-24 15:00:40 +0300314 dsa_port_set_hwaddr(pdev, master);
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200315
Vladimir Oltean6ef71c662021-08-24 15:00:41 +0300316 if (ops->port_probe) {
317 err = ops->port_probe(dev, port_pdata->index,
318 port_pdata->phy);
319 if (err)
320 return err;
321 }
322
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200323 return 0;
324}
325
326static int dsa_port_remove(struct udevice *pdev)
327{
Vladimir Olteanf232e482021-09-18 14:49:56 +0300328 struct dsa_port_pdata *port_pdata = dev_get_parent_plat(pdev);
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200329
330 port_pdata->phy = NULL;
331
332 return 0;
333}
334
335U_BOOT_DRIVER(dsa_port) = {
336 .name = DSA_PORT_CHILD_DRV_NAME,
337 .id = UCLASS_ETH,
338 .ops = &dsa_port_ops,
339 .probe = dsa_port_probe,
340 .remove = dsa_port_remove,
341 .of_to_plat = dsa_port_of_to_pdata,
342 .plat_auto = sizeof(struct eth_pdata),
343};
344
345/*
346 * This function mostly deals with pulling information out of the device tree
347 * into the pdata structure.
348 * It goes through the list of switch ports, registers an eth device for each
349 * front panel port and identifies the cpu port connected to master eth device.
350 * TODO: support cascaded switches
351 */
352static int dsa_post_bind(struct udevice *dev)
353{
354 struct dsa_pdata *pdata = dev_get_uclass_plat(dev);
355 ofnode node = dev_ofnode(dev), pnode;
356 int i, err, first_err = 0;
357
Michael Walle340342a2021-02-24 17:40:41 +0100358 if (!ofnode_valid(node))
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200359 return -ENODEV;
360
361 pdata->master_node = ofnode_null();
362
363 node = ofnode_find_subnode(node, "ports");
364 if (!ofnode_valid(node))
365 node = ofnode_find_subnode(node, "ethernet-ports");
366 if (!ofnode_valid(node)) {
367 dev_err(dev, "ports node is missing under DSA device!\n");
368 return -EINVAL;
369 }
370
371 pdata->num_ports = ofnode_get_child_count(node);
372 if (pdata->num_ports <= 0 || pdata->num_ports > DSA_MAX_PORTS) {
373 dev_err(dev, "invalid number of ports (%d)\n",
374 pdata->num_ports);
375 return -EINVAL;
376 }
377
378 /* look for the CPU port */
379 ofnode_for_each_subnode(pnode, node) {
380 u32 ethernet;
381
382 if (ofnode_read_u32(pnode, "ethernet", &ethernet))
383 continue;
384
385 pdata->master_node = ofnode_get_by_phandle(ethernet);
386 pdata->cpu_port_node = pnode;
387 break;
388 }
389
390 if (!ofnode_valid(pdata->master_node)) {
391 dev_err(dev, "master eth node missing!\n");
392 return -EINVAL;
393 }
394
395 if (ofnode_read_u32(pnode, "reg", &pdata->cpu_port)) {
396 dev_err(dev, "CPU port node not valid!\n");
397 return -EINVAL;
398 }
399
400 dev_dbg(dev, "master node %s on port %d\n",
401 ofnode_get_name(pdata->master_node), pdata->cpu_port);
402
403 for (i = 0; i < pdata->num_ports; i++) {
404 char name[DSA_PORT_NAME_LENGTH];
405 struct udevice *pdev;
406
407 /*
408 * If this is the CPU port don't register it as an ETH device,
409 * we skip it on purpose since I/O to/from it from the CPU
410 * isn't useful.
411 */
412 if (i == pdata->cpu_port)
413 continue;
414
415 /*
416 * Set up default port names. If present, DT port labels
417 * will override the default port names.
418 */
419 snprintf(name, DSA_PORT_NAME_LENGTH, "%s@%d", dev->name, i);
420
421 ofnode_for_each_subnode(pnode, node) {
422 u32 reg;
423
424 if (ofnode_read_u32(pnode, "reg", &reg))
425 continue;
426
427 if (reg == i)
428 break;
429 }
430
431 /*
432 * skip registration if port id not found or if the port
433 * is explicitly disabled in DT
434 */
435 if (!ofnode_valid(pnode) || !ofnode_is_available(pnode))
436 continue;
437
438 err = device_bind_driver_to_node(dev, DSA_PORT_CHILD_DRV_NAME,
439 name, pnode, &pdev);
440 if (pdev) {
441 struct dsa_port_pdata *port_pdata;
442
443 port_pdata = dev_get_parent_plat(pdev);
Vladimir Olteandce3bc62021-09-27 14:22:03 +0300444 strlcpy(port_pdata->name, name, DSA_PORT_NAME_LENGTH);
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200445 pdev->name = port_pdata->name;
446 }
447
448 /* try to bind all ports but keep 1st error */
449 if (err && !first_err)
450 first_err = err;
451 }
452
453 if (first_err)
454 return first_err;
455
456 dev_dbg(dev, "DSA ports successfully bound\n");
457
458 return 0;
459}
460
461/**
462 * Initialize the uclass per device internal state structure (priv).
463 * TODO: pick up references to other switch devices here, if we're cascaded.
464 */
465static int dsa_pre_probe(struct udevice *dev)
466{
467 struct dsa_pdata *pdata = dev_get_uclass_plat(dev);
468 struct dsa_priv *priv = dev_get_uclass_priv(dev);
469
Claudiu Manoilc0566c22021-01-25 14:23:53 +0200470 priv->num_ports = pdata->num_ports;
471 priv->cpu_port = pdata->cpu_port;
472 priv->cpu_port_fixed_phy = fixed_phy_create(pdata->cpu_port_node);
473 if (!priv->cpu_port_fixed_phy) {
474 dev_err(dev, "Failed to register fixed-link for CPU port\n");
475 return -ENODEV;
476 }
477
478 uclass_find_device_by_ofnode(UCLASS_ETH, pdata->master_node,
479 &priv->master_dev);
480 return 0;
481}
482
483UCLASS_DRIVER(dsa) = {
484 .id = UCLASS_DSA,
485 .name = "dsa",
486 .post_bind = dsa_post_bind,
487 .pre_probe = dsa_pre_probe,
488 .per_device_auto = sizeof(struct dsa_priv),
489 .per_device_plat_auto = sizeof(struct dsa_pdata),
490 .per_child_plat_auto = sizeof(struct dsa_port_pdata),
491 .flags = DM_UC_FLAG_SEQ_ALIAS,
492};