| Kishon Vijay Abraham I | 78d13c9 | 2021-07-21 21:28:48 +0530 | [diff] [blame] | 1 | .. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause |
| 2 | .. sectionauthor:: Lokesh Vutla <lokeshvutla@ti.com> |
| 3 | |
| 4 | Texas Instruments K3 Platforms |
| 5 | ============================== |
| 6 | |
| 7 | Introduction: |
| 8 | ------------- |
| 9 | The J721e family of SoCs are part of K3 Multicore SoC architecture platform |
| 10 | targeting automotive applications. They are designed as a low power, high |
| 11 | performance and highly integrated device architecture, adding significant |
| 12 | enhancement on processing power, graphics capability, video and imaging |
| 13 | processing, virtualization and coherent memory support. |
| 14 | |
| 15 | The device is partitioned into three functional domains, each containing |
| 16 | specific processing cores and peripherals: |
| 17 | |
| 18 | 1. Wake-up (WKUP) domain: |
| 19 | * Device Management and Security Controller (DMSC) |
| 20 | |
| 21 | 2. Microcontroller (MCU) domain: |
| 22 | * Dual Core ARM Cortex-R5F processor |
| 23 | |
| 24 | 3. MAIN domain: |
| 25 | * Dual core 64-bit ARM Cortex-A72 |
| 26 | * 2 x Dual cortex ARM Cortex-R5 subsystem |
| 27 | * 2 x C66x Digital signal processor sub system |
| 28 | * C71x Digital signal processor sub-system with MMA. |
| 29 | |
| 30 | More info can be found in TRM: http://www.ti.com/lit/pdf/spruil1 |
| 31 | |
| 32 | Boot Flow: |
| 33 | ---------- |
| 34 | Boot flow is similar to that of AM65x SoC and extending it with remoteproc |
| 35 | support. Below is the pictorial representation of boot flow: |
| 36 | |
| 37 | .. code-block:: text |
| 38 | |
| 39 | +------------------------------------------------------------------------+-----------------------+ |
| 40 | | DMSC | MCU R5 | A72 | MAIN R5/C66x/C7x | |
| 41 | +------------------------------------------------------------------------+-----------------------+ |
| 42 | | +--------+ | | | | |
| 43 | | | Reset | | | | | |
| 44 | | +--------+ | | | | |
| 45 | | : | | | | |
| 46 | | +--------+ | +-----------+ | | | |
| 47 | | | *ROM* |----------|-->| Reset rls | | | | |
| 48 | | +--------+ | +-----------+ | | | |
| 49 | | | | | : | | | |
| 50 | | | ROM | | : | | | |
| 51 | | |services| | : | | | |
| 52 | | | | | +-------------+ | | | |
| 53 | | | | | | *R5 ROM* | | | | |
| 54 | | | | | +-------------+ | | | |
| 55 | | | |<---------|---|Load and auth| | | | |
| 56 | | | | | | tiboot3.bin | | | | |
| 57 | | | | | +-------------+ | | | |
| 58 | | | | | : | | | |
| 59 | | | | | : | | | |
| 60 | | | | | : | | | |
| 61 | | | | | +-------------+ | | | |
| 62 | | | | | | *R5 SPL* | | | | |
| 63 | | | | | +-------------+ | | | |
| 64 | | | | | | Load | | | | |
| 65 | | | | | | sysfw.itb | | | | |
| 66 | | | Start | | +-------------+ | | | |
| 67 | | | System |<---------|---| Start | | | | |
| 68 | | |Firmware| | | SYSFW | | | | |
| 69 | | +--------+ | +-------------+ | | | |
| 70 | | : | | | | | | |
| 71 | | +---------+ | | Load | | | | |
| 72 | | | *SYSFW* | | | system | | | | |
| 73 | | +---------+ | | Config data | | | | |
| 74 | | | |<--------|---| | | | | |
| 75 | | | | | +-------------+ | | | |
| 76 | | | | | | DDR | | | | |
| 77 | | | | | | config | | | | |
| 78 | | | | | +-------------+ | | | |
| 79 | | | | | | Load | | | | |
| 80 | | | | | | tispl.bin | | | | |
| 81 | | | | | +-------------+ | | | |
| 82 | | | | | | Load R5 | | | | |
| 83 | | | | | | firmware | | | | |
| 84 | | | | | +-------------+ | | | |
| 85 | | | |<--------|---| Start A72 | | | | |
| 86 | | | | | | and jump to | | | | |
| 87 | | | | | | DM fw image | | | | |
| 88 | | | | | +-------------+ | | | |
| 89 | | | | | | +-----------+ | | |
| 90 | | | |---------|-----------------------|---->| Reset rls | | | |
| 91 | | | | | | +-----------+ | | |
| 92 | | | TIFS | | | : | | |
| 93 | | |Services | | | +-----------+ | | |
| 94 | | | |<--------|-----------------------|---->|*ATF/OPTEE*| | | |
| 95 | | | | | | +-----------+ | | |
| 96 | | | | | | : | | |
| 97 | | | | | | +-----------+ | | |
| 98 | | | |<--------|-----------------------|---->| *A72 SPL* | | | |
| 99 | | | | | | +-----------+ | | |
| 100 | | | | | | | Load | | | |
| 101 | | | | | | | u-boot.img| | | |
| 102 | | | | | | +-----------+ | | |
| 103 | | | | | | : | | |
| 104 | | | | | | +-----------+ | | |
| 105 | | | |<--------|-----------------------|---->| *U-Boot* | | | |
| 106 | | | | | | +-----------+ | | |
| 107 | | | | | | | prompt | | | |
| 108 | | | | | | +-----------+ | | |
| 109 | | | | | | | Load R5 | | | |
| 110 | | | | | | | Firmware | | | |
| 111 | | | | | | +-----------+ | | |
| 112 | | | |<--------|-----------------------|-----| Start R5 | | +-----------+ | |
| 113 | | | |---------|-----------------------|-----+-----------+-----|----->| R5 starts | | |
| 114 | | | | | | | Load C6 | | +-----------+ | |
| 115 | | | | | | | Firmware | | | |
| 116 | | | | | | +-----------+ | | |
| 117 | | | |<--------|-----------------------|-----| Start C6 | | +-----------+ | |
| 118 | | | |---------|-----------------------|-----+-----------+-----|----->| C6 starts | | |
| 119 | | | | | | | Load C7 | | +-----------+ | |
| 120 | | | | | | | Firmware | | | |
| 121 | | | | | | +-----------+ | | |
| 122 | | | |<--------|-----------------------|-----| Start C7 | | +-----------+ | |
| 123 | | | |---------|-----------------------|-----+-----------+-----|----->| C7 starts | | |
| 124 | | +---------+ | | | +-----------+ | |
| 125 | | | | | | |
| 126 | +------------------------------------------------------------------------+-----------------------+ |
| 127 | |
| 128 | - Here DMSC acts as master and provides all the critical services. R5/A72 |
| 129 | requests DMSC to get these services done as shown in the above diagram. |
| 130 | |
| 131 | Sources: |
| 132 | -------- |
| 133 | 1. SYSFW: |
| 134 | Tree: git://git.ti.com/k3-image-gen/k3-image-gen.git |
| 135 | Branch: master |
| 136 | |
| 137 | 2. ATF: |
| 138 | Tree: https://github.com/ARM-software/arm-trusted-firmware.git |
| 139 | Branch: master |
| 140 | |
| 141 | 3. OPTEE: |
| 142 | Tree: https://github.com/OP-TEE/optee_os.git |
| 143 | Branch: master |
| 144 | |
| 145 | 4. U-Boot: |
| 146 | Tree: https://source.denx.de/u-boot/u-boot |
| 147 | Branch: master |
| 148 | |
| 149 | Build procedure: |
| 150 | ---------------- |
| 151 | 1. SYSFW: |
| 152 | |
| 153 | .. code-block:: text |
| 154 | |
| 155 | $ make CROSS_COMPILE=arm-linux-gnueabihf- |
| 156 | |
| 157 | 2. ATF: |
| 158 | |
| 159 | .. code-block:: text |
| 160 | |
| 161 | $ make CROSS_COMPILE=aarch64-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=generic SPD=opteed |
| 162 | |
| 163 | 3. OPTEE: |
| 164 | |
| 165 | .. code-block:: text |
| 166 | |
| 167 | $ make PLATFORM=k3-j721e CFG_ARM64_core=y |
| 168 | |
| 169 | 4. U-Boot: |
| 170 | |
| 171 | * 4.1 R5: |
| 172 | |
| 173 | .. code-block:: text |
| 174 | |
| 175 | $ make CROSS_COMPILE=arm-linux-gnueabihf- j721e_evm_r5_defconfig O=/tmp/r5 |
| 176 | $ make CROSS_COMPILE=arm-linux-gnueabihf- O=/tmp/r5 |
| 177 | |
| 178 | * 4.2 A72: |
| 179 | |
| 180 | .. code-block:: text |
| 181 | |
| 182 | $ make CROSS_COMPILE=aarch64-linux-gnu- j721e_evm_a72_defconfig O=/tmp/a72 |
| 183 | $ make CROSS_COMPILE=aarch64-linux-gnu- ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin DM=<path to DM firmware image> O=/tmp/a72 |
| 184 | |
| 185 | Target Images |
| 186 | -------------- |
| 187 | Copy the below images to an SD card and boot: |
| 188 | - sysfw.itb from step 1 |
| 189 | - tiboot3.bin from step 4.1 |
| 190 | - tispl.bin, u-boot.img from 4.2 |
| 191 | |
| 192 | Image formats: |
| 193 | -------------- |
| 194 | |
| 195 | - tiboot3.bin: |
| 196 | |
| 197 | .. code-block:: text |
| 198 | |
| 199 | +-----------------------+ |
| 200 | | X.509 | |
| 201 | | Certificate | |
| 202 | | +-------------------+ | |
| 203 | | | | | |
| 204 | | | R5 | | |
| 205 | | | u-boot-spl.bin | | |
| 206 | | | | | |
| 207 | | +-------------------+ | |
| 208 | | | | | |
| 209 | | | FIT header | | |
| 210 | | | +---------------+ | | |
| 211 | | | | | | | |
| 212 | | | | DTB 1...N | | | |
| 213 | | | +---------------+ | | |
| 214 | | +-------------------+ | |
| 215 | +-----------------------+ |
| 216 | |
| 217 | - tispl.bin |
| 218 | |
| 219 | .. code-block:: text |
| 220 | |
| 221 | +-----------------------+ |
| 222 | | | |
| 223 | | FIT HEADER | |
| 224 | | +-------------------+ | |
| 225 | | | | | |
| 226 | | | A72 ATF | | |
| 227 | | +-------------------+ | |
| 228 | | | | | |
| 229 | | | A72 OPTEE | | |
| 230 | | +-------------------+ | |
| 231 | | | | | |
| 232 | | | R5 DM FW | | |
| 233 | | +-------------------+ | |
| 234 | | | | | |
| 235 | | | A72 SPL | | |
| 236 | | +-------------------+ | |
| 237 | | | | | |
| 238 | | | SPL DTB 1...N | | |
| 239 | | +-------------------+ | |
| 240 | +-----------------------+ |
| 241 | |
| 242 | - sysfw.itb |
| 243 | |
| 244 | .. code-block:: text |
| 245 | |
| 246 | +-----------------------+ |
| 247 | | | |
| 248 | | FIT HEADER | |
| 249 | | +-------------------+ | |
| 250 | | | | | |
| 251 | | | sysfw.bin | | |
| 252 | | +-------------------+ | |
| 253 | | | | | |
| 254 | | | board config | | |
| 255 | | +-------------------+ | |
| 256 | | | | | |
| 257 | | | PM config | | |
| 258 | | +-------------------+ | |
| 259 | | | | | |
| 260 | | | RM config | | |
| 261 | | +-------------------+ | |
| 262 | | | | | |
| 263 | | | Secure config | | |
| 264 | | +-------------------+ | |
| 265 | +-----------------------+ |
| 266 | |
| 267 | OSPI: |
| 268 | ----- |
| 269 | ROM supports booting from OSPI from offset 0x0. |
| 270 | |
| 271 | Flashing images to OSPI: |
| 272 | |
| 273 | Below commands can be used to download tiboot3.bin, tispl.bin, u-boot.img, |
| 274 | and sysfw.itb over tftp and then flash those to OSPI at their respective |
| 275 | addresses. |
| 276 | |
| 277 | .. code-block:: text |
| 278 | |
| 279 | => sf probe |
| 280 | => tftp ${loadaddr} tiboot3.bin |
| 281 | => sf update $loadaddr 0x0 $filesize |
| 282 | => tftp ${loadaddr} tispl.bin |
| 283 | => sf update $loadaddr 0x80000 $filesize |
| 284 | => tftp ${loadaddr} u-boot.img |
| 285 | => sf update $loadaddr 0x280000 $filesize |
| 286 | => tftp ${loadaddr} sysfw.itb |
| 287 | => sf update $loadaddr 0x6C0000 $filesize |
| 288 | |
| 289 | Flash layout for OSPI: |
| 290 | |
| 291 | .. code-block:: text |
| 292 | |
| 293 | 0x0 +----------------------------+ |
| 294 | | ospi.tiboot3(512K) | |
| 295 | | | |
| 296 | 0x80000 +----------------------------+ |
| 297 | | ospi.tispl(2M) | |
| 298 | | | |
| 299 | 0x280000 +----------------------------+ |
| 300 | | ospi.u-boot(4M) | |
| 301 | | | |
| 302 | 0x680000 +----------------------------+ |
| 303 | | ospi.env(128K) | |
| 304 | | | |
| 305 | 0x6A0000 +----------------------------+ |
| 306 | | ospi.env.backup (128K) | |
| 307 | | | |
| 308 | 0x6C0000 +----------------------------+ |
| 309 | | ospi.sysfw(1M) | |
| 310 | | | |
| 311 | 0x7C0000 +----------------------------+ |
| 312 | | padding (256k) | |
| 313 | 0x800000 +----------------------------+ |
| 314 | | ospi.rootfs(UBIFS) | |
| 315 | | | |
| 316 | +----------------------------+ |
| Kishon Vijay Abraham I | dd7f528 | 2021-07-21 21:28:49 +0530 | [diff] [blame] | 317 | |
| 318 | Firmwares: |
| 319 | ---------- |
| 320 | |
| 321 | The J721e u-boot allows firmware to be loaded for the Cortex-R5 subsystem. |
| 322 | The CPSW5G in J7200 and CPSW9G in J721E present in MAIN domain is configured |
| 323 | and controlled by the ethernet firmware that executes in the MAIN Cortex R5. |
| 324 | The default supported environment variables support loading these firmwares |
| 325 | from only MMC. "dorprocboot" env variable has to be set for the U-BOOT to load |
| 326 | and start the remote cores in the system. |
| 327 | |
| 328 | J721E common processor board can be attached to a Ethernet QSGMII card and the |
| 329 | PHY in the card has to be reset before it can be used for data transfer. |
| 330 | "do_main_cpsw0_qsgmii_phyinit" env variable has to be set for the U-BOOT to |
| 331 | configure this PHY. |