Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2000-2002 |
| 4 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 5 | * |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 6 | * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 7 | */ |
| 8 | |
Mario Six | 7cab147 | 2018-08-06 10:23:36 +0200 | [diff] [blame] | 9 | #ifndef CONFIG_CLK_MPC83XX |
| 10 | |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 11 | #include <common.h> |
Simon Glass | 85d6531 | 2019-12-28 10:44:58 -0700 | [diff] [blame] | 12 | #include <clock_legacy.h> |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 13 | #include <mpc83xx.h> |
Kim Phillips | d82b077 | 2007-04-30 15:26:21 -0500 | [diff] [blame] | 14 | #include <command.h> |
Simon Glass | f5c208d | 2019-11-14 12:57:20 -0700 | [diff] [blame] | 15 | #include <vsprintf.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 16 | #include <asm/global_data.h> |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 17 | #include <asm/processor.h> |
| 18 | |
Wolfgang Denk | 6405a15 | 2006-03-31 18:32:53 +0200 | [diff] [blame] | 19 | DECLARE_GLOBAL_DATA_PTR; |
| 20 | |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 21 | /* ----------------------------------------------------------------- */ |
| 22 | |
| 23 | typedef enum { |
| 24 | _unk, |
| 25 | _off, |
| 26 | _byp, |
| 27 | _x8, |
| 28 | _x4, |
| 29 | _x2, |
| 30 | _x1, |
| 31 | _1x, |
| 32 | _1_5x, |
| 33 | _2x, |
| 34 | _2_5x, |
| 35 | _3x |
| 36 | } mult_t; |
| 37 | |
| 38 | typedef struct { |
| 39 | mult_t core_csb_ratio; |
Kim Phillips | bae2479 | 2006-11-02 19:47:11 -0600 | [diff] [blame] | 40 | mult_t vco_divider; |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 41 | } corecnf_t; |
| 42 | |
Kim Phillips | b5c312a | 2012-10-29 13:34:39 +0000 | [diff] [blame] | 43 | static corecnf_t corecnf_tab[] = { |
Kim Phillips | bae2479 | 2006-11-02 19:47:11 -0600 | [diff] [blame] | 44 | {_byp, _byp}, /* 0x00 */ |
| 45 | {_byp, _byp}, /* 0x01 */ |
| 46 | {_byp, _byp}, /* 0x02 */ |
| 47 | {_byp, _byp}, /* 0x03 */ |
| 48 | {_byp, _byp}, /* 0x04 */ |
| 49 | {_byp, _byp}, /* 0x05 */ |
| 50 | {_byp, _byp}, /* 0x06 */ |
| 51 | {_byp, _byp}, /* 0x07 */ |
| 52 | {_1x, _x2}, /* 0x08 */ |
| 53 | {_1x, _x4}, /* 0x09 */ |
| 54 | {_1x, _x8}, /* 0x0A */ |
| 55 | {_1x, _x8}, /* 0x0B */ |
| 56 | {_1_5x, _x2}, /* 0x0C */ |
| 57 | {_1_5x, _x4}, /* 0x0D */ |
| 58 | {_1_5x, _x8}, /* 0x0E */ |
| 59 | {_1_5x, _x8}, /* 0x0F */ |
| 60 | {_2x, _x2}, /* 0x10 */ |
| 61 | {_2x, _x4}, /* 0x11 */ |
| 62 | {_2x, _x8}, /* 0x12 */ |
| 63 | {_2x, _x8}, /* 0x13 */ |
| 64 | {_2_5x, _x2}, /* 0x14 */ |
| 65 | {_2_5x, _x4}, /* 0x15 */ |
| 66 | {_2_5x, _x8}, /* 0x16 */ |
| 67 | {_2_5x, _x8}, /* 0x17 */ |
| 68 | {_3x, _x2}, /* 0x18 */ |
| 69 | {_3x, _x4}, /* 0x19 */ |
| 70 | {_3x, _x8}, /* 0x1A */ |
| 71 | {_3x, _x8}, /* 0x1B */ |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 72 | }; |
| 73 | |
| 74 | /* ----------------------------------------------------------------- */ |
| 75 | |
| 76 | /* |
| 77 | * |
| 78 | */ |
Kim Phillips | bae2479 | 2006-11-02 19:47:11 -0600 | [diff] [blame] | 79 | int get_clocks(void) |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 80 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 81 | volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 82 | u32 pci_sync_in; |
Kim Phillips | bae2479 | 2006-11-02 19:47:11 -0600 | [diff] [blame] | 83 | u8 spmf; |
| 84 | u8 clkin_div; |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 85 | u32 sccr; |
| 86 | u32 corecnf_tab_index; |
Kim Phillips | bae2479 | 2006-11-02 19:47:11 -0600 | [diff] [blame] | 87 | u8 corepll; |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 88 | u32 lcrr; |
Jon Loeliger | ebc7224 | 2005-08-01 13:20:47 -0500 | [diff] [blame] | 89 | |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 90 | u32 csb_clk; |
Mario Six | 9164bdd | 2019-01-21 09:17:25 +0100 | [diff] [blame] | 91 | #if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \ |
Mario Six | 60b1123 | 2019-01-21 09:17:29 +0100 | [diff] [blame] | 92 | defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_ARCH_MPC837X) |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 93 | u32 tsec1_clk; |
| 94 | u32 tsec2_clk; |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 95 | u32 usbdr_clk; |
Mario Six | b2e701c | 2019-01-21 09:17:24 +0100 | [diff] [blame] | 96 | #elif defined(CONFIG_ARCH_MPC8309) |
Gerlando Falauto | fe201cb | 2012-10-10 22:13:08 +0000 | [diff] [blame] | 97 | u32 usbdr_clk; |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 98 | #endif |
Mario Six | 0344f5e | 2019-01-21 09:17:27 +0100 | [diff] [blame] | 99 | #ifdef CONFIG_ARCH_MPC834X |
Scott Wood | c036fc9 | 2007-04-16 14:34:19 -0500 | [diff] [blame] | 100 | u32 usbmph_clk; |
| 101 | #endif |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 102 | u32 core_clk; |
| 103 | u32 i2c1_clk; |
Mario Six | be07e55 | 2019-01-21 09:17:26 +0100 | [diff] [blame] | 104 | #if !defined(CONFIG_ARCH_MPC832X) |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 105 | u32 i2c2_clk; |
Dave Liu | e740c46 | 2006-12-07 21:13:15 +0800 | [diff] [blame] | 106 | #endif |
Rini van Zetten | a249617 | 2010-04-15 16:03:05 +0200 | [diff] [blame] | 107 | #if defined(CONFIG_FSL_ESDHC) |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 108 | u32 sdhc_clk; |
| 109 | #endif |
Mario Six | b2e701c | 2019-01-21 09:17:24 +0100 | [diff] [blame] | 110 | #if !defined(CONFIG_ARCH_MPC8309) |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 111 | u32 enc_clk; |
Gerlando Falauto | fe201cb | 2012-10-10 22:13:08 +0000 | [diff] [blame] | 112 | #endif |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 113 | u32 lbiu_clk; |
| 114 | u32 lclk_clk; |
Kim Phillips | c02cf1e | 2008-03-28 10:18:40 -0500 | [diff] [blame] | 115 | u32 mem_clk; |
Mario Six | 84eb431 | 2019-01-21 09:17:28 +0100 | [diff] [blame] | 116 | #if defined(CONFIG_ARCH_MPC8360) |
Kim Phillips | c02cf1e | 2008-03-28 10:18:40 -0500 | [diff] [blame] | 117 | u32 mem_sec_clk; |
Dave Liu | e740c46 | 2006-12-07 21:13:15 +0800 | [diff] [blame] | 118 | #endif |
Gerlando Falauto | 77cf283 | 2012-10-10 22:13:06 +0000 | [diff] [blame] | 119 | #if defined(CONFIG_QE) |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 120 | u32 qepmf; |
| 121 | u32 qepdf; |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 122 | u32 qe_clk; |
| 123 | u32 brg_clk; |
| 124 | #endif |
Mario Six | 9164bdd | 2019-01-21 09:17:25 +0100 | [diff] [blame] | 125 | #if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \ |
Mario Six | 60b1123 | 2019-01-21 09:17:29 +0100 | [diff] [blame] | 126 | defined(CONFIG_ARCH_MPC837X) |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 127 | u32 pciexp1_clk; |
| 128 | u32 pciexp2_clk; |
Dave Liu | e0cfec8 | 2007-09-18 12:36:58 +0800 | [diff] [blame] | 129 | #endif |
Tom Rini | d9e6ef5 | 2021-05-14 21:34:27 -0400 | [diff] [blame] | 130 | #if defined(CONFIG_ARCH_MPC837X) |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 131 | u32 sata_clk; |
| 132 | #endif |
Jon Loeliger | ebc7224 | 2005-08-01 13:20:47 -0500 | [diff] [blame] | 133 | |
Kim Phillips | bae2479 | 2006-11-02 19:47:11 -0600 | [diff] [blame] | 134 | if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 135 | return -1; |
Jon Loeliger | ebc7224 | 2005-08-01 13:20:47 -0500 | [diff] [blame] | 136 | |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 137 | clkin_div = ((im->clk.spmr & SPMR_CKID) >> SPMR_CKID_SHIFT); |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 138 | |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 139 | if (im->reset.rcwh & HRCWH_PCI_HOST) { |
Tom Rini | 8c70baa | 2021-12-14 13:36:40 -0500 | [diff] [blame^] | 140 | #if CONFIG_SYS_CLK_FREQ != 0 |
| 141 | pci_sync_in = get_board_sys_clk() / (1 + clkin_div); |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 142 | #else |
| 143 | pci_sync_in = 0xDEADBEEF; |
| 144 | #endif |
| 145 | } else { |
| 146 | #if defined(CONFIG_83XX_PCICLK) |
| 147 | pci_sync_in = CONFIG_83XX_PCICLK; |
| 148 | #else |
| 149 | pci_sync_in = 0xDEADBEEF; |
| 150 | #endif |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 151 | } |
Marian Balakowicz | 513b4a1 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 152 | |
Joakim Tjernlund | f2af1bb | 2011-01-27 16:30:54 +0100 | [diff] [blame] | 153 | spmf = (im->clk.spmr & SPMR_SPMF) >> SPMR_SPMF_SHIFT; |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 154 | csb_clk = pci_sync_in * (1 + clkin_div) * spmf; |
Jon Loeliger | ebc7224 | 2005-08-01 13:20:47 -0500 | [diff] [blame] | 155 | |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 156 | sccr = im->clk.sccr; |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 157 | |
Mario Six | 9164bdd | 2019-01-21 09:17:25 +0100 | [diff] [blame] | 158 | #if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \ |
Mario Six | 60b1123 | 2019-01-21 09:17:29 +0100 | [diff] [blame] | 159 | defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_ARCH_MPC837X) |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 160 | switch ((sccr & SCCR_TSEC1CM) >> SCCR_TSEC1CM_SHIFT) { |
| 161 | case 0: |
| 162 | tsec1_clk = 0; |
| 163 | break; |
| 164 | case 1: |
| 165 | tsec1_clk = csb_clk; |
| 166 | break; |
| 167 | case 2: |
| 168 | tsec1_clk = csb_clk / 2; |
| 169 | break; |
| 170 | case 3: |
| 171 | tsec1_clk = csb_clk / 3; |
| 172 | break; |
| 173 | default: |
Robert P. J. Day | cbd618f | 2015-12-16 12:25:42 -0500 | [diff] [blame] | 174 | /* unknown SCCR_TSEC1CM value */ |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 175 | return -2; |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 176 | } |
Gerlando Falauto | 7473555 | 2012-10-10 22:13:07 +0000 | [diff] [blame] | 177 | #endif |
Jon Loeliger | ebc7224 | 2005-08-01 13:20:47 -0500 | [diff] [blame] | 178 | |
Mario Six | 9164bdd | 2019-01-21 09:17:25 +0100 | [diff] [blame] | 179 | #if defined(CONFIG_ARCH_MPC830X) || defined(CONFIG_ARCH_MPC831X) || \ |
Mario Six | 60b1123 | 2019-01-21 09:17:29 +0100 | [diff] [blame] | 180 | defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_ARCH_MPC837X) |
Scott Wood | c036fc9 | 2007-04-16 14:34:19 -0500 | [diff] [blame] | 181 | switch ((sccr & SCCR_USBDRCM) >> SCCR_USBDRCM_SHIFT) { |
| 182 | case 0: |
| 183 | usbdr_clk = 0; |
| 184 | break; |
| 185 | case 1: |
| 186 | usbdr_clk = csb_clk; |
| 187 | break; |
| 188 | case 2: |
| 189 | usbdr_clk = csb_clk / 2; |
| 190 | break; |
| 191 | case 3: |
| 192 | usbdr_clk = csb_clk / 3; |
| 193 | break; |
| 194 | default: |
Robert P. J. Day | cbd618f | 2015-12-16 12:25:42 -0500 | [diff] [blame] | 195 | /* unknown SCCR_USBDRCM value */ |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 196 | return -3; |
Scott Wood | c036fc9 | 2007-04-16 14:34:19 -0500 | [diff] [blame] | 197 | } |
| 198 | #endif |
| 199 | |
Tom Rini | d9e6ef5 | 2021-05-14 21:34:27 -0400 | [diff] [blame] | 200 | #if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC834X) || \ |
| 201 | defined(CONFIG_ARCH_MPC837X) |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 202 | switch ((sccr & SCCR_TSEC2CM) >> SCCR_TSEC2CM_SHIFT) { |
| 203 | case 0: |
| 204 | tsec2_clk = 0; |
| 205 | break; |
| 206 | case 1: |
| 207 | tsec2_clk = csb_clk; |
| 208 | break; |
| 209 | case 2: |
| 210 | tsec2_clk = csb_clk / 2; |
| 211 | break; |
| 212 | case 3: |
| 213 | tsec2_clk = csb_clk / 3; |
| 214 | break; |
| 215 | default: |
Robert P. J. Day | cbd618f | 2015-12-16 12:25:42 -0500 | [diff] [blame] | 216 | /* unknown SCCR_TSEC2CM value */ |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 217 | return -4; |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 218 | } |
Mario Six | 9164bdd | 2019-01-21 09:17:25 +0100 | [diff] [blame] | 219 | #elif defined(CONFIG_ARCH_MPC8313) |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 220 | tsec2_clk = tsec1_clk; |
Jon Loeliger | ebc7224 | 2005-08-01 13:20:47 -0500 | [diff] [blame] | 221 | |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 222 | if (!(sccr & SCCR_TSEC1ON)) |
| 223 | tsec1_clk = 0; |
| 224 | if (!(sccr & SCCR_TSEC2ON)) |
| 225 | tsec2_clk = 0; |
| 226 | #endif |
Jon Loeliger | ebc7224 | 2005-08-01 13:20:47 -0500 | [diff] [blame] | 227 | |
Mario Six | 0344f5e | 2019-01-21 09:17:27 +0100 | [diff] [blame] | 228 | #if defined(CONFIG_ARCH_MPC834X) |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 229 | switch ((sccr & SCCR_USBMPHCM) >> SCCR_USBMPHCM_SHIFT) { |
| 230 | case 0: |
| 231 | usbmph_clk = 0; |
| 232 | break; |
| 233 | case 1: |
| 234 | usbmph_clk = csb_clk; |
| 235 | break; |
| 236 | case 2: |
| 237 | usbmph_clk = csb_clk / 2; |
| 238 | break; |
| 239 | case 3: |
| 240 | usbmph_clk = csb_clk / 3; |
| 241 | break; |
| 242 | default: |
Robert P. J. Day | cbd618f | 2015-12-16 12:25:42 -0500 | [diff] [blame] | 243 | /* unknown SCCR_USBMPHCM value */ |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 244 | return -5; |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 245 | } |
| 246 | |
Kim Phillips | bae2479 | 2006-11-02 19:47:11 -0600 | [diff] [blame] | 247 | if (usbmph_clk != 0 && usbdr_clk != 0 && usbmph_clk != usbdr_clk) { |
| 248 | /* if USB MPH clock is not disabled and |
| 249 | * USB DR clock is not disabled then |
| 250 | * USB MPH & USB DR must have the same rate |
| 251 | */ |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 252 | return -6; |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 253 | } |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 254 | #endif |
Mario Six | b2e701c | 2019-01-21 09:17:24 +0100 | [diff] [blame] | 255 | #if !defined(CONFIG_ARCH_MPC8309) |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 256 | switch ((sccr & SCCR_ENCCM) >> SCCR_ENCCM_SHIFT) { |
| 257 | case 0: |
| 258 | enc_clk = 0; |
| 259 | break; |
| 260 | case 1: |
| 261 | enc_clk = csb_clk; |
| 262 | break; |
| 263 | case 2: |
| 264 | enc_clk = csb_clk / 2; |
| 265 | break; |
| 266 | case 3: |
| 267 | enc_clk = csb_clk / 3; |
| 268 | break; |
| 269 | default: |
Robert P. J. Day | cbd618f | 2015-12-16 12:25:42 -0500 | [diff] [blame] | 270 | /* unknown SCCR_ENCCM value */ |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 271 | return -7; |
| 272 | } |
Gerlando Falauto | fe201cb | 2012-10-10 22:13:08 +0000 | [diff] [blame] | 273 | #endif |
Scott Wood | c036fc9 | 2007-04-16 14:34:19 -0500 | [diff] [blame] | 274 | |
Rini van Zetten | a249617 | 2010-04-15 16:03:05 +0200 | [diff] [blame] | 275 | #if defined(CONFIG_FSL_ESDHC) |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 276 | switch ((sccr & SCCR_SDHCCM) >> SCCR_SDHCCM_SHIFT) { |
| 277 | case 0: |
| 278 | sdhc_clk = 0; |
| 279 | break; |
| 280 | case 1: |
| 281 | sdhc_clk = csb_clk; |
| 282 | break; |
| 283 | case 2: |
| 284 | sdhc_clk = csb_clk / 2; |
| 285 | break; |
| 286 | case 3: |
| 287 | sdhc_clk = csb_clk / 3; |
| 288 | break; |
| 289 | default: |
Robert P. J. Day | cbd618f | 2015-12-16 12:25:42 -0500 | [diff] [blame] | 290 | /* unknown SCCR_SDHCCM value */ |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 291 | return -8; |
| 292 | } |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 293 | #endif |
Scott Wood | c036fc9 | 2007-04-16 14:34:19 -0500 | [diff] [blame] | 294 | |
Mario Six | 0344f5e | 2019-01-21 09:17:27 +0100 | [diff] [blame] | 295 | #if defined(CONFIG_ARCH_MPC834X) |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 296 | i2c1_clk = tsec2_clk; |
Mario Six | 84eb431 | 2019-01-21 09:17:28 +0100 | [diff] [blame] | 297 | #elif defined(CONFIG_ARCH_MPC8360) |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 298 | i2c1_clk = csb_clk; |
Mario Six | be07e55 | 2019-01-21 09:17:26 +0100 | [diff] [blame] | 299 | #elif defined(CONFIG_ARCH_MPC832X) |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 300 | i2c1_clk = enc_clk; |
Mario Six | 9164bdd | 2019-01-21 09:17:25 +0100 | [diff] [blame] | 301 | #elif defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 302 | i2c1_clk = enc_clk; |
Rini van Zetten | a249617 | 2010-04-15 16:03:05 +0200 | [diff] [blame] | 303 | #elif defined(CONFIG_FSL_ESDHC) |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 304 | i2c1_clk = sdhc_clk; |
Mario Six | 60b1123 | 2019-01-21 09:17:29 +0100 | [diff] [blame] | 305 | #elif defined(CONFIG_ARCH_MPC837X) |
Andre Schwarz | a76cc61 | 2011-04-14 14:57:40 +0200 | [diff] [blame] | 306 | i2c1_clk = enc_clk; |
Mario Six | b2e701c | 2019-01-21 09:17:24 +0100 | [diff] [blame] | 307 | #elif defined(CONFIG_ARCH_MPC8309) |
Gerlando Falauto | fe201cb | 2012-10-10 22:13:08 +0000 | [diff] [blame] | 308 | i2c1_clk = csb_clk; |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 309 | #endif |
Mario Six | be07e55 | 2019-01-21 09:17:26 +0100 | [diff] [blame] | 310 | #if !defined(CONFIG_ARCH_MPC832X) |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 311 | i2c2_clk = csb_clk; /* i2c-2 clk is equal to csb clk */ |
Dave Liu | e740c46 | 2006-12-07 21:13:15 +0800 | [diff] [blame] | 312 | #endif |
Jon Loeliger | ebc7224 | 2005-08-01 13:20:47 -0500 | [diff] [blame] | 313 | |
Mario Six | 9164bdd | 2019-01-21 09:17:25 +0100 | [diff] [blame] | 314 | #if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \ |
Mario Six | 60b1123 | 2019-01-21 09:17:29 +0100 | [diff] [blame] | 315 | defined(CONFIG_ARCH_MPC837X) |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 316 | switch ((sccr & SCCR_PCIEXP1CM) >> SCCR_PCIEXP1CM_SHIFT) { |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 317 | case 0: |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 318 | pciexp1_clk = 0; |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 319 | break; |
| 320 | case 1: |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 321 | pciexp1_clk = csb_clk; |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 322 | break; |
| 323 | case 2: |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 324 | pciexp1_clk = csb_clk / 2; |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 325 | break; |
| 326 | case 3: |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 327 | pciexp1_clk = csb_clk / 3; |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 328 | break; |
| 329 | default: |
Robert P. J. Day | cbd618f | 2015-12-16 12:25:42 -0500 | [diff] [blame] | 330 | /* unknown SCCR_PCIEXP1CM value */ |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 331 | return -9; |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 332 | } |
Dave Liu | e740c46 | 2006-12-07 21:13:15 +0800 | [diff] [blame] | 333 | |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 334 | switch ((sccr & SCCR_PCIEXP2CM) >> SCCR_PCIEXP2CM_SHIFT) { |
| 335 | case 0: |
| 336 | pciexp2_clk = 0; |
| 337 | break; |
| 338 | case 1: |
| 339 | pciexp2_clk = csb_clk; |
| 340 | break; |
| 341 | case 2: |
| 342 | pciexp2_clk = csb_clk / 2; |
| 343 | break; |
| 344 | case 3: |
| 345 | pciexp2_clk = csb_clk / 3; |
| 346 | break; |
| 347 | default: |
Robert P. J. Day | cbd618f | 2015-12-16 12:25:42 -0500 | [diff] [blame] | 348 | /* unknown SCCR_PCIEXP2CM value */ |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 349 | return -10; |
| 350 | } |
| 351 | #endif |
| 352 | |
Tom Rini | d9e6ef5 | 2021-05-14 21:34:27 -0400 | [diff] [blame] | 353 | #if defined(CONFIG_ARCH_MPC837X) |
Dave Liu | b7896ad | 2008-01-17 18:23:19 +0800 | [diff] [blame] | 354 | switch ((sccr & SCCR_SATA1CM) >> SCCR_SATA1CM_SHIFT) { |
| 355 | case 0: |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 356 | sata_clk = 0; |
| 357 | break; |
Dave Liu | b7896ad | 2008-01-17 18:23:19 +0800 | [diff] [blame] | 358 | case 1: |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 359 | sata_clk = csb_clk; |
| 360 | break; |
Dave Liu | b7896ad | 2008-01-17 18:23:19 +0800 | [diff] [blame] | 361 | case 2: |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 362 | sata_clk = csb_clk / 2; |
| 363 | break; |
Dave Liu | b7896ad | 2008-01-17 18:23:19 +0800 | [diff] [blame] | 364 | case 3: |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 365 | sata_clk = csb_clk / 3; |
| 366 | break; |
| 367 | default: |
Robert P. J. Day | cbd618f | 2015-12-16 12:25:42 -0500 | [diff] [blame] | 368 | /* unknown SCCR_SATA1CM value */ |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 369 | return -11; |
| 370 | } |
| 371 | #endif |
| 372 | |
Kim Phillips | bae2479 | 2006-11-02 19:47:11 -0600 | [diff] [blame] | 373 | lbiu_clk = csb_clk * |
Joakim Tjernlund | f2af1bb | 2011-01-27 16:30:54 +0100 | [diff] [blame] | 374 | (1 + ((im->clk.spmr & SPMR_LBIUCM) >> SPMR_LBIUCM_SHIFT)); |
Becky Bruce | 0d4cee1 | 2010-06-17 11:37:20 -0500 | [diff] [blame] | 375 | lcrr = (im->im_lbc.lcrr & LCRR_CLKDIV) >> LCRR_CLKDIV_SHIFT; |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 376 | switch (lcrr) { |
| 377 | case 2: |
| 378 | case 4: |
| 379 | case 8: |
| 380 | lclk_clk = lbiu_clk / lcrr; |
| 381 | break; |
| 382 | default: |
| 383 | /* unknown lcrr */ |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 384 | return -12; |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 385 | } |
Dave Liu | e740c46 | 2006-12-07 21:13:15 +0800 | [diff] [blame] | 386 | |
Kim Phillips | c02cf1e | 2008-03-28 10:18:40 -0500 | [diff] [blame] | 387 | mem_clk = csb_clk * |
Joakim Tjernlund | f2af1bb | 2011-01-27 16:30:54 +0100 | [diff] [blame] | 388 | (1 + ((im->clk.spmr & SPMR_DDRCM) >> SPMR_DDRCM_SHIFT)); |
| 389 | corepll = (im->clk.spmr & SPMR_COREPLL) >> SPMR_COREPLL_SHIFT; |
| 390 | |
Mario Six | 84eb431 | 2019-01-21 09:17:28 +0100 | [diff] [blame] | 391 | #if defined(CONFIG_ARCH_MPC8360) |
Kim Phillips | c02cf1e | 2008-03-28 10:18:40 -0500 | [diff] [blame] | 392 | mem_sec_clk = csb_clk * (1 + |
Joakim Tjernlund | f2af1bb | 2011-01-27 16:30:54 +0100 | [diff] [blame] | 393 | ((im->clk.spmr & SPMR_LBIUCM) >> SPMR_LBIUCM_SHIFT)); |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 394 | #endif |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 395 | |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 396 | corecnf_tab_index = ((corepll & 0x1F) << 2) | ((corepll & 0x60) >> 5); |
Robert P. J. Day | 0c91159 | 2016-05-23 06:49:21 -0400 | [diff] [blame] | 397 | if (corecnf_tab_index > (ARRAY_SIZE(corecnf_tab))) { |
Robert P. J. Day | cbd618f | 2015-12-16 12:25:42 -0500 | [diff] [blame] | 398 | /* corecnf_tab_index is too high, possibly wrong value */ |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 399 | return -11; |
| 400 | } |
| 401 | switch (corecnf_tab[corecnf_tab_index].core_csb_ratio) { |
| 402 | case _byp: |
| 403 | case _x1: |
| 404 | case _1x: |
| 405 | core_clk = csb_clk; |
| 406 | break; |
| 407 | case _1_5x: |
| 408 | core_clk = (3 * csb_clk) / 2; |
| 409 | break; |
| 410 | case _2x: |
| 411 | core_clk = 2 * csb_clk; |
| 412 | break; |
| 413 | case _2_5x: |
Kim Phillips | bae2479 | 2006-11-02 19:47:11 -0600 | [diff] [blame] | 414 | core_clk = (5 * csb_clk) / 2; |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 415 | break; |
| 416 | case _3x: |
| 417 | core_clk = 3 * csb_clk; |
| 418 | break; |
| 419 | default: |
Robert P. J. Day | cbd618f | 2015-12-16 12:25:42 -0500 | [diff] [blame] | 420 | /* unknown core to csb ratio */ |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 421 | return -13; |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 422 | } |
Jon Loeliger | ebc7224 | 2005-08-01 13:20:47 -0500 | [diff] [blame] | 423 | |
Gerlando Falauto | 77cf283 | 2012-10-10 22:13:06 +0000 | [diff] [blame] | 424 | #if defined(CONFIG_QE) |
Joakim Tjernlund | f2af1bb | 2011-01-27 16:30:54 +0100 | [diff] [blame] | 425 | qepmf = (im->clk.spmr & SPMR_CEPMF) >> SPMR_CEPMF_SHIFT; |
| 426 | qepdf = (im->clk.spmr & SPMR_CEPDF) >> SPMR_CEPDF_SHIFT; |
Kim Phillips | bae2479 | 2006-11-02 19:47:11 -0600 | [diff] [blame] | 427 | qe_clk = (pci_sync_in * qepmf) / (1 + qepdf); |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 428 | brg_clk = qe_clk / 2; |
| 429 | #endif |
Jon Loeliger | ebc7224 | 2005-08-01 13:20:47 -0500 | [diff] [blame] | 430 | |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 431 | gd->arch.csb_clk = csb_clk; |
Mario Six | 9164bdd | 2019-01-21 09:17:25 +0100 | [diff] [blame] | 432 | #if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \ |
Mario Six | 60b1123 | 2019-01-21 09:17:29 +0100 | [diff] [blame] | 433 | defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_ARCH_MPC837X) |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 434 | gd->arch.tsec1_clk = tsec1_clk; |
| 435 | gd->arch.tsec2_clk = tsec2_clk; |
| 436 | gd->arch.usbdr_clk = usbdr_clk; |
Mario Six | b2e701c | 2019-01-21 09:17:24 +0100 | [diff] [blame] | 437 | #elif defined(CONFIG_ARCH_MPC8309) |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 438 | gd->arch.usbdr_clk = usbdr_clk; |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 439 | #endif |
Mario Six | 0344f5e | 2019-01-21 09:17:27 +0100 | [diff] [blame] | 440 | #if defined(CONFIG_ARCH_MPC834X) |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 441 | gd->arch.usbmph_clk = usbmph_clk; |
Scott Wood | c036fc9 | 2007-04-16 14:34:19 -0500 | [diff] [blame] | 442 | #endif |
Rini van Zetten | a249617 | 2010-04-15 16:03:05 +0200 | [diff] [blame] | 443 | #if defined(CONFIG_FSL_ESDHC) |
Simon Glass | 9e247d1 | 2012-12-13 20:49:05 +0000 | [diff] [blame] | 444 | gd->arch.sdhc_clk = sdhc_clk; |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 445 | #endif |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 446 | gd->arch.core_clk = core_clk; |
Simon Glass | c2baaec | 2012-12-13 20:48:49 +0000 | [diff] [blame] | 447 | gd->arch.i2c1_clk = i2c1_clk; |
Mario Six | be07e55 | 2019-01-21 09:17:26 +0100 | [diff] [blame] | 448 | #if !defined(CONFIG_ARCH_MPC832X) |
Simon Glass | c2baaec | 2012-12-13 20:48:49 +0000 | [diff] [blame] | 449 | gd->arch.i2c2_clk = i2c2_clk; |
Dave Liu | e740c46 | 2006-12-07 21:13:15 +0800 | [diff] [blame] | 450 | #endif |
Mario Six | b2e701c | 2019-01-21 09:17:24 +0100 | [diff] [blame] | 451 | #if !defined(CONFIG_ARCH_MPC8309) |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 452 | gd->arch.enc_clk = enc_clk; |
Gerlando Falauto | fe201cb | 2012-10-10 22:13:08 +0000 | [diff] [blame] | 453 | #endif |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 454 | gd->arch.lbiu_clk = lbiu_clk; |
| 455 | gd->arch.lclk_clk = lclk_clk; |
Kim Phillips | c02cf1e | 2008-03-28 10:18:40 -0500 | [diff] [blame] | 456 | gd->mem_clk = mem_clk; |
Mario Six | 84eb431 | 2019-01-21 09:17:28 +0100 | [diff] [blame] | 457 | #if defined(CONFIG_ARCH_MPC8360) |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 458 | gd->arch.mem_sec_clk = mem_sec_clk; |
Dave Liu | e740c46 | 2006-12-07 21:13:15 +0800 | [diff] [blame] | 459 | #endif |
Gerlando Falauto | 77cf283 | 2012-10-10 22:13:06 +0000 | [diff] [blame] | 460 | #if defined(CONFIG_QE) |
Simon Glass | 8518b17 | 2012-12-13 20:48:50 +0000 | [diff] [blame] | 461 | gd->arch.qe_clk = qe_clk; |
Simon Glass | 34a194f | 2012-12-13 20:48:44 +0000 | [diff] [blame] | 462 | gd->arch.brg_clk = brg_clk; |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 463 | #endif |
Mario Six | 9164bdd | 2019-01-21 09:17:25 +0100 | [diff] [blame] | 464 | #if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \ |
Mario Six | 60b1123 | 2019-01-21 09:17:29 +0100 | [diff] [blame] | 465 | defined(CONFIG_ARCH_MPC837X) |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 466 | gd->arch.pciexp1_clk = pciexp1_clk; |
| 467 | gd->arch.pciexp2_clk = pciexp2_clk; |
Dave Liu | e0cfec8 | 2007-09-18 12:36:58 +0800 | [diff] [blame] | 468 | #endif |
Tom Rini | d9e6ef5 | 2021-05-14 21:34:27 -0400 | [diff] [blame] | 469 | #if defined(CONFIG_ARCH_MPC837X) |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 470 | gd->arch.sata_clk = sata_clk; |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 471 | #endif |
Kim Phillips | cd9fd70 | 2007-08-15 22:30:19 -0500 | [diff] [blame] | 472 | gd->pci_clk = pci_sync_in; |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 473 | gd->cpu_clk = gd->arch.core_clk; |
| 474 | gd->bus_clk = gd->arch.csb_clk; |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 475 | return 0; |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 476 | |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 477 | } |
| 478 | |
| 479 | /******************************************** |
| 480 | * get_bus_freq |
| 481 | * return system bus freq in Hz |
| 482 | *********************************************/ |
Kim Phillips | bae2479 | 2006-11-02 19:47:11 -0600 | [diff] [blame] | 483 | ulong get_bus_freq(ulong dummy) |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 484 | { |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 485 | return gd->arch.csb_clk; |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 486 | } |
| 487 | |
York Sun | e12ce98 | 2011-08-26 11:32:44 -0700 | [diff] [blame] | 488 | /******************************************** |
| 489 | * get_ddr_freq |
| 490 | * return ddr bus freq in Hz |
| 491 | *********************************************/ |
| 492 | ulong get_ddr_freq(ulong dummy) |
| 493 | { |
| 494 | return gd->mem_clk; |
| 495 | } |
| 496 | |
Mario Six | 2fc5227 | 2019-01-21 09:18:05 +0100 | [diff] [blame] | 497 | int get_serial_clock(void) |
| 498 | { |
| 499 | return get_bus_freq(0); |
| 500 | } |
| 501 | |
Simon Glass | ed38aef | 2020-05-10 11:40:03 -0600 | [diff] [blame] | 502 | static int do_clocks(struct cmd_tbl *cmdtp, int flag, int argc, |
| 503 | char *const argv[]) |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 504 | { |
Wolfgang Denk | 2059104 | 2008-10-19 02:35:49 +0200 | [diff] [blame] | 505 | char buf[32]; |
| 506 | |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 507 | printf("Clock configuration:\n"); |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 508 | printf(" Core: %-4s MHz\n", |
| 509 | strmhz(buf, gd->arch.core_clk)); |
| 510 | printf(" Coherent System Bus: %-4s MHz\n", |
| 511 | strmhz(buf, gd->arch.csb_clk)); |
Gerlando Falauto | 77cf283 | 2012-10-10 22:13:06 +0000 | [diff] [blame] | 512 | #if defined(CONFIG_QE) |
Simon Glass | 8518b17 | 2012-12-13 20:48:50 +0000 | [diff] [blame] | 513 | printf(" QE: %-4s MHz\n", |
| 514 | strmhz(buf, gd->arch.qe_clk)); |
Simon Glass | 34a194f | 2012-12-13 20:48:44 +0000 | [diff] [blame] | 515 | printf(" BRG: %-4s MHz\n", |
| 516 | strmhz(buf, gd->arch.brg_clk)); |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 517 | #endif |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 518 | printf(" Local Bus Controller:%-4s MHz\n", |
| 519 | strmhz(buf, gd->arch.lbiu_clk)); |
| 520 | printf(" Local Bus: %-4s MHz\n", |
| 521 | strmhz(buf, gd->arch.lclk_clk)); |
Wolfgang Denk | 2059104 | 2008-10-19 02:35:49 +0200 | [diff] [blame] | 522 | printf(" DDR: %-4s MHz\n", strmhz(buf, gd->mem_clk)); |
Mario Six | 84eb431 | 2019-01-21 09:17:28 +0100 | [diff] [blame] | 523 | #if defined(CONFIG_ARCH_MPC8360) |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 524 | printf(" DDR Secondary: %-4s MHz\n", |
| 525 | strmhz(buf, gd->arch.mem_sec_clk)); |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 526 | #endif |
Mario Six | b2e701c | 2019-01-21 09:17:24 +0100 | [diff] [blame] | 527 | #if !defined(CONFIG_ARCH_MPC8309) |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 528 | printf(" SEC: %-4s MHz\n", |
| 529 | strmhz(buf, gd->arch.enc_clk)); |
Gerlando Falauto | fe201cb | 2012-10-10 22:13:08 +0000 | [diff] [blame] | 530 | #endif |
Simon Glass | c2baaec | 2012-12-13 20:48:49 +0000 | [diff] [blame] | 531 | printf(" I2C1: %-4s MHz\n", |
| 532 | strmhz(buf, gd->arch.i2c1_clk)); |
Mario Six | be07e55 | 2019-01-21 09:17:26 +0100 | [diff] [blame] | 533 | #if !defined(CONFIG_ARCH_MPC832X) |
Simon Glass | c2baaec | 2012-12-13 20:48:49 +0000 | [diff] [blame] | 534 | printf(" I2C2: %-4s MHz\n", |
| 535 | strmhz(buf, gd->arch.i2c2_clk)); |
Dave Liu | e740c46 | 2006-12-07 21:13:15 +0800 | [diff] [blame] | 536 | #endif |
Rini van Zetten | a249617 | 2010-04-15 16:03:05 +0200 | [diff] [blame] | 537 | #if defined(CONFIG_FSL_ESDHC) |
Simon Glass | 9e247d1 | 2012-12-13 20:49:05 +0000 | [diff] [blame] | 538 | printf(" SDHC: %-4s MHz\n", |
| 539 | strmhz(buf, gd->arch.sdhc_clk)); |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 540 | #endif |
Mario Six | 9164bdd | 2019-01-21 09:17:25 +0100 | [diff] [blame] | 541 | #if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \ |
Mario Six | 60b1123 | 2019-01-21 09:17:29 +0100 | [diff] [blame] | 542 | defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_ARCH_MPC837X) |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 543 | printf(" TSEC1: %-4s MHz\n", |
| 544 | strmhz(buf, gd->arch.tsec1_clk)); |
| 545 | printf(" TSEC2: %-4s MHz\n", |
| 546 | strmhz(buf, gd->arch.tsec2_clk)); |
| 547 | printf(" USB DR: %-4s MHz\n", |
| 548 | strmhz(buf, gd->arch.usbdr_clk)); |
Mario Six | b2e701c | 2019-01-21 09:17:24 +0100 | [diff] [blame] | 549 | #elif defined(CONFIG_ARCH_MPC8309) |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 550 | printf(" USB DR: %-4s MHz\n", |
| 551 | strmhz(buf, gd->arch.usbdr_clk)); |
Dave Liu | a46daea | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 552 | #endif |
Mario Six | 0344f5e | 2019-01-21 09:17:27 +0100 | [diff] [blame] | 553 | #if defined(CONFIG_ARCH_MPC834X) |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 554 | printf(" USB MPH: %-4s MHz\n", |
| 555 | strmhz(buf, gd->arch.usbmph_clk)); |
Scott Wood | c036fc9 | 2007-04-16 14:34:19 -0500 | [diff] [blame] | 556 | #endif |
Mario Six | 9164bdd | 2019-01-21 09:17:25 +0100 | [diff] [blame] | 557 | #if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \ |
Mario Six | 60b1123 | 2019-01-21 09:17:29 +0100 | [diff] [blame] | 558 | defined(CONFIG_ARCH_MPC837X) |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 559 | printf(" PCIEXP1: %-4s MHz\n", |
| 560 | strmhz(buf, gd->arch.pciexp1_clk)); |
| 561 | printf(" PCIEXP2: %-4s MHz\n", |
| 562 | strmhz(buf, gd->arch.pciexp2_clk)); |
Dave Liu | e0cfec8 | 2007-09-18 12:36:58 +0800 | [diff] [blame] | 563 | #endif |
Tom Rini | d9e6ef5 | 2021-05-14 21:34:27 -0400 | [diff] [blame] | 564 | #if defined(CONFIG_ARCH_MPC837X) |
Simon Glass | cc76e9e | 2012-12-13 20:48:47 +0000 | [diff] [blame] | 565 | printf(" SATA: %-4s MHz\n", |
| 566 | strmhz(buf, gd->arch.sata_clk)); |
Dave Liu | 5245ff5 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 567 | #endif |
Jon Loeliger | ebc7224 | 2005-08-01 13:20:47 -0500 | [diff] [blame] | 568 | return 0; |
Eran Liberty | 9095d4a | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 569 | } |
Kim Phillips | d82b077 | 2007-04-30 15:26:21 -0500 | [diff] [blame] | 570 | |
| 571 | U_BOOT_CMD(clocks, 1, 0, do_clocks, |
Peter Tyser | dfb72b8 | 2009-01-27 18:03:12 -0600 | [diff] [blame] | 572 | "print clock configuration", |
Wolfgang Denk | c54781c | 2009-05-24 17:06:54 +0200 | [diff] [blame] | 573 | " clocks" |
Kim Phillips | d82b077 | 2007-04-30 15:26:21 -0500 | [diff] [blame] | 574 | ); |
Mario Six | 7cab147 | 2018-08-06 10:23:36 +0200 | [diff] [blame] | 575 | |
| 576 | #endif |