blob: 1a7c525cdb96f0ce8a501e0d5aad13c570a625bf [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001menu "ARC architecture"
2 depends on ARC
3
4config SYS_ARCH
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09005 default "arc"
6
Alexey Brodkin7739f9f2014-12-25 18:47:45 +03007config SYS_CPU
Alexey Brodkine41a3d52015-01-13 18:35:46 +03008 default "arcv1" if ISA_ARCOMPACT
9 default "arcv2" if ISA_ARCV2
Alexey Brodkin7739f9f2014-12-25 18:47:45 +030010
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090011choice
Alexey Brodkine41a3d52015-01-13 18:35:46 +030012 prompt "ARC Instruction Set"
13 default ISA_ARCOMPACT
14
15config ISA_ARCOMPACT
16 bool "ARCompact ISA"
17 help
18 The original ARC ISA of ARC600/700 cores
19
20config ISA_ARCV2
21 bool "ARC ISA v2"
22 help
23 ISA for the Next Generation ARC-HS cores
24
25endchoice
26
27choice
Alexey Brodkinf431e262015-02-03 13:58:11 +030028 prompt "CPU selection"
Alexey Brodkine41a3d52015-01-13 18:35:46 +030029 default CPU_ARC770D if ISA_ARCOMPACT
30 default CPU_ARCHS38 if ISA_ARCV2
Alexey Brodkinf431e262015-02-03 13:58:11 +030031
32config CPU_ARC750D
33 bool "ARC 750D"
Alexey Brodkine41a3d52015-01-13 18:35:46 +030034 depends on ISA_ARCOMPACT
Michal Simek7e7ba3b2018-07-23 15:55:15 +020035 select ARC_MMU_V2
Alexey Brodkinf431e262015-02-03 13:58:11 +030036 help
37 Choose this option to build an U-Boot for ARC750D CPU.
38
39config CPU_ARC770D
40 bool "ARC 770D"
Alexey Brodkine41a3d52015-01-13 18:35:46 +030041 depends on ISA_ARCOMPACT
Michal Simek7e7ba3b2018-07-23 15:55:15 +020042 select ARC_MMU_V3
Alexey Brodkinf431e262015-02-03 13:58:11 +030043 help
44 Choose this option to build an U-Boot for ARC770D CPU.
45
Alexey Brodkine41a3d52015-01-13 18:35:46 +030046config CPU_ARCEM6
47 bool "ARC EM6"
Alexey Brodkine41a3d52015-01-13 18:35:46 +030048 depends on ISA_ARCV2
Michal Simek7e7ba3b2018-07-23 15:55:15 +020049 select ARC_MMU_ABSENT
Alexey Brodkine41a3d52015-01-13 18:35:46 +030050 help
51 Next Generation ARC Core based on ISA-v2 ISA without MMU.
52
53config CPU_ARCHS36
54 bool "ARC HS36"
Alexey Brodkine41a3d52015-01-13 18:35:46 +030055 depends on ISA_ARCV2
Michal Simek7e7ba3b2018-07-23 15:55:15 +020056 select ARC_MMU_ABSENT
Alexey Brodkine41a3d52015-01-13 18:35:46 +030057 help
58 Next Generation ARC Core based on ISA-v2 ISA without MMU.
59
60config CPU_ARCHS38
61 bool "ARC HS38"
Alexey Brodkine41a3d52015-01-13 18:35:46 +030062 depends on ISA_ARCV2
Michal Simek7e7ba3b2018-07-23 15:55:15 +020063 select ARC_MMU_V4
Alexey Brodkine41a3d52015-01-13 18:35:46 +030064 help
65 Next Generation ARC Core based on ISA-v2 ISA with MMU.
66
Alexey Brodkinf431e262015-02-03 13:58:11 +030067endchoice
68
69choice
70 prompt "MMU Version"
71 default ARC_MMU_V3 if CPU_ARC770D
72 default ARC_MMU_V2 if CPU_ARC750D
Alexey Brodkine41a3d52015-01-13 18:35:46 +030073 default ARC_MMU_ABSENT if CPU_ARCEM6
74 default ARC_MMU_ABSENT if CPU_ARCHS36
75 default ARC_MMU_V4 if CPU_ARCHS38
76
77config ARC_MMU_ABSENT
78 bool "No MMU"
79 help
80 No MMU
Alexey Brodkinf431e262015-02-03 13:58:11 +030081
82config ARC_MMU_V2
83 bool "MMU v2"
84 depends on CPU_ARC750D
85 help
86 Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
87 when 2 D-TLB and 1 I-TLB entries index into same 2way set.
88
89config ARC_MMU_V3
90 bool "MMU v3"
91 depends on CPU_ARC770D
92 help
93 Introduced with ARC700 4.10: New Features
94 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
95 Shared Address Spaces (SASID)
96
Alexey Brodkine41a3d52015-01-13 18:35:46 +030097config ARC_MMU_V4
98 bool "MMU v4"
99 depends on CPU_ARCHS38
100 help
101 Introduced as a part of ARC HS38 release.
102
Alexey Brodkinf431e262015-02-03 13:58:11 +0300103endchoice
104
Alexey Brodkincbd76c32015-02-03 13:58:14 +0300105config CPU_BIG_ENDIAN
106 bool "Enable Big Endian Mode"
Alexey Brodkincbd76c32015-02-03 13:58:14 +0300107 help
108 Build kernel for Big Endian Mode of ARC CPU
109
Alexey Brodkin6b95cca2015-02-03 13:58:13 +0300110config SYS_ICACHE_OFF
Trevor Woernerba64b8b2019-05-03 09:40:59 -0400111 bool "Do not enable icache"
Trevor Woernerba64b8b2019-05-03 09:40:59 -0400112 help
113 Do not enable instruction cache in U-Boot.
Alexey Brodkin6b95cca2015-02-03 13:58:13 +0300114
Trevor Woerner43ec7e02019-05-03 09:41:00 -0400115config SPL_SYS_ICACHE_OFF
116 bool "Do not enable icache in SPL"
117 depends on SPL
118 default SYS_ICACHE_OFF
119 help
120 Do not enable instruction cache in SPL.
121
Alexey Brodkin6b95cca2015-02-03 13:58:13 +0300122config SYS_DCACHE_OFF
Trevor Woernerba64b8b2019-05-03 09:40:59 -0400123 bool "Do not enable dcache"
Trevor Woernerba64b8b2019-05-03 09:40:59 -0400124 help
125 Do not enable data cache in U-Boot.
Alexey Brodkin6b95cca2015-02-03 13:58:13 +0300126
Trevor Woerner43ec7e02019-05-03 09:41:00 -0400127config SPL_SYS_DCACHE_OFF
128 bool "Do not enable dcache in SPL"
129 depends on SPL
130 default SYS_DCACHE_OFF
131 help
132 Do not enable data cache in SPL.
133
Eugeniy Paltsev04011ab2018-03-21 15:58:59 +0300134menuconfig ARC_DBG
135 bool "ARC debugging"
Eugeniy Paltsev04011ab2018-03-21 15:58:59 +0300136
137if ARC_DBG
138
139config ARC_DBG_IOC_ENABLE
140 bool "Enable IO coherency unit"
141 depends on CPU_ARCHS38
Eugeniy Paltsev04011ab2018-03-21 15:58:59 +0300142 help
143 Enable IO coherency unit to debug problems with caches and
144 DMA peripherals.
145 NOTE: as of today linux will not work properly if this option
146 is enabled in u-boot!
147
148endif
149
Alexey Brodkinf431e262015-02-03 13:58:11 +0300150choice
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900151 prompt "Target select"
Vlad Zakharova7a67492017-03-21 14:49:48 +0300152 default TARGET_AXS103
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900153
154config TARGET_TB100
155 bool "Support tb100"
156
Alexey Brodkin1a116372016-08-04 14:35:01 +0300157config TARGET_NSIM
Alexey Brodkin8244d692019-12-26 14:47:42 +0300158 bool "Support ARC simulation & prototyping platforms"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900159
Vlad Zakharova7a67492017-03-21 14:49:48 +0300160config TARGET_AXS101
161 bool "Support Synopsys Designware SDP board AXS101"
162
163config TARGET_AXS103
164 bool "Support Synopsys Designware SDP board AXS103"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900165
Alexey Brodkinddbf6972018-10-18 09:54:58 +0300166config TARGET_EMSDP
167 bool "Synopsys EM Software Development Platform"
Alexey Brodkin4b2705b2018-05-28 15:27:43 +0300168 select CPU_ARCEM6
169
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300170config TARGET_HSDK
Eugeniy Paltseve87a5522020-04-22 00:33:40 +0300171 bool "Support Synopsys HSDK or HSDK-4xD board"
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300172
Alexey Brodkinc15be5b2018-01-24 21:37:14 +0300173config TARGET_IOT_DEVKIT
174 bool "Synopsys Brite IoT Development kit"
175 select CPU_ARCEM6
176
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900177endchoice
178
179source "board/abilis/tb100/Kconfig"
Alexey Brodkinc3b853a2016-08-04 15:00:35 +0300180source "board/synopsys/axs10x/Kconfig"
Alexey Brodkinddbf6972018-10-18 09:54:58 +0300181source "board/synopsys/emsdp/Kconfig"
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300182source "board/synopsys/hsdk/Kconfig"
Alexey Brodkinc15be5b2018-01-24 21:37:14 +0300183source "board/synopsys/iot_devkit/Kconfig"
Alexey Brodkin8244d692019-12-26 14:47:42 +0300184source "board/synopsys/nsim/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900185
186endmenu