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git01.mediatek.com / filogic / uboot / 8c563a197b97aeafcda2c52f34ef1d7de0693140 / . / include / configs / db-88f6820-gp.h
blob: 41dadfebb94803668a5a22ac2e7161bdd1fc0cab [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]2/*
3 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]4 */
5
6#ifndef _CONFIG_DB_88F6820_GP_H
7#define _CONFIG_DB_88F6820_GP_H
8
9/*
10 * High Level Configuration Options (easy to change)
11 */
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]12
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]13/* I2C */
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]14#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]15
Konstantin Porotchkinc6cb8b72018-08-29 16:34:53 +0300[diff] [blame]16/*
Stefan Roese10aad202015-06-29 14:58:14 +0200[diff] [blame]17 * SATA/SCSI/AHCI configuration
18 */
Stefan Roese10aad202015-06-29 14:58:14 +0200[diff] [blame]19#define CONFIG_SCSI_AHCI_PLAT
20#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
21#define CONFIG_SYS_SCSI_MAX_LUN 1
22#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
23 CONFIG_SYS_SCSI_MAX_LUN)
24
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]25/* Environment in SPI NOR flash */
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]26
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]27#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
28
Stefan Roesec22b7012015-08-11 12:50:58 +0200[diff] [blame]29/* PCIe support */
Stefan Roese83097cf2015-11-25 07:37:00 +0100[diff] [blame]30#ifndef CONFIG_SPL_BUILD
Stefan Roesec22b7012015-08-11 12:50:58 +0200[diff] [blame]31#define CONFIG_PCI_SCAN_SHOW
Stefan Roese83097cf2015-11-25 07:37:00 +0100[diff] [blame]32#endif
Stefan Roesec22b7012015-08-11 12:50:58 +0200[diff] [blame]33
Kevin Smith2366bcc2015-05-18 16:09:46 +0000[diff] [blame]34/* Keep device tree and initrd in lower memory so the kernel can access them */
35#define CONFIG_EXTRA_ENV_SETTINGS \
36 "fdt_high=0x10000000\0" \
37 "initrd_high=0x10000000\0"
38
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]39/* SPL */
Stefan Roese6f7d6672015-07-20 11:20:40 +0200[diff] [blame]40/*
41 * Select the boot device here
42 *
43 * Currently supported are:
44 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
45 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
46 */
47#define SPL_BOOT_SPI_NOR_FLASH 1
48#define SPL_BOOT_SDIO_MMC_CARD 2
49#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
50
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]51/* Defines for SPL */
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]52#define CONFIG_SPL_SIZE (140 << 10)
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]53#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
54
55#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
56#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
57
Stefan Roese83097cf2015-11-25 07:37:00 +0100[diff] [blame]58#ifdef CONFIG_SPL_BUILD
59#define CONFIG_SYS_MALLOC_SIMPLE
60#endif
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]61
62#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
63#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
64
Stefan Roese6f7d6672015-07-20 11:20:40 +0200[diff] [blame]65#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
66/* SPL related MMC defines */
Stefan Roese6f7d6672015-07-20 11:20:40 +0200[diff] [blame]67#ifdef CONFIG_SPL_BUILD
68#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
69#endif
70#endif
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]71
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]72/*
73 * mv-common.h should be defined after CMD configs since it used them
74 * to enable certain macros
75 */
76#include "mv-common.h"
77
78#endif /* _CONFIG_DB_88F6820_GP_H */