Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 8c2c7ec22e0fba043630d0d5e1b1eb2cac663f42 / . / include / configs / apf27.h
blob: b10c48c20e3921da4b12673ec716b45ce834f629 [file] [log] [blame]
trem0053e3c2013-09-10 22:08:39 +0200[diff] [blame]1/*
2 *
3 * Configuration settings for the Armadeus Project motherboard APF27
4 *
5 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
13#define CONFIG_VERSION_VARIABLE
14#define CONFIG_ENV_VERSION 10
15#define CONFIG_IDENT_STRING " apf27 patch 3.10"
16#define CONFIG_BOARD_NAME apf27
17
18/*
19 * SoC configurations
20 */
21#define CONFIG_ARM926EJS /* this is an ARM926EJS CPU */
22#define CONFIG_MX27 /* in a Freescale i.MX27 Chip */
23#define CONFIG_MACH_TYPE 1698 /* APF27 */
24#define CONFIG_SYS_GENERIC_BOARD
25
26/*
27 * Enable the call to miscellaneous platform dependent initialization.
28 */
29#define CONFIG_SYS_NO_FLASH /* to be define before <config_cmd_default.h> */
30
31/*
32 * Board display option
33 */
34#define CONFIG_DISPLAY_BOARDINFO
35#define CONFIG_DISPLAY_CPUINFO
36
37/*
38 * SPL
39 */
40#define CONFIG_SPL
41#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
42#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
43#define CONFIG_SPL_MAX_SIZE 2048
44#define CONFIG_SPL_TEXT_BASE 0xA0000000
45
46/* NAND boot config */
47#define CONFIG_SPL_NAND_SUPPORT
48#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
49#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
50#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
51#define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800
52
53/*
54 * BOOTP options
55 */
56#define CONFIG_BOOTP_SUBNETMASK
57#define CONFIG_BOOTP_GATEWAY
58#define CONFIG_BOOTP_HOSTNAME
59#define CONFIG_BOOTP_BOOTPATH
60#define CONFIG_BOOTP_BOOTFILESIZE
61#define CONFIG_BOOTP_DNS
62#define CONFIG_BOOTP_DNS2
63
64#define CONFIG_HOSTNAME CONFIG_BOARD_NAME
65#define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
66
67/*
68 * U-Boot Commands
69 */
70#include <config_cmd_default.h>
71
72#define CONFIG_CMD_ASKENV /* ask for env variable */
73#define CONFIG_CMD_BSP /* Board Specific functions */
74#define CONFIG_CMD_CACHE /* icache, dcache */
75#define CONFIG_CMD_DATE
76#define CONFIG_CMD_DHCP /* DHCP Support */
77#define CONFIG_CMD_DNS
78#define CONFIG_CMD_EEPROM
79#define CONFIG_CMD_EXT2
80#define CONFIG_CMD_FAT /* FAT support */
81#define CONFIG_CMD_IMX_FUSE /* imx iim fuse */
82#define CONFIG_CMD_I2C
83#define CONFIG_CMD_MII /* MII support */
84#define CONFIG_CMD_MMC
85#define CONFIG_CMD_MTDPARTS /* MTD partition support */
86#define CONFIG_CMD_NAND /* NAND support */
87#define CONFIG_CMD_NAND_LOCK_UNLOCK
88#define CONFIG_CMD_NAND_TRIMFFS
89#define CONFIG_CMD_NFS /* NFS support */
90#define CONFIG_CMD_PING /* ping support */
91#define CONFIG_CMD_SETEXPR /* setexpr support */
92#define CONFIG_CMD_UBI
93#define CONFIG_CMD_UBIFS
94
95/*
96 * Memory configurations
97 */
98#define CONFIG_NR_DRAM_POPULATED 1
99#define CONFIG_NR_DRAM_BANKS 2
100
101#define ACFG_SDRAM_MBYTE_SYZE 64
102
103#define PHYS_SDRAM_1 0xA0000000
104#define PHYS_SDRAM_2 0xB0000000
105#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
106#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10))
107#define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */
108#define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */
109
110#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \
111 + PHYS_SDRAM_1_SIZE - 0x0100000)
112
113#define CONFIG_SYS_TEXT_BASE 0xA0000800
114
115/*
116 * FLASH organization
117 */
118#define ACFG_MONITOR_OFFSET 0x00000000
119#define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */
120#define CONFIG_ENV_IS_IN_NAND
121#define CONFIG_ENV_OVERWRITE
122#define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */
123#define CONFIG_ENV_SIZE 0x00020000 /* 128kB */
124#define CONFIG_ENV_RANGE 0X00080000 /* 512kB */
125#define CONFIG_ENV_OFFSET_REDUND \
126 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */
127#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */
128#define CONFIG_FIRMWARE_OFFSET 0x00200000
129#define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */
130#define CONFIG_KERNEL_OFFSET 0x00300000
131#define CONFIG_ROOTFS_OFFSET 0x00800000
132
133#define CONFIG_MTDMAP "mxc_nand.0"
134#define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP
135#define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \
136 ":1M(u-boot)ro," \
137 "512K(env)," \
138 "512K(env2)," \
139 "512K(firmware)," \
140 "512K(dtb)," \
141 "5M(kernel)," \
142 "-(rootfs)"
143
144/*
145 * U-Boot general configurations
146 */
147#define CONFIG_SYS_LONGHELP
148#define CONFIG_SYS_PROMPT "BIOS> " /* prompt string */
149#define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */
150#define CONFIG_SYS_PBSIZE \
151 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
152 /* Print buffer size */
153#define CONFIG_SYS_MAXARGS 16 /* max command args */
154#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
155 /* Boot argument buffer size */
156#define CONFIG_AUTO_COMPLETE
157#define CONFIG_CMDLINE_EDITING
158#define CONFIG_SYS_HUSH_PARSER /* enable the "hush" shell */
159#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* secondary prompt string */
160#define CONFIG_ENV_VARS_UBOOT_CONFIG
161#define CONFIG_PREBOOT "run check_flash check_env;"
162
163
164/*
165 * Boot Linux
166 */
167#define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
168#define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
169#define CONFIG_INITRD_TAG /* send initrd params */
170
171#define CONFIG_OF_LIBFDT
172
173#define CONFIG_BOOTDELAY 5
174#define CONFIG_ZERO_BOOTDELAY_CHECK
175#define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
176#define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \
177 __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
178 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
179
180#define ACFG_CONSOLE_DEV ttySMX0
181#define CONFIG_BOOTCOMMAND "run ubifsboot"
182#define CONFIG_SYS_AUTOLOAD "no"
183/*
184 * Default load address for user programs and kernel
185 */
186#define CONFIG_LOADADDR 0xA0000000
187#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
188
189/*
190 * Extra Environments
191 */
192#define CONFIG_EXTRA_ENV_SETTINGS \
193 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \
194 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \
195 "mtdparts=" MTDPARTS_DEFAULT "\0" \
196 "partition=nand0,6\0" \
197 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \
198 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \
199 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \
200 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \
201 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \
202 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \
203 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \
204 "kernel_addr_r=A0000000\0" \
205 "check_env=if test -n ${flash_env_version}; " \
206 "then env default env_version; " \
207 "else env set flash_env_version ${env_version}; env save; "\
208 "fi; " \
209 "if itest ${flash_env_version} < ${env_version}; then " \
210 "echo \"*** Warning - Environment version" \
211 " change suggests: run flash_reset_env; reset\"; "\
212 "env default flash_reset_env; "\
213 "fi; \0" \
214 "check_flash=nand lock; nand unlock ${env_addr}; \0" \
215 "flash_reset_env=env default -f -a; saveenv; run update_env;" \
216 "echo Flash environment variables erased!\0" \
217 "download_uboot=tftpboot ${loadaddr} ${board_name}" \
218 "-u-boot-with-spl.bin\0" \
219 "flash_uboot=nand unlock ${u-boot_addr} ;" \
220 "nand erase.part u-boot;" \
221 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
222 "then nand lock; nand unlock ${env_addr};" \
223 "echo Flashing of uboot succeed;" \
224 "else echo Flashing of uboot failed;" \
225 "fi; \0" \
226 "update_uboot=run download_uboot flash_uboot\0" \
227 "download_env=tftpboot ${loadaddr} ${board_name}" \
228 "-u-boot-env.txt\0" \
229 "flash_env=env import -t ${loadaddr}; env save; \0" \
230 "update_env=run download_env flash_env\0" \
231 "update_all=run update_env update_uboot\0" \
232 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \
233
234/*
235 * Serial Driver
236 */
237#define CONFIG_MXC_UART
238#define CONFIG_CONS_INDEX 1
239#define CONFIG_BAUDRATE 115200
240#define CONFIG_MXC_UART_BASE UART1_BASE
241
242/*
243 * GPIO
244 */
245#define CONFIG_MXC_GPIO
246
247/*
248 * NOR
249 */
250
251/*
252 * NAND
253 */
254#define CONFIG_NAND_MXC
255
256#define CONFIG_MXC_NAND_REGS_BASE 0xD8000000
257#define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
258#define CONFIG_SYS_MAX_NAND_DEVICE 1
259
260#define CONFIG_MXC_NAND_HWECC
261#define CONFIG_SYS_NAND_LARGEPAGE
262#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
263#define CONFIG_SYS_NAND_PAGE_SIZE 2048
264#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
265#define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \
266 CONFIG_SYS_NAND_PAGE_SIZE
267#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
268#define CONFIG_SYS_NAND_BAD_BLOCK_POS 11
269#define NAND_MAX_CHIPS 1
270
271#define CONFIG_FLASH_SHOW_PROGRESS 45
272#define CONFIG_SYS_NAND_QUIET 1
273
274/*
275 * Partitions & Filsystems
276 */
277#define CONFIG_MTD_DEVICE
278#define CONFIG_MTD_PARTITIONS
279#define CONFIG_DOS_PARTITION
280#define CONFIG_SUPPORT_VFAT
281
282/*
283 * UBIFS
284 */
285#define CONFIG_RBTREE
286#define CONFIG_LZO
287
288/*
289 * Ethernet (on SOC imx FEC)
290 */
291#define CONFIG_FEC_MXC
292#define CONFIG_FEC_MXC_PHYADDR 0x1f
293#define CONFIG_MII /* MII PHY management */
294
295/*
trem97852892013-09-10 22:08:40 +0200[diff] [blame]296 * FPGA
297 */
298#ifndef CONFIG_SPL_BUILD
299#define CONFIG_FPGA
300#endif
301#define CONFIG_FPGA_COUNT 1
302#define CONFIG_FPGA_XILINX
303#define CONFIG_FPGA_SPARTAN3
304#define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */
305#define CONFIG_SYS_FPGA_PROG_FEEDBACK
306#define CONFIG_SYS_FPGA_CHECK_CTRLC
307#define CONFIG_SYS_FPGA_CHECK_ERROR
308
309/*
trem0053e3c2013-09-10 22:08:39 +0200[diff] [blame]310 * Fuses - IIM
311 */
312#ifdef CONFIG_CMD_IMX_FUSE
313#define IIM_MAC_BANK 0
314#define IIM_MAC_ROW 5
315#define IIM0_SCC_KEY 11
316#define IIM1_SUID 1
317#endif
318
319/*
320 * I2C
321 */
322
323#ifdef CONFIG_CMD_I2C
trem03997412013-09-21 18:13:36 +0200[diff] [blame]324#define CONFIG_SYS_I2C
325#define CONFIG_SYS_I2C_MXC
326#define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */
327#define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
328#define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */
329#define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
trem0053e3c2013-09-10 22:08:39 +0200[diff] [blame]330#define CONFIG_SYS_I2C_NOPROBES { }
331
332#ifdef CONFIG_CMD_EEPROM
333# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */
334# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
335#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
336#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */
337#endif /* CONFIG_CMD_EEPROM */
338#endif /* CONFIG_CMD_I2C */
339
340/*
341 * SD/MMC
342 */
343#ifdef CONFIG_CMD_MMC
344#define CONFIG_MMC
345#define CONFIG_GENERIC_MMC
346#define CONFIG_MXC_MMC
347#define CONFIG_MXC_MCI_REGS_BASE 0x10014000
348#endif
349
350/*
351 * RTC
352 */
353#ifdef CONFIG_CMD_DATE
354#define CONFIG_RTC_DS1374
355#define CONFIG_SYS_RTC_BUS_NUM 0
356#endif /* CONFIG_CMD_DATE */
357
358/*
trem0053e3c2013-09-10 22:08:39 +0200[diff] [blame]359 * PLL
360 *
361 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
362 * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
363 */
364#define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */
365
366#if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
367/* micron 64MB */
368#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
369#define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
370#endif
371
372#if (ACFG_SDRAM_MBYTE_SYZE == 128)
373/* micron 128MB */
374#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
375#define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
376#endif
377
378#if (ACFG_SDRAM_MBYTE_SYZE == 256)
379/* micron 256MB */
380#define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
381#define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */
382#endif
383
384#endif /* __CONFIG_H */