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Mario Six3e67cb22019-01-21 09:18:23 +01001/*
2 * Internal Definitions
3 */
Simon Glassfb64e362020-05-10 11:40:09 -06004#include <linux/stringify.h>
Mario Six3e67cb22019-01-21 09:18:23 +01005#define BOOTFLASH_START 0xF0000000
6
Mario Six3e67cb22019-01-21 09:18:23 +01007/*
8 * DDR Setup
9 */
10#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */
11#define CONFIG_SYS_SDRAM_BASE2 (CONFIG_SYS_SDRAM_BASE + 0x10000000) /* +256M */
12
13#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
14 DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
15
16#define CFG_83XX_DDR_USES_CS0
17
18/*
19 * Manually set up DDR parameters
20 */
Tom Rini2f05fef2022-07-23 13:04:56 -040021#define CONFIG_SYS_SDRAM_SIZE 0x80000000 /* 2048 MiB */
Mario Six3e67cb22019-01-21 09:18:23 +010022
23/*
24 * The reserved memory
25 */
Mario Six3e67cb22019-01-21 09:18:23 +010026#define CONFIG_SYS_FLASH_BASE 0xF0000000
27
Mario Six3e67cb22019-01-21 09:18:23 +010028/* Reserve 768 kB for Mon */
Mario Six3e67cb22019-01-21 09:18:23 +010029
30/*
31 * Initial RAM Base Address Setup
32 */
Mario Six3e67cb22019-01-21 09:18:23 +010033#define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
34#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */
Mario Six3e67cb22019-01-21 09:18:23 +010035/*
36 * Init Local Bus Memory Controller:
37 *
38 * Bank Bus Machine PortSz Size Device
39 * ---- --- ------- ------ ----- ------
40 * 0 Local GPCM 16 bit 256MB FLASH
41 * 1 Local GPCM 8 bit 128MB GPIO/PIGGY
42 *
43 */
44
45/*
46 * FLASH on the Local Bus
47 */
48#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
49
Mario Six3e67cb22019-01-21 09:18:23 +010050#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
51
Mario Six3e67cb22019-01-21 09:18:23 +010052/* I2C */
Mario Six3e67cb22019-01-21 09:18:23 +010053#define CONFIG_SYS_NUM_I2C_BUSES 4
54#define CONFIG_SYS_I2C_MAX_HOPS 1
Mario Six3e67cb22019-01-21 09:18:23 +010055#define CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP} }, \
56 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
57 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
58 {1, {I2C_NULL_HOP} } }
59
Mario Six3e67cb22019-01-21 09:18:23 +010060#if defined(CONFIG_CMD_NAND)
61#define CONFIG_NAND_KMETER1
Mario Six3e67cb22019-01-21 09:18:23 +010062#define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE
63#endif
64
65/*
66 * For booting Linux, the board info and command line data
67 * have to be in the first 8 MB of memory, since this is
68 * the maximum mapped by the Linux kernel during initialization.
69 */
70#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
71
72/*
73 * Environment
74 */
75
Mario Six3e67cb22019-01-21 09:18:23 +010076/*
77 * Environment Configuration
78 */
Mario Six3e67cb22019-01-21 09:18:23 +010079#ifndef CONFIG_KM_DEF_ENV /* if not set by keymile-common.h */
80#define CONFIG_KM_DEF_ENV "km-common=empty\0"
81#endif
82
83#ifndef CONFIG_KM_DEF_ARCH
84#define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0"
85#endif
86
87#define CONFIG_EXTRA_ENV_SETTINGS \
88 CONFIG_KM_DEF_ENV \
89 CONFIG_KM_DEF_ARCH \
90 "newenv=" \
91 "prot off " __stringify(CONFIG_ENV_ADDR) " +0x40000 && " \
92 "era " __stringify(CONFIG_ENV_ADDR) " +0x40000\0" \
93 "unlock=yes\0" \
94 ""
95
Mario Six3e67cb22019-01-21 09:18:23 +010096/*
97 * QE UEC ethernet configuration
98 */
99#define CONFIG_UEC_ETH