Scott Jiang | 0b38223 | 2011-11-29 18:03:26 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Analog Devices SPI3 controller driver |
| 3 | * |
| 4 | * Copyright (c) 2011 Analog Devices Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 18 | */ |
| 19 | |
| 20 | #include <common.h> |
| 21 | #include <malloc.h> |
| 22 | #include <spi.h> |
| 23 | |
| 24 | #include <asm/blackfin.h> |
Sonic Zhang | 983a2a9 | 2014-01-28 13:53:34 +0800 | [diff] [blame] | 25 | #include <asm/clock.h> |
Scott Jiang | 0b38223 | 2011-11-29 18:03:26 -0500 | [diff] [blame] | 26 | #include <asm/gpio.h> |
| 27 | #include <asm/portmux.h> |
| 28 | #include <asm/mach-common/bits/spi6xx.h> |
| 29 | |
| 30 | struct bfin_spi_slave { |
| 31 | struct spi_slave slave; |
| 32 | u32 control, clock; |
| 33 | struct bfin_spi_regs *regs; |
| 34 | int cs_pol; |
| 35 | }; |
| 36 | |
| 37 | #define to_bfin_spi_slave(s) container_of(s, struct bfin_spi_slave, slave) |
| 38 | |
| 39 | #define gpio_cs(cs) ((cs) - MAX_CTRL_CS) |
| 40 | #ifdef CONFIG_BFIN_SPI_GPIO_CS |
| 41 | # define is_gpio_cs(cs) ((cs) > MAX_CTRL_CS) |
| 42 | #else |
| 43 | # define is_gpio_cs(cs) 0 |
| 44 | #endif |
| 45 | |
| 46 | int spi_cs_is_valid(unsigned int bus, unsigned int cs) |
| 47 | { |
| 48 | if (is_gpio_cs(cs)) |
| 49 | return gpio_is_valid(gpio_cs(cs)); |
| 50 | else |
| 51 | return (cs >= 1 && cs <= MAX_CTRL_CS); |
| 52 | } |
| 53 | |
| 54 | void spi_cs_activate(struct spi_slave *slave) |
| 55 | { |
| 56 | struct bfin_spi_slave *bss = to_bfin_spi_slave(slave); |
| 57 | |
| 58 | if (is_gpio_cs(slave->cs)) { |
| 59 | unsigned int cs = gpio_cs(slave->cs); |
| 60 | gpio_set_value(cs, bss->cs_pol); |
| 61 | } else { |
| 62 | u32 ssel; |
| 63 | ssel = bfin_read32(&bss->regs->ssel); |
| 64 | ssel |= 1 << slave->cs; |
| 65 | if (bss->cs_pol) |
Jagan Teki | 42e3db7 | 2015-10-23 01:35:47 +0530 | [diff] [blame] | 66 | ssel |= BIT(8) << slave->cs; |
Scott Jiang | 0b38223 | 2011-11-29 18:03:26 -0500 | [diff] [blame] | 67 | else |
Jagan Teki | 42e3db7 | 2015-10-23 01:35:47 +0530 | [diff] [blame] | 68 | ssel &= ~(BIT(8) << slave->cs); |
Scott Jiang | 0b38223 | 2011-11-29 18:03:26 -0500 | [diff] [blame] | 69 | bfin_write32(&bss->regs->ssel, ssel); |
| 70 | } |
| 71 | |
| 72 | SSYNC(); |
| 73 | } |
| 74 | |
| 75 | void spi_cs_deactivate(struct spi_slave *slave) |
| 76 | { |
| 77 | struct bfin_spi_slave *bss = to_bfin_spi_slave(slave); |
| 78 | |
| 79 | if (is_gpio_cs(slave->cs)) { |
| 80 | unsigned int cs = gpio_cs(slave->cs); |
| 81 | gpio_set_value(cs, !bss->cs_pol); |
| 82 | } else { |
| 83 | u32 ssel; |
| 84 | ssel = bfin_read32(&bss->regs->ssel); |
| 85 | if (bss->cs_pol) |
Jagan Teki | 42e3db7 | 2015-10-23 01:35:47 +0530 | [diff] [blame] | 86 | ssel &= ~(BIT(8) << slave->cs); |
Scott Jiang | 0b38223 | 2011-11-29 18:03:26 -0500 | [diff] [blame] | 87 | else |
Jagan Teki | 42e3db7 | 2015-10-23 01:35:47 +0530 | [diff] [blame] | 88 | ssel |= BIT(8) << slave->cs; |
Scott Jiang | 0b38223 | 2011-11-29 18:03:26 -0500 | [diff] [blame] | 89 | /* deassert cs */ |
| 90 | bfin_write32(&bss->regs->ssel, ssel); |
| 91 | SSYNC(); |
| 92 | /* disable cs */ |
| 93 | ssel &= ~(1 << slave->cs); |
| 94 | bfin_write32(&bss->regs->ssel, ssel); |
| 95 | } |
| 96 | |
| 97 | SSYNC(); |
| 98 | } |
| 99 | |
| 100 | void spi_init() |
| 101 | { |
| 102 | } |
| 103 | |
| 104 | #define SPI_PINS(n) \ |
| 105 | { 0, P_SPI##n##_SCK, P_SPI##n##_MISO, P_SPI##n##_MOSI, 0 } |
| 106 | static unsigned short pins[][5] = { |
| 107 | #ifdef SPI0_REGBASE |
| 108 | [0] = SPI_PINS(0), |
| 109 | #endif |
| 110 | #ifdef SPI1_REGBASE |
| 111 | [1] = SPI_PINS(1), |
| 112 | #endif |
| 113 | #ifdef SPI2_REGBASE |
| 114 | [2] = SPI_PINS(2), |
| 115 | #endif |
| 116 | }; |
| 117 | |
| 118 | #define SPI_CS_PINS(n) \ |
| 119 | { \ |
| 120 | P_SPI##n##_SSEL1, P_SPI##n##_SSEL2, P_SPI##n##_SSEL3, \ |
| 121 | P_SPI##n##_SSEL4, P_SPI##n##_SSEL5, P_SPI##n##_SSEL6, \ |
| 122 | P_SPI##n##_SSEL7, \ |
| 123 | } |
| 124 | static const unsigned short cs_pins[][7] = { |
| 125 | #ifdef SPI0_REGBASE |
| 126 | [0] = SPI_CS_PINS(0), |
| 127 | #endif |
| 128 | #ifdef SPI1_REGBASE |
| 129 | [1] = SPI_CS_PINS(1), |
| 130 | #endif |
| 131 | #ifdef SPI2_REGBASE |
| 132 | [2] = SPI_CS_PINS(2), |
| 133 | #endif |
| 134 | }; |
| 135 | |
| 136 | void spi_set_speed(struct spi_slave *slave, uint hz) |
| 137 | { |
| 138 | struct bfin_spi_slave *bss = to_bfin_spi_slave(slave); |
Sonic Zhang | 983a2a9 | 2014-01-28 13:53:34 +0800 | [diff] [blame] | 139 | ulong clk; |
Scott Jiang | 0b38223 | 2011-11-29 18:03:26 -0500 | [diff] [blame] | 140 | u32 clock; |
| 141 | |
Sonic Zhang | 983a2a9 | 2014-01-28 13:53:34 +0800 | [diff] [blame] | 142 | clk = get_spi_clk(); |
| 143 | clock = clk / hz; |
Scott Jiang | 0b38223 | 2011-11-29 18:03:26 -0500 | [diff] [blame] | 144 | if (clock) |
| 145 | clock--; |
| 146 | bss->clock = clock; |
| 147 | } |
| 148 | |
| 149 | struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, |
| 150 | unsigned int max_hz, unsigned int mode) |
| 151 | { |
| 152 | struct bfin_spi_slave *bss; |
| 153 | u32 reg_base; |
| 154 | |
| 155 | if (!spi_cs_is_valid(bus, cs)) |
| 156 | return NULL; |
| 157 | |
Scott Jiang | 0b38223 | 2011-11-29 18:03:26 -0500 | [diff] [blame] | 158 | switch (bus) { |
| 159 | #ifdef SPI0_REGBASE |
| 160 | case 0: |
| 161 | reg_base = SPI0_REGBASE; |
| 162 | break; |
| 163 | #endif |
| 164 | #ifdef SPI1_REGBASE |
| 165 | case 1: |
| 166 | reg_base = SPI1_REGBASE; |
| 167 | break; |
| 168 | #endif |
| 169 | #ifdef SPI2_REGBASE |
| 170 | case 2: |
| 171 | reg_base = SPI2_REGBASE; |
| 172 | break; |
| 173 | #endif |
| 174 | default: |
Axel Lin | c6a4970 | 2013-12-02 12:57:44 +0800 | [diff] [blame] | 175 | debug("%s: invalid bus %u\n", __func__, bus); |
Scott Jiang | 0b38223 | 2011-11-29 18:03:26 -0500 | [diff] [blame] | 176 | return NULL; |
| 177 | } |
| 178 | |
Simon Glass | d034a95 | 2013-03-18 19:23:40 +0000 | [diff] [blame] | 179 | bss = spi_alloc_slave(struct bfin_spi_slave, bus, cs); |
Scott Jiang | 0b38223 | 2011-11-29 18:03:26 -0500 | [diff] [blame] | 180 | if (!bss) |
| 181 | return NULL; |
| 182 | |
Scott Jiang | 0b38223 | 2011-11-29 18:03:26 -0500 | [diff] [blame] | 183 | bss->regs = (struct bfin_spi_regs *)reg_base; |
| 184 | bss->control = SPI_CTL_EN | SPI_CTL_MSTR; |
| 185 | if (mode & SPI_CPHA) |
| 186 | bss->control |= SPI_CTL_CPHA; |
| 187 | if (mode & SPI_CPOL) |
| 188 | bss->control |= SPI_CTL_CPOL; |
| 189 | if (mode & SPI_LSB_FIRST) |
| 190 | bss->control |= SPI_CTL_LSBF; |
| 191 | bss->control &= ~SPI_CTL_ASSEL; |
| 192 | bss->cs_pol = mode & SPI_CS_HIGH ? 1 : 0; |
| 193 | spi_set_speed(&bss->slave, max_hz); |
| 194 | |
| 195 | return &bss->slave; |
| 196 | } |
| 197 | |
| 198 | void spi_free_slave(struct spi_slave *slave) |
| 199 | { |
| 200 | struct bfin_spi_slave *bss = to_bfin_spi_slave(slave); |
| 201 | free(bss); |
| 202 | } |
| 203 | |
| 204 | int spi_claim_bus(struct spi_slave *slave) |
| 205 | { |
| 206 | struct bfin_spi_slave *bss = to_bfin_spi_slave(slave); |
| 207 | |
| 208 | debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs); |
| 209 | |
| 210 | if (is_gpio_cs(slave->cs)) { |
| 211 | unsigned int cs = gpio_cs(slave->cs); |
| 212 | gpio_request(cs, "bfin-spi"); |
| 213 | gpio_direction_output(cs, !bss->cs_pol); |
| 214 | pins[slave->bus][0] = P_DONTCARE; |
| 215 | } else |
| 216 | pins[slave->bus][0] = cs_pins[slave->bus][slave->cs - 1]; |
| 217 | peripheral_request_list(pins[slave->bus], "bfin-spi"); |
| 218 | |
| 219 | bfin_write32(&bss->regs->control, bss->control); |
| 220 | bfin_write32(&bss->regs->clock, bss->clock); |
| 221 | bfin_write32(&bss->regs->delay, 0x0); |
| 222 | bfin_write32(&bss->regs->rx_control, SPI_RXCTL_REN); |
| 223 | bfin_write32(&bss->regs->tx_control, SPI_TXCTL_TEN | SPI_TXCTL_TTI); |
| 224 | SSYNC(); |
| 225 | |
| 226 | return 0; |
| 227 | } |
| 228 | |
| 229 | void spi_release_bus(struct spi_slave *slave) |
| 230 | { |
| 231 | struct bfin_spi_slave *bss = to_bfin_spi_slave(slave); |
| 232 | |
| 233 | debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs); |
| 234 | |
| 235 | peripheral_free_list(pins[slave->bus]); |
| 236 | if (is_gpio_cs(slave->cs)) |
| 237 | gpio_free(gpio_cs(slave->cs)); |
| 238 | |
| 239 | bfin_write32(&bss->regs->rx_control, 0x0); |
| 240 | bfin_write32(&bss->regs->tx_control, 0x0); |
| 241 | bfin_write32(&bss->regs->control, 0x0); |
| 242 | SSYNC(); |
| 243 | } |
| 244 | |
| 245 | #ifndef CONFIG_BFIN_SPI_IDLE_VAL |
| 246 | # define CONFIG_BFIN_SPI_IDLE_VAL 0xff |
| 247 | #endif |
| 248 | |
| 249 | static int spi_pio_xfer(struct bfin_spi_slave *bss, const u8 *tx, u8 *rx, |
| 250 | uint bytes) |
| 251 | { |
| 252 | /* discard invalid rx data and empty rfifo */ |
| 253 | while (!(bfin_read32(&bss->regs->status) & SPI_STAT_RFE)) |
| 254 | bfin_read32(&bss->regs->rfifo); |
| 255 | |
| 256 | while (bytes--) { |
| 257 | u8 value = (tx ? *tx++ : CONFIG_BFIN_SPI_IDLE_VAL); |
| 258 | debug("%s: tx:%x ", __func__, value); |
| 259 | bfin_write32(&bss->regs->tfifo, value); |
| 260 | SSYNC(); |
| 261 | while (bfin_read32(&bss->regs->status) & SPI_STAT_RFE) |
| 262 | if (ctrlc()) |
| 263 | return -1; |
| 264 | value = bfin_read32(&bss->regs->rfifo); |
| 265 | if (rx) |
| 266 | *rx++ = value; |
| 267 | debug("rx:%x\n", value); |
| 268 | } |
| 269 | |
| 270 | return 0; |
| 271 | } |
| 272 | |
| 273 | int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, |
| 274 | void *din, unsigned long flags) |
| 275 | { |
| 276 | struct bfin_spi_slave *bss = to_bfin_spi_slave(slave); |
| 277 | const u8 *tx = dout; |
| 278 | u8 *rx = din; |
| 279 | uint bytes = bitlen / 8; |
| 280 | int ret = 0; |
| 281 | |
| 282 | debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__, |
| 283 | slave->bus, slave->cs, bitlen, bytes, flags); |
| 284 | |
| 285 | if (bitlen == 0) |
| 286 | goto done; |
| 287 | |
| 288 | /* we can only do 8 bit transfers */ |
| 289 | if (bitlen % 8) { |
| 290 | flags |= SPI_XFER_END; |
| 291 | goto done; |
| 292 | } |
| 293 | |
| 294 | if (flags & SPI_XFER_BEGIN) |
| 295 | spi_cs_activate(slave); |
| 296 | |
| 297 | ret = spi_pio_xfer(bss, tx, rx, bytes); |
| 298 | |
| 299 | done: |
| 300 | if (flags & SPI_XFER_END) |
| 301 | spi_cs_deactivate(slave); |
| 302 | |
| 303 | return ret; |
| 304 | } |