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git01.mediatek.com / filogic / uboot / 8bac8e982bf1ff44f7c362b37107f0e826613b38 / . / arch / arm / dts / starqltechn-uboot.dtsi
blob: d81a22ffe49266fc64c3f56518f4b31607dc2b56 [file] [log] [blame]
Dzmitry Sankouski4e6df402021-10-17 13:44:32 +0300[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * U-Boot addition to handle Samsung S9 SM-G9600 (starqltechn) pins
4 *
5 * (C) Copyright 2021 Dzmitry Sankouski <dsankouski@gmail.com>
6 *
7 */
8
9/
10{
Dzmitry Sankouski8e3bdd52022-02-22 21:49:53 +0300[diff] [blame]11 framebuffer@9D400000 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]12 bootph-all;
Dzmitry Sankouski8e3bdd52022-02-22 21:49:53 +0300[diff] [blame]13 };
Dzmitry Sankouski4e6df402021-10-17 13:44:32 +0300[diff] [blame]14 soc {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]15 bootph-all;
Dzmitry Sankouski8e3bdd52022-02-22 21:49:53 +0300[diff] [blame]16 serial@a84000 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]17 bootph-all;
Dzmitry Sankouski8e3bdd52022-02-22 21:49:53 +0300[diff] [blame]18 };
Sumit Garg3068b0d2022-07-12 12:42:04 +0530[diff] [blame]19 clock-controller@100000 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]20 bootph-all;
Sumit Garg3068b0d2022-07-12 12:42:04 +0530[diff] [blame]21 };
22 gpio_north@3900000 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]23 bootph-all;
Sumit Garg3068b0d2022-07-12 12:42:04 +0530[diff] [blame]24 };
25 pinctrl_north@3900000 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]26 bootph-all;
Dzmitry Sankouski4e6df402021-10-17 13:44:32 +0300[diff] [blame]27 };
28 };
29};
30
31&pm8998_pon {
32 key_vol_down {
33 gpios = <&pm8998_pon 1 0>;
34 label = "key_vol_down";
35 };
36 key_power {
37 gpios = <&pm8998_pon 0 0>;
38 label = "key_power";
39 };
40};