wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 1 | |
| 2 | /* |
| 3 | * Copyright 1998-2001 by Donald Becker. |
| 4 | * This software may be used and distributed according to the terms of |
| 5 | * the GNU General Public License (GPL), incorporated herein by reference. |
| 6 | * Contact the author for use under other terms. |
| 7 | * |
| 8 | * This program must be compiled with "-O"! |
| 9 | * See the bottom of this file for the suggested compile-command. |
| 10 | * |
| 11 | * The author may be reached as becker@scyld.com, or C/O |
| 12 | * Scyld Computing Corporation |
| 13 | * 410 Severn Ave., Suite 210 |
| 14 | * Annapolis MD 21403 |
| 15 | * |
| 16 | * Common-sense licensing statement: Using any portion of this program in |
| 17 | * your own program means that you must give credit to the original author |
| 18 | * and release the resulting code under the GPL. |
| 19 | */ |
| 20 | |
| 21 | #define _PPC_STRING_H_ /* avoid unnecessary str/mem functions */ |
| 22 | #define _LINUX_STRING_H_ /* avoid unnecessary str/mem functions */ |
| 23 | |
| 24 | #include <common.h> |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 25 | #include <exports.h> |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 26 | #include <asm/io.h> |
| 27 | |
| 28 | |
| 29 | /* Default EEPROM for i82559 */ |
| 30 | static unsigned short default_eeprom[64] = { |
| 31 | 0x0100, 0x0302, 0x0504, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 32 | 0xffff, 0xffff, 0x40c0, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, |
| 33 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 34 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 35 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 36 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 37 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 38 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff |
| 39 | }; |
| 40 | |
| 41 | static unsigned short eeprom[256]; |
| 42 | |
| 43 | static int eeprom_size = 64; |
| 44 | static int eeprom_addr_size = 6; |
| 45 | |
| 46 | static int debug = 0; |
| 47 | |
| 48 | static inline unsigned short swap16(unsigned short x) |
| 49 | { |
| 50 | return (((x & 0xff) << 8) | ((x & 0xff00) >> 8)); |
| 51 | } |
| 52 | |
| 53 | |
| 54 | static inline void *memcpy(void *dst, const void *src, unsigned int len) |
| 55 | { |
| 56 | void * ret = dst; |
| 57 | while (len-- > 0) *((char *)dst)++ = *((char *)src)++; |
| 58 | return ret; |
| 59 | } |
| 60 | |
| 61 | /* The EEPROM commands include the alway-set leading bit. */ |
| 62 | #define EE_WRITE_CMD (5) |
| 63 | #define EE_READ_CMD (6) |
| 64 | #define EE_ERASE_CMD (7) |
| 65 | |
| 66 | /* Serial EEPROM section. */ |
| 67 | #define EE_SHIFT_CLK 0x01 /* EEPROM shift clock. */ |
| 68 | #define EE_CS 0x02 /* EEPROM chip select. */ |
| 69 | #define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */ |
| 70 | #define EE_DATA_READ 0x08 /* EEPROM chip data out. */ |
| 71 | #define EE_ENB (0x4800 | EE_CS) |
| 72 | #define EE_WRITE_0 0x4802 |
| 73 | #define EE_WRITE_1 0x4806 |
| 74 | #define EE_OFFSET 14 |
| 75 | |
| 76 | /* Delay between EEPROM clock transitions. */ |
| 77 | #define eeprom_delay(ee_addr) inw(ee_addr) |
| 78 | |
| 79 | /* Wait for the EEPROM to finish the previous operation. */ |
| 80 | static int eeprom_busy_poll(long ee_ioaddr) |
| 81 | { |
| 82 | int i; |
| 83 | outw(EE_ENB, ee_ioaddr); |
| 84 | for (i = 0; i < 10000; i++) /* Typical 2000 ticks */ |
| 85 | if (inw(ee_ioaddr) & EE_DATA_READ) |
| 86 | break; |
| 87 | return i; |
| 88 | } |
| 89 | |
| 90 | /* This executes a generic EEPROM command, typically a write or write enable. |
| 91 | It returns the data output from the EEPROM, and thus may also be used for |
| 92 | reads. */ |
| 93 | static int do_eeprom_cmd(long ioaddr, int cmd, int cmd_len) |
| 94 | { |
| 95 | unsigned retval = 0; |
| 96 | long ee_addr = ioaddr + EE_OFFSET; |
| 97 | |
| 98 | if (debug > 1) |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 99 | printf(" EEPROM op 0x%x: ", cmd); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 100 | |
| 101 | outw(EE_ENB | EE_SHIFT_CLK, ee_addr); |
| 102 | |
| 103 | /* Shift the command bits out. */ |
| 104 | do { |
| 105 | short dataval = (cmd & (1 << cmd_len)) ? EE_WRITE_1 : EE_WRITE_0; |
| 106 | outw(dataval, ee_addr); |
| 107 | eeprom_delay(ee_addr); |
| 108 | if (debug > 2) |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 109 | printf("%X", inw(ee_addr) & 15); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 110 | outw(dataval | EE_SHIFT_CLK, ee_addr); |
| 111 | eeprom_delay(ee_addr); |
| 112 | retval = (retval << 1) | ((inw(ee_addr) & EE_DATA_READ) ? 1 : 0); |
| 113 | } while (--cmd_len >= 0); |
| 114 | #if 0 |
| 115 | outw(EE_ENB, ee_addr); |
| 116 | #endif |
| 117 | /* Terminate the EEPROM access. */ |
| 118 | outw(EE_ENB & ~EE_CS, ee_addr); |
| 119 | if (debug > 1) |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 120 | printf(" EEPROM result is 0x%5.5x.\n", retval); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 121 | return retval; |
| 122 | } |
| 123 | |
| 124 | static int read_eeprom(long ioaddr, int location, int addr_len) |
| 125 | { |
| 126 | return do_eeprom_cmd(ioaddr, ((EE_READ_CMD << addr_len) | location) |
| 127 | << 16 , 3 + addr_len + 16) & 0xffff; |
| 128 | } |
| 129 | |
| 130 | static void write_eeprom(long ioaddr, int index, int value, int addr_len) |
| 131 | { |
| 132 | long ee_ioaddr = ioaddr + EE_OFFSET; |
| 133 | int i; |
| 134 | |
| 135 | /* Poll for previous op finished. */ |
| 136 | eeprom_busy_poll(ee_ioaddr); /* Typical 0 ticks */ |
| 137 | /* Enable programming modes. */ |
| 138 | do_eeprom_cmd(ioaddr, (0x4f << (addr_len-4)), 3 + addr_len); |
| 139 | /* Do the actual write. */ |
| 140 | do_eeprom_cmd(ioaddr, |
| 141 | (((EE_WRITE_CMD<<addr_len) | index)<<16) | (value & 0xffff), |
| 142 | 3 + addr_len + 16); |
| 143 | /* Poll for write finished. */ |
| 144 | i = eeprom_busy_poll(ee_ioaddr); /* Typical 2000 ticks */ |
| 145 | if (debug) |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 146 | printf(" Write finished after %d ticks.\n", i); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 147 | /* Disable programming. This command is not instantaneous, so we check |
| 148 | for busy before the next op. */ |
| 149 | do_eeprom_cmd(ioaddr, (0x40 << (addr_len-4)), 3 + addr_len); |
| 150 | eeprom_busy_poll(ee_ioaddr); |
| 151 | } |
| 152 | |
| 153 | static int reset_eeprom(unsigned long ioaddr, unsigned char *hwaddr) |
| 154 | { |
| 155 | unsigned short checksum = 0; |
| 156 | int size_test; |
| 157 | int i; |
| 158 | |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 159 | printf("Resetting i82559 EEPROM @ 0x%08x ... ", ioaddr); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 160 | |
| 161 | size_test = do_eeprom_cmd(ioaddr, (EE_READ_CMD << 8) << 16, 27); |
| 162 | eeprom_addr_size = (size_test & 0xffe0000) == 0xffe0000 ? 8 : 6; |
| 163 | eeprom_size = 1 << eeprom_addr_size; |
| 164 | |
| 165 | memcpy(eeprom, default_eeprom, sizeof default_eeprom); |
| 166 | |
| 167 | for (i = 0; i < 3; i++) |
| 168 | eeprom[i] = (hwaddr[i*2+1]<<8) + hwaddr[i*2]; |
| 169 | |
| 170 | /* Recalculate the checksum. */ |
| 171 | for (i = 0; i < eeprom_size - 1; i++) |
| 172 | checksum += eeprom[i]; |
| 173 | eeprom[i] = 0xBABA - checksum; |
| 174 | |
| 175 | for (i = 0; i < eeprom_size; i++) |
| 176 | write_eeprom(ioaddr, i, eeprom[i], eeprom_addr_size); |
| 177 | |
| 178 | for (i = 0; i < eeprom_size; i++) |
| 179 | if (read_eeprom(ioaddr, i, eeprom_addr_size) != eeprom[i]) { |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 180 | printf("failed\n"); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 181 | return 1; |
| 182 | } |
| 183 | |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 184 | printf("done\n"); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 185 | return 0; |
| 186 | } |
| 187 | |
| 188 | static unsigned int hatoi(char *p, char **errp) |
| 189 | { |
| 190 | unsigned int res = 0; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 191 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 192 | while (1) { |
| 193 | switch (*p) { |
| 194 | case 'a': |
| 195 | case 'b': |
| 196 | case 'c': |
| 197 | case 'd': |
| 198 | case 'e': |
| 199 | case 'f': |
| 200 | res |= (*p - 'a' + 10); |
| 201 | break; |
| 202 | case 'A': |
| 203 | case 'B': |
| 204 | case 'C': |
| 205 | case 'D': |
| 206 | case 'E': |
| 207 | case 'F': |
| 208 | res |= (*p - 'A' + 10); |
| 209 | break; |
| 210 | case '0': |
| 211 | case '1': |
| 212 | case '2': |
| 213 | case '3': |
| 214 | case '4': |
| 215 | case '5': |
| 216 | case '6': |
| 217 | case '7': |
| 218 | case '8': |
| 219 | case '9': |
| 220 | res |= (*p - '0'); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 221 | break; |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 222 | default: |
| 223 | if (errp) { |
| 224 | *errp = p; |
| 225 | } |
| 226 | return res; |
| 227 | } |
| 228 | p++; |
| 229 | if (*p == 0) { |
| 230 | break; |
| 231 | } |
| 232 | res <<= 4; |
| 233 | } |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 234 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 235 | if (errp) { |
| 236 | *errp = NULL; |
| 237 | } |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 238 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 239 | return res; |
| 240 | } |
| 241 | |
| 242 | static unsigned char *gethwaddr(char *in, unsigned char *out) |
| 243 | { |
| 244 | char tmp[3]; |
| 245 | int i; |
| 246 | char *err; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 247 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 248 | for (i=0;i<6;i++) { |
| 249 | if (in[i*3+2] == 0 && i == 5) { |
| 250 | out[i] = hatoi(&in[i*3], &err); |
| 251 | if (err) { |
| 252 | return NULL; |
| 253 | } |
| 254 | } else if (in[i*3+2] == ':' && i < 5) { |
| 255 | tmp[0] = in[i*3]; |
| 256 | tmp[1] = in[i*3+1]; |
| 257 | tmp[2] = 0; |
| 258 | out[i] = hatoi(tmp, &err); |
| 259 | if (err) { |
| 260 | return NULL; |
| 261 | } |
| 262 | } else { |
| 263 | return NULL; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 264 | } |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 265 | } |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 266 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 267 | return out; |
| 268 | } |
| 269 | |
| 270 | static u32 |
| 271 | read_config_dword(int bus, int dev, int func, int reg) |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 272 | { |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 273 | u32 res; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 274 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 275 | outl(0x80000000|(bus&0xff)<<16|(dev&0x1f)<<11|(func&7)<<8|(reg&0xfc), |
| 276 | 0xcf8); |
| 277 | res = inl(0xcfc); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 278 | outl(0, 0xcf8); |
| 279 | return res; |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 280 | } |
| 281 | |
| 282 | static u16 |
| 283 | read_config_word(int bus, int dev, int func, int reg) |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 284 | { |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 285 | u32 res; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 286 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 287 | outl(0x80000000|(bus&0xff)<<16|(dev&0x1f)<<11|(func&7)<<8|(reg&0xfc), |
| 288 | 0xcf8); |
| 289 | res = inw(0xcfc + (reg & 2)); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 290 | outl(0, 0xcf8); |
| 291 | return res; |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 292 | } |
| 293 | |
| 294 | static void |
| 295 | write_config_word(int bus, int dev, int func, int reg, u16 data) |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 296 | { |
| 297 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 298 | outl(0x80000000|(bus&0xff)<<16|(dev&0x1f)<<11|(func&7)<<8|(reg&0xfc), |
| 299 | 0xcf8); |
| 300 | outw(data, 0xcfc + (reg & 2)); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 301 | outl(0, 0xcf8); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 302 | } |
| 303 | |
| 304 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 305 | int main (int argc, char *argv[]) |
| 306 | { |
| 307 | unsigned char *eth_addr; |
| 308 | char buf[6]; |
| 309 | int instance; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 310 | |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 311 | app_startup(argv); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 312 | if (argc != 2) { |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 313 | printf ("call with base Ethernet address\n"); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 314 | return 1; |
| 315 | } |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 316 | |
| 317 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 318 | eth_addr = gethwaddr(argv[1], buf); |
| 319 | if (NULL == eth_addr) { |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 320 | printf ("Can not parse ethernet address\n"); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 321 | return 1; |
| 322 | } |
| 323 | if (eth_addr[5] & 0x01) { |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 324 | printf("Base Ethernet address must be even\n"); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 325 | } |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 326 | |
| 327 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 328 | for (instance = 0; instance < 2; instance ++) { |
| 329 | unsigned int io_addr; |
| 330 | unsigned char mac[6]; |
| 331 | int bar1 = read_config_dword(0, 6+instance, 0, 0x14); |
| 332 | if (! (bar1 & 1)) { |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 333 | printf("ETH%d is disabled %x\n", instance, bar1); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 334 | } else { |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 335 | printf("ETH%d IO=0x%04x\n", instance, bar1 & ~3); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 336 | } |
| 337 | io_addr = (bar1 & (~3L)); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 338 | |
| 339 | |
| 340 | write_config_word(0, 6+instance, 0, 4, |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 341 | read_config_word(0, 6+instance, 0, 4) | 1); |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 342 | printf("ETH%d CMD %04x\n", instance, |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 343 | read_config_word(0, 6+instance, 0, 4)); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 344 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 345 | memcpy(mac, eth_addr, 6); |
| 346 | mac[5] += instance; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 347 | |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 348 | printf("got io=%04x, ha=%02x:%02x:%02x:%02x:%02x:%02x\n", |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 349 | io_addr, mac[0], mac[1], mac[2], |
| 350 | mac[3], mac[4], mac[5]); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 351 | reset_eeprom(io_addr, mac); |
| 352 | } |
| 353 | return 0; |
| 354 | } |