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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Pali Rohár248ef0a2012-10-29 07:54:01 +00002/*
3 * (C) Copyright 2011-2012
4 * Pali Rohár <pali.rohar@gmail.com>
5 *
6 * (C) Copyright 2010
7 * Alistair Buxton <a.j.buxton@gmail.com>
8 *
9 * Derived from Beagle Board code:
10 * (C) Copyright 2006-2008
11 * Texas Instruments.
12 * Richard Woodruff <r-woodruff2@ti.com>
13 * Syed Mohammed Khasim <x0khasim@ti.com>
14 *
15 * Configuration settings for the Nokia RX-51 aka N900.
Pali Rohár248ef0a2012-10-29 07:54:01 +000016 */
17
18#ifndef __CONFIG_H
19#define __CONFIG_H
20
21/*
22 * High Level Configuration Options
23 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000024#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */
25
26#define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51
27
28/*
29 * Nokia X-Loader loading secondary image to address 0x80400000
30 * NOLO loading boot image to random place, so it doesn't really
31 * matter what we set this to. We have to copy u-boot to this address
32 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000033
Pali Rohár248ef0a2012-10-29 07:54:01 +000034#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050035#include <asm/arch/omap.h>
Pali Rohár248ef0a2012-10-29 07:54:01 +000036#include <asm/arch/mem.h>
37#include <linux/stringify.h>
38
Pali Rohár248ef0a2012-10-29 07:54:01 +000039/* Clock Defines */
40#define V_OSCK 26000000 /* Clock output from T2 */
41#define V_SCLK (V_OSCK >> 1)
42
Pali Rohár248ef0a2012-10-29 07:54:01 +000043#define CONFIG_MISC_INIT_R
44#define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */
45
46#define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */
47#define CONFIG_INITRD_TAG /* enable passing initrd */
48#define CONFIG_REVISION_TAG /* enable passing revision tag*/
49#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
50
51/*
52 * Size of malloc() pool
53 */
54#define CONFIG_ENV_SIZE (128 << 10)
55#define CONFIG_UBI_SIZE (512 << 10)
56#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \
57 (128 << 10))
58
59/*
60 * Hardware drivers
61 */
62
63/*
64 * NS16550 Configuration
65 */
66#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
67
Pali Rohár248ef0a2012-10-29 07:54:01 +000068#define CONFIG_SYS_NS16550_SERIAL
69#define CONFIG_SYS_NS16550_REG_SIZE (-4)
70#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
71
72/*
73 * select serial console configuration
74 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000075#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
76#define CONFIG_SERIAL3 3 /* UART3 on RX-51 */
77
78/* allow to overwrite serial and ethaddr */
79#define CONFIG_ENV_OVERWRITE
Pali Rohár248ef0a2012-10-29 07:54:01 +000080#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
Pali Rohár248ef0a2012-10-29 07:54:01 +000081
Pali Rohár248ef0a2012-10-29 07:54:01 +000082/* USB device configuration */
83#define CONFIG_USB_DEVICE
84#define CONFIG_USBD_VENDORID 0x0421
85#define CONFIG_USBD_PRODUCTID 0x01c8
86#define CONFIG_USBD_MANUFACTURER "Nokia"
87#define CONFIG_USBD_PRODUCT_NAME "N900"
88
Pali Rohár248ef0a2012-10-29 07:54:01 +000089/* commands to include */
Pali Rohár248ef0a2012-10-29 07:54:01 +000090
Heiko Schocherf53f2b82013-10-22 11:03:18 +020091#define CONFIG_SYS_I2C
Pali Rohár248ef0a2012-10-29 07:54:01 +000092
93/*
94 * TWL4030
95 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000096#define CONFIG_TWL4030_LED
97#define CONFIG_TWL4030_KEYPAD
98
Pali Rohár248ef0a2012-10-29 07:54:01 +000099#define GPIO_SLIDE 71
100
101/*
102 * Board ONENAND Info.
103 */
104
105#define PART1_NAME "bootloader"
106#define PART1_SIZE 128
107#define PART1_MULL 1024
108#define PART1_SUFF "k"
109#define PART1_OFFS 0x00000000
110#define PART1_MASK 0x00000003
111
112#define PART2_NAME "config"
113#define PART2_SIZE 384
114#define PART2_MULL 1024
115#define PART2_SUFF "k"
116#define PART2_OFFS 0x00020000
117#define PART2_MASK 0x00000000
118
119#define PART3_NAME "log"
120#define PART3_SIZE 256
121#define PART3_MULL 1024
122#define PART3_SUFF "k"
123#define PART3_OFFS 0x00080000
124#define PART3_MASK 0x00000000
125
126#define PART4_NAME "kernel"
127#define PART4_SIZE 2
128#define PART4_MULL 1024*1024
129#define PART4_SUFF "m"
130#define PART4_OFFS 0x000c0000
131#define PART4_MASK 0x00000000
132
133#define PART5_NAME "initfs"
134#define PART5_SIZE 2
135#define PART5_MULL 1024*1024
136#define PART5_SUFF "m"
137#define PART5_OFFS 0x002c0000
138#define PART5_MASK 0x00000000
139
140#define PART6_NAME "rootfs"
141#define PART6_SIZE 257280
142#define PART6_MULL 1024
143#define PART6_SUFF "k"
144#define PART6_OFFS 0x004c0000
145#define PART6_MASK 0x00000000
146
147#ifdef ONENAND_SUPPORT
148
Pali Rohár248ef0a2012-10-29 07:54:01 +0000149#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
150#define CONFIG_MTD_DEVICE
151#define CONFIG_MTD_PARTITIONS
152
Pali Rohár248ef0a2012-10-29 07:54:01 +0000153#endif
154
155/* Watchdog support */
156#define CONFIG_HW_WATCHDOG
157
158/*
159 * Framebuffer
160 */
161/* Video console */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000162#define CONFIG_VIDEO_LOGO
163#define VIDEO_FB_16BPP_PIXEL_SWAP
164#define VIDEO_FB_16BPP_WORD_SWAP
Pali Rohár248ef0a2012-10-29 07:54:01 +0000165#define CONFIG_SPLASH_SCREEN
166
167/* functions for cfb_console */
168#define VIDEO_KBD_INIT_FCT rx51_kp_init()
169#define VIDEO_TSTC_FCT rx51_kp_tstc
170#define VIDEO_GETC_FCT rx51_kp_getc
171#ifndef __ASSEMBLY__
Simon Glass0d1e1f72014-07-23 06:54:59 -0600172struct stdio_dev;
Pali Rohár248ef0a2012-10-29 07:54:01 +0000173int rx51_kp_init(void);
Simon Glass0d1e1f72014-07-23 06:54:59 -0600174int rx51_kp_tstc(struct stdio_dev *sdev);
175int rx51_kp_getc(struct stdio_dev *sdev);
Pali Rohár248ef0a2012-10-29 07:54:01 +0000176#endif
177
Pali Rohár248ef0a2012-10-29 07:54:01 +0000178/* Environment information */
Tom Rini5ad8e112017-10-22 17:55:07 -0400179#ifdef CONFIG_MTDPARTS_DEFAULT
180#define MTDPARTS "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
181#else
182#define MTDPARTS
183#endif
Pali Rohár248ef0a2012-10-29 07:54:01 +0000184#define CONFIG_EXTRA_ENV_SETTINGS \
Tom Rini5ad8e112017-10-22 17:55:07 -0400185 MTDPARTS \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000186 "usbtty=cdc_acm\0" \
187 "stdin=vga\0" \
188 "stdout=vga\0" \
189 "stderr=vga\0" \
190 "setcon=setenv stdin ${con};" \
191 "setenv stdout ${con};" \
192 "setenv stderr ${con}\0" \
193 "sercon=setenv con serial; run setcon\0" \
194 "usbcon=setenv con usbtty; run setcon\0" \
195 "vgacon=setenv con vga; run setcon\0" \
196 "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
197 "switchmmc=mmc dev ${mmcnum}\0" \
198 "kernaddr=0x82008000\0" \
199 "initrdaddr=0x84008000\0" \
200 "scriptaddr=0x86008000\0" \
201 "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
202 "${loadaddr} ${mmcfile}\0" \
203 "kernload=setenv loadaddr ${kernaddr};" \
204 "setenv mmcfile ${mmckernfile};" \
205 "run fileload\0" \
206 "initrdload=setenv loadaddr ${initrdaddr};" \
207 "setenv mmcfile ${mmcinitrdfile};" \
208 "run fileload\0" \
209 "scriptload=setenv loadaddr ${scriptaddr};" \
210 "setenv mmcfile ${mmcscriptfile};" \
211 "run fileload\0" \
212 "scriptboot=echo Running ${mmcscriptfile} from mmc " \
213 "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
214 "kernboot=echo Booting ${mmckernfile} from mmc " \
215 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \
216 "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
217 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \
218 "attachboot=echo Booting attached kernel image ...;" \
219 "setenv setup_omap_atag 1;" \
220 "bootm ${attkernaddr};" \
221 "setenv setup_omap_atag\0" \
222 "trymmcscriptboot=if run switchmmc; then " \
223 "if run scriptload; then " \
224 "run scriptboot;" \
225 "fi;" \
226 "fi\0" \
227 "trymmckernboot=if run switchmmc; then " \
228 "if run kernload; then " \
229 "run kernboot;" \
230 "fi;" \
231 "fi\0" \
232 "trymmckerninitrdboot=if run switchmmc; then " \
233 "if run initrdload; then " \
234 "if run kernload; then " \
235 "run kerninitrdboot;" \
236 "fi;" \
237 "fi; " \
238 "fi\0" \
239 "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
240 "setenv mmckernfile uImage; run trymmckernboot\0" \
241 "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
242 "setenv mmcpart 2; run trymmcpartboot;" \
243 "setenv mmcpart 3; run trymmcpartboot;" \
244 "setenv mmcpart 4; run trymmcpartboot\0" \
245 "trymmcboot=if run switchmmc; then " \
246 "setenv mmctype fat;" \
247 "run trymmcallpartboot;" \
248 "setenv mmctype ext2;" \
249 "run trymmcallpartboot;" \
250 "setenv mmctype ext4;" \
251 "run trymmcallpartboot;" \
252 "fi\0" \
253 "emmcboot=setenv mmcnum 1; run trymmcboot\0" \
254 "sdboot=setenv mmcnum 0; run trymmcboot\0" \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000255 "menucmd=bootmenu\0" \
256 "bootmenu_0=Attached kernel=run attachboot\0" \
257 "bootmenu_1=Internal eMMC=run emmcboot\0" \
258 "bootmenu_2=External SD card=run sdboot\0" \
259 "bootmenu_3=U-Boot boot order=boot\0" \
260 "bootmenu_delay=30\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000261 ""
262
263#define CONFIG_PREBOOT \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000264 "setenv mmcnum 1; setenv mmcpart 1;" \
265 "setenv mmcscriptfile bootmenu.scr;" \
266 "if run switchmmc; then " \
267 "setenv mmcdone true;" \
268 "setenv mmctype fat;" \
269 "if run scriptload; then true; else " \
270 "setenv mmctype ext2;" \
271 "if run scriptload; then true; else " \
272 "setenv mmctype ext4;" \
273 "if run scriptload; then true; else " \
274 "setenv mmcdone false;" \
275 "fi;" \
276 "fi;" \
277 "fi;" \
278 "if ${mmcdone}; then " \
279 "run scriptboot;" \
280 "fi;" \
281 "fi;" \
282 "if run slide; then true; else " \
283 "setenv bootmenu_delay 0;" \
284 "setenv bootdelay 0;" \
285 "fi"
286
287#define CONFIG_POSTBOOTMENU \
288 "echo;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000289 "echo Extra commands:;" \
290 "echo run sercon - Use serial port for control.;" \
291 "echo run usbcon - Use usbtty for control.;" \
292 "echo run vgacon - Use framebuffer/keyboard.;" \
293 "echo run sdboot - Boot from SD card slot.;" \
294 "echo run emmcboot - Boot internal eMMC memory.;" \
295 "echo run attachboot - Boot attached kernel image.;" \
296 "echo"
297
298#define CONFIG_BOOTCOMMAND \
299 "run sdboot;" \
300 "run emmcboot;" \
301 "run attachboot;" \
302 "echo"
303
Pali Rohár13eb3e42013-03-07 05:15:19 +0000304#define CONFIG_MENU_SHOW
305
Pali Rohár248ef0a2012-10-29 07:54:01 +0000306/*
307 * Miscellaneous configurable options
308 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000309
310#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
311#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/
312
313/* default load address */
314#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
315
316/*
317 * OMAP3 has 12 GP timers, they can be driven by the system clock
318 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
319 * This rate is divided by a local divisor.
320 */
321#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
322#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000323
324/*
Pali Rohár248ef0a2012-10-29 07:54:01 +0000325 * Physical Memory Map
326 */
327#define CONFIG_NR_DRAM_BANKS 2
328#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
329
330/*
331 * FLASH and environment organization
332 */
333
Pali Rohár248ef0a2012-10-29 07:54:01 +0000334#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
335#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
336#define CONFIG_SYS_INIT_RAM_SIZE 0x800
337#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
338 CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
339
340/*
341 * Attached kernel image
342 */
343
344#define SDRAM_SIZE 0x10000000 /* 256 MB */
345#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)
346
347#define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */
348#define KERNEL_OFFSET 0x40000 /* 256 kB */
349#define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET)
350#define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE)
351
352/* Reserve protected RAM for attached kernel */
353#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1)
354
355#endif /* __CONFIG_H */