Tom Rini | 8b0c8a1 | 2018-05-06 18:27:01 -0400 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause |
Patrick Delaunay | 3cba451 | 2018-03-12 10:46:12 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2018, STMicroelectronics - All Rights Reserved |
Patrick Delaunay | 3cba451 | 2018-03-12 10:46:12 +0100 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <dm.h> |
| 8 | #include <errno.h> |
| 9 | #include <i2c.h> |
| 10 | #include <power/pmic.h> |
| 11 | #include <power/stpmu1.h> |
| 12 | |
| 13 | #define STMPU1_NUM_OF_REGS 0x100 |
| 14 | |
| 15 | static int stpmu1_reg_count(struct udevice *dev) |
| 16 | { |
| 17 | return STMPU1_NUM_OF_REGS; |
| 18 | } |
| 19 | |
| 20 | static int stpmu1_write(struct udevice *dev, uint reg, const uint8_t *buff, |
| 21 | int len) |
| 22 | { |
| 23 | int ret; |
| 24 | |
| 25 | ret = dm_i2c_write(dev, reg, buff, len); |
| 26 | if (ret) |
| 27 | dev_err(dev, "%s: failed to write register %#x :%d", |
| 28 | __func__, reg, ret); |
| 29 | |
| 30 | return ret; |
| 31 | } |
| 32 | |
| 33 | static int stpmu1_read(struct udevice *dev, uint reg, uint8_t *buff, int len) |
| 34 | { |
| 35 | int ret; |
| 36 | |
| 37 | ret = dm_i2c_read(dev, reg, buff, len); |
| 38 | if (ret) |
| 39 | dev_err(dev, "%s: failed to read register %#x : %d", |
| 40 | __func__, reg, ret); |
| 41 | |
| 42 | return ret; |
| 43 | } |
| 44 | |
| 45 | static struct dm_pmic_ops stpmu1_ops = { |
| 46 | .reg_count = stpmu1_reg_count, |
| 47 | .read = stpmu1_read, |
| 48 | .write = stpmu1_write, |
| 49 | }; |
| 50 | |
| 51 | static const struct udevice_id stpmu1_ids[] = { |
| 52 | { .compatible = "st,stpmu1" }, |
| 53 | { } |
| 54 | }; |
| 55 | |
| 56 | U_BOOT_DRIVER(pmic_stpmu1) = { |
| 57 | .name = "stpmu1_pmic", |
| 58 | .id = UCLASS_PMIC, |
| 59 | .of_match = stpmu1_ids, |
| 60 | .ops = &stpmu1_ops, |
| 61 | }; |