blob: e43465da372bb0480d56116e7ceec7cba941c197 [file] [log] [blame]
wdenk8aeb24e2003-06-20 22:36:30 +00001/*
2 * (C) Copyright 2001
3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <mpc824x.h>
26#include <pci.h>
27
28int checkboard (void)
29{
30 ulong busfreq = get_bus_freq(0);
31 char buf[32];
32
33 printf("Board: A3000 Local Bus at %s MHz\n", strmhz(buf, busfreq));
34 return 0;
35
36}
37
38long int initdram (int board_type)
39{
40 int i, cnt;
41 volatile uchar * base= CFG_SDRAM_BASE;
42 volatile ulong * addr;
43 ulong save[32];
44 ulong val, ret = 0;
45
46 for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
47 addr = (volatile ulong *)base + cnt;
48 save[i++] = *addr;
49 *addr = ~cnt;
50 }
51
52 addr = (volatile ulong *)base;
53 save[i] = *addr;
54 *addr = 0;
55
56 if (*addr != 0) {
57 *addr = save[i];
58 goto Done;
59 }
60
61 for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1) {
62 addr = (volatile ulong *)base + cnt;
63 val = *addr;
64 *addr = save[--i];
65 if (val != ~cnt) {
66 ulong new_bank0_end = cnt * sizeof(long) - 1;
67 ulong mear1 = mpc824x_mpc107_getreg(MEAR1);
68 ulong emear1 = mpc824x_mpc107_getreg(EMEAR1);
69 mear1 = (mear1 & 0xFFFFFF00) |
70 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
71 emear1 = (emear1 & 0xFFFFFF00) |
72 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
73 mpc824x_mpc107_setreg(MEAR1, mear1);
74 mpc824x_mpc107_setreg(EMEAR1, emear1);
75
76 ret = cnt * sizeof(long);
77 goto Done;
78 }
79 }
80
81 ret = CFG_MAX_RAM_SIZE;
82Done:
83 return ret;
84}
85
86/*
87 * Initialize PCI Devices
88 */
89#if 1
90#ifndef CONFIG_PCI_PNP
91static struct pci_config_table pci_a3000_config_table[] = {
92 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
93 0x0, 0x0, 0x0, /* unknown eth0 divice */
94 pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
95 PCI_ENET0_MEMADDR,
96 PCI_COMMAND_IO |
97 PCI_COMMAND_MEMORY |
98 PCI_COMMAND_MASTER }},
99 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
100 0x0, 0x0, 0x0, /* unknown eth1 device */
101 pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
102 PCI_ENET1_MEMADDR,
103 PCI_COMMAND_IO |
104 PCI_COMMAND_MEMORY |
105 PCI_COMMAND_MASTER }},
106 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
107 0x0, 0x0, 0x0, /* unknown eth1 device */
108 pci_cfgfunc_config_device, { PCI_ENET2_IOADDR,
109 PCI_ENET2_MEMADDR,
110 PCI_COMMAND_IO |
111 PCI_COMMAND_MEMORY |
112 PCI_COMMAND_MASTER }},
113 { }
114};
115#endif
116
117#else
118
119#ifndef CONFIG_PCI_PNP
120static struct pci_config_table pci_a3000_config_table[] = {
121 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
122 pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
123 PCI_ENET0_MEMADDR,
124 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
125 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
126 pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
127 PCI_ENET1_MEMADDR,
128 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
129 { }
130};
131#endif
132
133#endif
134
135struct pci_controller hose = {
136#ifndef CONFIG_PCI_PNP
137 config_table: pci_a3000_config_table,
138#endif
139};
140
141void pci_init_board(void)
142{
143 pci_mpc824x_init(&hose);
144}