| Darwin Rambo | c561314 | 2014-02-11 11:06:34 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2013 Broadcom Corporation. |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #ifndef __ARCH_BCM281XX_SYSMAP_H |
| 8 | |
| 9 | #define BSC1_BASE_ADDR 0x3e016000 |
| 10 | #define BSC2_BASE_ADDR 0x3e017000 |
| 11 | #define BSC3_BASE_ADDR 0x3e018000 |
| Jiandong Zheng | f192627 | 2014-08-01 20:37:15 -0700 | [diff] [blame] | 12 | #define DWDMA_AHB_BASE_ADDR 0x38100000 |
| 13 | #define ESUB_CLK_BASE_ADDR 0x38000000 |
| 14 | #define ESW_CONTRL_BASE_ADDR 0x38200000 |
| Darwin Rambo | c561314 | 2014-02-11 11:06:34 -0800 | [diff] [blame] | 15 | #define GPIO2_BASE_ADDR 0x35003000 |
| Steve Rae | d1a8ecd | 2014-12-09 11:40:11 -0800 | [diff] [blame] | 16 | #define HSOTG_BASE_ADDR 0x3f120000 |
| 17 | #define HSOTG_CTRL_BASE_ADDR 0x3f130000 |
| Darwin Rambo | c561314 | 2014-02-11 11:06:34 -0800 | [diff] [blame] | 18 | #define KONA_MST_CLK_BASE_ADDR 0x3f001000 |
| 19 | #define KONA_SLV_CLK_BASE_ADDR 0x3e011000 |
| 20 | #define PMU_BSC_BASE_ADDR 0x3500d000 |
| 21 | #define PWRMGR_BASE_ADDR 0x35010000 |
| 22 | #define SDIO1_BASE_ADDR 0x3f180000 |
| 23 | #define SDIO2_BASE_ADDR 0x3f190000 |
| 24 | #define SDIO3_BASE_ADDR 0x3f1a0000 |
| 25 | #define SDIO4_BASE_ADDR 0x3f1b0000 |
| 26 | #define SECWD_BASE_ADDR 0x3500c000 |
| 27 | #define SECWD2_BASE_ADDR 0x35002f40 |
| 28 | #define TIMER_BASE_ADDR 0x3e00d000 |
| 29 | |
| Jiandong Zheng | 88bb7c0 | 2015-07-09 14:26:39 -0700 | [diff] [blame] | 30 | #define HSOTG_DCTL_OFFSET 0x00000804 |
| 31 | #define HSOTG_DCTL_SFTDISCON_MASK 0x00000002 |
| 32 | |
| 33 | #define HSOTG_CTRL_PHY_P1CTL_OFFSET 0x00000008 |
| 34 | #define HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK 0x00000002 |
| 35 | #define HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK 0x00000001 |
| 36 | |
| Darwin Rambo | c561314 | 2014-02-11 11:06:34 -0800 | [diff] [blame] | 37 | #endif |