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wdenk32fe2872002-10-11 07:57:01 +00001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Alex Zuepke <azu@sysgo.de>
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#include <common.h>
30#include <asm/arch/pxa-regs.h>
31
wdenk32fe2872002-10-11 07:57:01 +000032#ifdef CONFIG_USE_IRQ
wdenk32fe2872002-10-11 07:57:01 +000033#error: interrupts not implemented yet
wdenk32fe2872002-10-11 07:57:01 +000034#endif
35
Micha Kalfon8a75a5b2009-02-11 19:50:11 +020036#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
37#define TIMER_FREQ_HZ 3250000
38#elif defined(CONFIG_PXA250)
39#define TIMER_FREQ_HZ 3686400
40#else
41#error "Timer frequency unknown - please config PXA CPU type"
42#endif
43
wdenk32fe2872002-10-11 07:57:01 +000044int interrupt_init (void)
45{
46 /* nothing happens here - we don't setup any IRQs */
47 return (0);
48}
49
50void reset_timer (void)
51{
52 reset_timer_masked ();
53}
54
55ulong get_timer (ulong base)
56{
wdenk3c711762004-06-09 13:37:52 +000057 return get_timer_masked () - base;
wdenk32fe2872002-10-11 07:57:01 +000058}
59
60void set_timer (ulong t)
61{
62 /* nop */
63}
64
65void udelay (unsigned long usec)
66{
67 udelay_masked (usec);
68}
69
70
71void reset_timer_masked (void)
72{
73 OSCR = 0;
74}
75
76ulong get_timer_masked (void)
77{
Micha Kalfon8a75a5b2009-02-11 19:50:11 +020078 unsigned long long ticks = get_ticks();
79
80 return (((ticks / TIMER_FREQ_HZ) * 1000) +
81 ((ticks % TIMER_FREQ_HZ) * 1000) / TIMER_FREQ_HZ);
wdenk32fe2872002-10-11 07:57:01 +000082}
83
84void udelay_masked (unsigned long usec)
85{
86 ulong tmo;
wdenk7af1f9d2005-04-04 12:08:28 +000087 ulong endtime;
88 signed long diff;
wdenk32fe2872002-10-11 07:57:01 +000089
wdenkac40ade2004-11-24 23:35:19 +000090 if (usec >= 1000) {
91 tmo = usec / 1000;
Micha Kalfon8a75a5b2009-02-11 19:50:11 +020092 tmo *= TIMER_FREQ_HZ;
wdenkac40ade2004-11-24 23:35:19 +000093 tmo /= 1000;
94 } else {
Micha Kalfon8a75a5b2009-02-11 19:50:11 +020095 tmo = usec * TIMER_FREQ_HZ;
wdenkac40ade2004-11-24 23:35:19 +000096 tmo /= (1000*1000);
97 }
wdenk32fe2872002-10-11 07:57:01 +000098
Micha Kalfon8a75a5b2009-02-11 19:50:11 +020099 endtime = get_ticks() + tmo;
wdenk32fe2872002-10-11 07:57:01 +0000100
wdenk7af1f9d2005-04-04 12:08:28 +0000101 do {
Micha Kalfon8a75a5b2009-02-11 19:50:11 +0200102 ulong now = get_ticks();
wdenk7af1f9d2005-04-04 12:08:28 +0000103 diff = endtime - now;
104 } while (diff >= 0);
wdenk32fe2872002-10-11 07:57:01 +0000105}
wdenk49c3f672003-10-08 22:33:00 +0000106
107/*
108 * This function is derived from PowerPC code (read timebase as long long).
109 * On ARM it just returns the timer value.
110 */
111unsigned long long get_ticks(void)
112{
Micha Kalfon8a75a5b2009-02-11 19:50:11 +0200113 return OSCR;
wdenk49c3f672003-10-08 22:33:00 +0000114}
115
116/*
117 * This function is derived from PowerPC code (timebase clock frequency).
118 * On ARM it returns the number of timer ticks per second.
119 */
120ulong get_tbclk (void)
121{
122 ulong tbclk;
Micha Kalfon8a75a5b2009-02-11 19:50:11 +0200123 tbclk = TIMER_FREQ_HZ;
wdenk49c3f672003-10-08 22:33:00 +0000124 return tbclk;
125}