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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Magnus Lilja4133f652009-06-13 20:50:01 +02002/*
3 * (C) Copyright 2009
4 * Magnus Lilja <lilja.magnus@gmail.com>
5 *
6 * (C) Copyright 2008
7 * Maxim Artamonov, <scn1874 at yandex.ru>
8 *
9 * (C) Copyright 2006-2008
10 * Stefan Roese, DENX Software Engineering, sr at denx.de.
Magnus Lilja4133f652009-06-13 20:50:01 +020011 */
12
13#include <common.h>
Simon Glassf11478f2019-12-28 10:45:07 -070014#include <hang.h>
Magnus Lilja4133f652009-06-13 20:50:01 +020015#include <nand.h>
Tom Rini3bde7e22021-09-22 14:50:35 -040016#include <linux/mtd/rawnand.h>
Peter Tyser133c0fe2010-04-12 22:28:07 -050017#include <asm/arch/imx-regs.h>
Magnus Lilja4133f652009-06-13 20:50:01 +020018#include <asm/io.h>
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000019#include "mxc_nand.h"
Magnus Lilja4133f652009-06-13 20:50:01 +020020
Benoît Thébaudeau8f265962013-04-11 09:35:37 +000021#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000022static struct mxc_nand_regs *const nfc = (void *)NFC_BASE_ADDR;
Benoît Thébaudeau8f265962013-04-11 09:35:37 +000023#elif defined(MXC_NFC_V3_2)
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000024static struct mxc_nand_regs *const nfc = (void *)NFC_BASE_ADDR_AXI;
25static struct mxc_nand_ip_regs *const nfc_ip = (void *)NFC_BASE_ADDR;
Benoît Thébaudeau8f265962013-04-11 09:35:37 +000026#endif
Magnus Lilja4133f652009-06-13 20:50:01 +020027
28static void nfc_wait_ready(void)
29{
30 uint32_t tmp;
31
Benoît Thébaudeau8f265962013-04-11 09:35:37 +000032#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
Benoît Thébaudeau555bba12013-04-11 09:35:36 +000033 while (!(readnfc(&nfc->config2) & NFC_V1_V2_CONFIG2_INT))
Magnus Lilja4133f652009-06-13 20:50:01 +020034 ;
35
36 /* Reset interrupt flag */
Benoît Thébaudeau555bba12013-04-11 09:35:36 +000037 tmp = readnfc(&nfc->config2);
38 tmp &= ~NFC_V1_V2_CONFIG2_INT;
39 writenfc(tmp, &nfc->config2);
Benoît Thébaudeau8f265962013-04-11 09:35:37 +000040#elif defined(MXC_NFC_V3_2)
41 while (!(readnfc(&nfc_ip->ipc) & NFC_V3_IPC_INT))
42 ;
43
44 /* Reset interrupt flag */
45 tmp = readnfc(&nfc_ip->ipc);
46 tmp &= ~NFC_V3_IPC_INT;
47 writenfc(tmp, &nfc_ip->ipc);
48#endif
Magnus Lilja4133f652009-06-13 20:50:01 +020049}
50
Benoît Thébaudeau32ae5b42012-08-13 22:48:26 +020051static void nfc_nand_init(void)
Magnus Lilja4133f652009-06-13 20:50:01 +020052{
Benoît Thébaudeau8f265962013-04-11 09:35:37 +000053#if defined(MXC_NFC_V3_2)
54 int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
55 int tmp;
56
57 tmp = (readnfc(&nfc_ip->config2) & ~(NFC_V3_CONFIG2_SPAS_MASK |
58 NFC_V3_CONFIG2_EDC_MASK | NFC_V3_CONFIG2_PS_MASK)) |
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000059 NFC_V3_CONFIG2_SPAS(CONFIG_SYS_NAND_OOBSIZE / 2) |
Benoît Thébaudeau8f265962013-04-11 09:35:37 +000060 NFC_V3_CONFIG2_INT_MSK | NFC_V3_CONFIG2_ECC_EN |
61 NFC_V3_CONFIG2_ONE_CYCLE;
62 if (CONFIG_SYS_NAND_PAGE_SIZE == 4096)
63 tmp |= NFC_V3_CONFIG2_PS_4096;
64 else if (CONFIG_SYS_NAND_PAGE_SIZE == 2048)
65 tmp |= NFC_V3_CONFIG2_PS_2048;
66 else if (CONFIG_SYS_NAND_PAGE_SIZE == 512)
67 tmp |= NFC_V3_CONFIG2_PS_512;
68 /*
69 * if spare size is larger that 16 bytes per 512 byte hunk
70 * then use 8 symbol correction instead of 4
71 */
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000072 if (CONFIG_SYS_NAND_OOBSIZE / ecc_per_page > 16)
Benoît Thébaudeau8f265962013-04-11 09:35:37 +000073 tmp |= NFC_V3_CONFIG2_ECC_MODE_8;
74 else
75 tmp &= ~NFC_V3_CONFIG2_ECC_MODE_8;
76 writenfc(tmp, &nfc_ip->config2);
77
78 tmp = NFC_V3_CONFIG3_NUM_OF_DEVS(0) |
79 NFC_V3_CONFIG3_NO_SDMA |
80 NFC_V3_CONFIG3_RBB_MODE |
81 NFC_V3_CONFIG3_SBB(6) | /* Reset default */
82 NFC_V3_CONFIG3_ADD_OP(0);
83#ifndef CONFIG_SYS_NAND_BUSWIDTH_16
84 tmp |= NFC_V3_CONFIG3_FW8;
85#endif
86 writenfc(tmp, &nfc_ip->config3);
87
88 writenfc(0, &nfc_ip->delay_line);
89#elif defined(MXC_NFC_V2_1)
Benoît Thébaudeau32ae5b42012-08-13 22:48:26 +020090 int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
John Rigby4c94c452010-01-26 19:24:17 -070091 int config1;
92
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000093 writenfc(CONFIG_SYS_NAND_OOBSIZE / 2, &nfc->spare_area_size);
John Rigby4c94c452010-01-26 19:24:17 -070094
95 /* unlocking RAM Buff */
Benoît Thébaudeau555bba12013-04-11 09:35:36 +000096 writenfc(0x2, &nfc->config);
John Rigby4c94c452010-01-26 19:24:17 -070097
98 /* hardware ECC checking and correct */
Benoît Thébaudeau555bba12013-04-11 09:35:36 +000099 config1 = readnfc(&nfc->config1) | NFC_V1_V2_CONFIG1_ECC_EN |
100 NFC_V1_V2_CONFIG1_INT_MSK | NFC_V2_CONFIG1_ONE_CYCLE |
101 NFC_V2_CONFIG1_FP_INT;
John Rigby4c94c452010-01-26 19:24:17 -0700102 /*
103 * if spare size is larger that 16 bytes per 512 byte hunk
104 * then use 8 symbol correction instead of 4
105 */
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +0000106 if (CONFIG_SYS_NAND_OOBSIZE / ecc_per_page > 16)
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000107 config1 &= ~NFC_V2_CONFIG1_ECC_MODE_4;
John Rigby4c94c452010-01-26 19:24:17 -0700108 else
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000109 config1 |= NFC_V2_CONFIG1_ECC_MODE_4;
110 writenfc(config1, &nfc->config1);
John Rigby4c94c452010-01-26 19:24:17 -0700111#elif defined(MXC_NFC_V1)
Magnus Lilja4133f652009-06-13 20:50:01 +0200112 /* unlocking RAM Buff */
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000113 writenfc(0x2, &nfc->config);
Magnus Lilja4133f652009-06-13 20:50:01 +0200114
115 /* hardware ECC checking and correct */
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000116 writenfc(NFC_V1_V2_CONFIG1_ECC_EN | NFC_V1_V2_CONFIG1_INT_MSK,
117 &nfc->config1);
John Rigby4c94c452010-01-26 19:24:17 -0700118#endif
Magnus Lilja4133f652009-06-13 20:50:01 +0200119}
120
121static void nfc_nand_command(unsigned short command)
122{
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000123 writenfc(command, &nfc->flash_cmd);
124 writenfc(NFC_CMD, &nfc->operation);
Magnus Lilja4133f652009-06-13 20:50:01 +0200125 nfc_wait_ready();
126}
127
Benoît Thébaudeau2174f3b2012-08-13 22:48:56 +0200128static void nfc_nand_address(unsigned short address)
129{
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000130 writenfc(address, &nfc->flash_addr);
131 writenfc(NFC_ADDR, &nfc->operation);
Benoît Thébaudeau2174f3b2012-08-13 22:48:56 +0200132 nfc_wait_ready();
133}
134
Magnus Lilja4133f652009-06-13 20:50:01 +0200135static void nfc_nand_page_address(unsigned int page_address)
136{
137 unsigned int page_count;
138
Benoît Thébaudeau2174f3b2012-08-13 22:48:56 +0200139 nfc_nand_address(0x00);
Magnus Lilja4133f652009-06-13 20:50:01 +0200140
John Rigby4c94c452010-01-26 19:24:17 -0700141 /* code only for large page flash */
Benoît Thébaudeau2174f3b2012-08-13 22:48:56 +0200142 if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
143 nfc_nand_address(0x00);
Magnus Lilja4133f652009-06-13 20:50:01 +0200144
145 page_count = CONFIG_SYS_NAND_SIZE / CONFIG_SYS_NAND_PAGE_SIZE;
146
147 if (page_address <= page_count) {
148 page_count--; /* transform 0x01000000 to 0x00ffffff */
149 do {
Benoît Thébaudeau2174f3b2012-08-13 22:48:56 +0200150 nfc_nand_address(page_address & 0xff);
Magnus Lilja4133f652009-06-13 20:50:01 +0200151 page_address = page_address >> 8;
152 page_count = page_count >> 8;
153 } while (page_count);
154 }
John Rigby4c94c452010-01-26 19:24:17 -0700155
Benoît Thébaudeau2174f3b2012-08-13 22:48:56 +0200156 nfc_nand_address(0x00);
Magnus Lilja4133f652009-06-13 20:50:01 +0200157}
158
159static void nfc_nand_data_output(void)
160{
John Rigby4c94c452010-01-26 19:24:17 -0700161#ifdef NAND_MXC_2K_MULTI_CYCLE
Magnus Lilja4133f652009-06-13 20:50:01 +0200162 int i;
John Rigby4c94c452010-01-26 19:24:17 -0700163#endif
Magnus Lilja4133f652009-06-13 20:50:01 +0200164
Benoît Thébaudeau8f265962013-04-11 09:35:37 +0000165#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000166 writenfc(0, &nfc->buf_addr);
Benoît Thébaudeau8f265962013-04-11 09:35:37 +0000167#elif defined(MXC_NFC_V3_2)
168 int config1 = readnfc(&nfc->config1);
169 config1 &= ~NFC_V3_CONFIG1_RBA_MASK;
170 writenfc(config1, &nfc->config1);
171#endif
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000172 writenfc(NFC_OUTPUT, &nfc->operation);
John Rigby4c94c452010-01-26 19:24:17 -0700173 nfc_wait_ready();
174#ifdef NAND_MXC_2K_MULTI_CYCLE
Magnus Lilja4133f652009-06-13 20:50:01 +0200175 /*
John Rigby4c94c452010-01-26 19:24:17 -0700176 * This NAND controller requires multiple input commands
177 * for pages larger than 512 bytes.
Magnus Lilja4133f652009-06-13 20:50:01 +0200178 */
Benoît Thébaudeau32ae5b42012-08-13 22:48:26 +0200179 for (i = 1; i < CONFIG_SYS_NAND_PAGE_SIZE / 512; i++) {
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000180 writenfc(i, &nfc->buf_addr);
181 writenfc(NFC_OUTPUT, &nfc->operation);
Magnus Lilja4133f652009-06-13 20:50:01 +0200182 nfc_wait_ready();
183 }
John Rigby4c94c452010-01-26 19:24:17 -0700184#endif
Magnus Lilja4133f652009-06-13 20:50:01 +0200185}
186
187static int nfc_nand_check_ecc(void)
188{
Benoît Thébaudeaud29aeba2012-08-13 22:49:42 +0200189#if defined(MXC_NFC_V1)
Benoît Thébaudeau21fa48c2012-08-13 22:49:53 +0200190 u16 ecc_status = readw(&nfc->ecc_status_result);
191 return (ecc_status & 0x3) == 2 || (ecc_status >> 2) == 2;
Benoît Thébaudeau8f265962013-04-11 09:35:37 +0000192#elif defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
Benoît Thébaudeau21fa48c2012-08-13 22:49:53 +0200193 u32 ecc_status = readl(&nfc->ecc_status_result);
194 int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +0000195 int err_limit = CONFIG_SYS_NAND_OOBSIZE / ecc_per_page > 16 ? 8 : 4;
Benoît Thébaudeau21fa48c2012-08-13 22:49:53 +0200196 int subpages = CONFIG_SYS_NAND_PAGE_SIZE / 512;
197
198 do {
199 if ((ecc_status & 0xf) > err_limit)
200 return 1;
201 ecc_status >>= 4;
202 } while (--subpages);
203
204 return 0;
Benoît Thébaudeaud29aeba2012-08-13 22:49:42 +0200205#endif
Magnus Lilja4133f652009-06-13 20:50:01 +0200206}
207
Benoît Thébaudeau2174f3b2012-08-13 22:48:56 +0200208static void nfc_nand_read_page(unsigned int page_address)
Magnus Lilja4133f652009-06-13 20:50:01 +0200209{
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000210 /* read in first 0 buffer */
Benoît Thébaudeau8f265962013-04-11 09:35:37 +0000211#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000212 writenfc(0, &nfc->buf_addr);
Benoît Thébaudeau8f265962013-04-11 09:35:37 +0000213#elif defined(MXC_NFC_V3_2)
214 int config1 = readnfc(&nfc->config1);
215 config1 &= ~NFC_V3_CONFIG1_RBA_MASK;
216 writenfc(config1, &nfc->config1);
217#endif
Magnus Lilja4133f652009-06-13 20:50:01 +0200218 nfc_nand_command(NAND_CMD_READ0);
219 nfc_nand_page_address(page_address);
220
John Rigby4c94c452010-01-26 19:24:17 -0700221 if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
Magnus Lilja4133f652009-06-13 20:50:01 +0200222 nfc_nand_command(NAND_CMD_READSTART);
223
224 nfc_nand_data_output(); /* fill the main buffer 0 */
Benoît Thébaudeau2174f3b2012-08-13 22:48:56 +0200225}
226
227static int nfc_read_page(unsigned int page_address, unsigned char *buf)
228{
229 int i;
230 u32 *src;
231 u32 *dst;
232
233 nfc_nand_read_page(page_address);
Magnus Lilja4133f652009-06-13 20:50:01 +0200234
235 if (nfc_nand_check_ecc())
Scott Wood52ab7ce2016-05-30 13:57:58 -0500236 return -EBADMSG;
Magnus Lilja4133f652009-06-13 20:50:01 +0200237
Benoît Thébaudeau3f775192012-08-13 22:48:12 +0200238 src = (u32 *)&nfc->main_area[0][0];
Magnus Lilja4133f652009-06-13 20:50:01 +0200239 dst = (u32 *)buf;
240
241 /* main copy loop from NAND-buffer to SDRAM memory */
Benoît Thébaudeau32ae5b42012-08-13 22:48:26 +0200242 for (i = 0; i < CONFIG_SYS_NAND_PAGE_SIZE / 4; i++) {
Magnus Lilja4133f652009-06-13 20:50:01 +0200243 writel(readl(src), dst);
244 src++;
245 dst++;
246 }
247
248 return 0;
249}
250
251static int is_badblock(int pagenumber)
252{
253 int page = pagenumber;
254 u32 badblock;
255 u32 *src;
256
257 /* Check the first two pages for bad block markers */
258 for (page = pagenumber; page < pagenumber + 2; page++) {
Benoît Thébaudeau2174f3b2012-08-13 22:48:56 +0200259 nfc_nand_read_page(page);
Magnus Lilja4133f652009-06-13 20:50:01 +0200260
Benoît Thébaudeau3f775192012-08-13 22:48:12 +0200261 src = (u32 *)&nfc->spare_area[0][0];
Magnus Lilja4133f652009-06-13 20:50:01 +0200262
263 /*
264 * IMPORTANT NOTE: The nand flash controller uses a non-
265 * standard layout for large page devices. This can
266 * affect the position of the bad block marker.
267 */
268 /* Get the bad block marker */
269 badblock = readl(&src[CONFIG_SYS_NAND_BAD_BLOCK_POS / 4]);
270 badblock >>= 8 * (CONFIG_SYS_NAND_BAD_BLOCK_POS % 4);
271 badblock &= 0xff;
272
273 /* bad block marker verify */
274 if (badblock != 0xff)
275 return 1; /* potential bad block */
276 }
277
278 return 0;
279}
280
Marek Vasut24016692013-04-21 05:52:23 +0000281int nand_spl_load_image(uint32_t from, unsigned int size, void *buf)
Magnus Lilja4133f652009-06-13 20:50:01 +0200282{
283 int i;
284 unsigned int page;
285 unsigned int maxpages = CONFIG_SYS_NAND_SIZE /
286 CONFIG_SYS_NAND_PAGE_SIZE;
287
Magnus Lilja4133f652009-06-13 20:50:01 +0200288 nfc_nand_init();
289
290 /* Convert to page number */
291 page = from / CONFIG_SYS_NAND_PAGE_SIZE;
292 i = 0;
293
Marek Vasut24016692013-04-21 05:52:23 +0000294 size = roundup(size, CONFIG_SYS_NAND_PAGE_SIZE);
Benoît Thébaudeau32ae5b42012-08-13 22:48:26 +0200295 while (i < size / CONFIG_SYS_NAND_PAGE_SIZE) {
Magnus Lilja4133f652009-06-13 20:50:01 +0200296 if (nfc_read_page(page, buf) < 0)
297 return -1;
298
299 page++;
300 i++;
301 buf = buf + CONFIG_SYS_NAND_PAGE_SIZE;
302
303 /*
304 * Check if we have crossed a block boundary, and if so
305 * check for bad block.
306 */
307 if (!(page % CONFIG_SYS_NAND_PAGE_COUNT)) {
308 /*
309 * Yes, new block. See if this block is good. If not,
John Rigby4c94c452010-01-26 19:24:17 -0700310 * loop until we find a good block.
Magnus Lilja4133f652009-06-13 20:50:01 +0200311 */
312 while (is_badblock(page)) {
313 page = page + CONFIG_SYS_NAND_PAGE_COUNT;
314 /* Check i we've reached the end of flash. */
315 if (page >= maxpages)
316 return -1;
317 }
318 }
319 }
320
321 return 0;
322}
323
Marek Vasut24016692013-04-21 05:52:23 +0000324#ifndef CONFIG_SPL_FRAMEWORK
Magnus Lilja4133f652009-06-13 20:50:01 +0200325/*
326 * The main entry for NAND booting. It's necessary that SDRAM is already
327 * configured and available since this code loads the main U-Boot image
328 * from NAND into SDRAM and starts it from there.
329 */
Marek Behún4c0237c2021-05-20 13:24:13 +0200330__used void nand_boot(void)
Magnus Lilja4133f652009-06-13 20:50:01 +0200331{
332 __attribute__((noreturn)) void (*uboot)(void);
333
Magnus Lilja4133f652009-06-13 20:50:01 +0200334 /*
335 * CONFIG_SYS_NAND_U_BOOT_OFFS and CONFIG_SYS_NAND_U_BOOT_SIZE must
336 * be aligned to full pages
337 */
Marek Vasut24016692013-04-21 05:52:23 +0000338 if (!nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
339 CONFIG_SYS_NAND_U_BOOT_SIZE,
340 (uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
Bin Meng75574052016-02-05 19:30:11 -0800341 /* Copy from NAND successful, start U-Boot */
Magnus Lilja4133f652009-06-13 20:50:01 +0200342 uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
343 uboot();
344 } else {
345 /* Unrecoverable error when copying from NAND */
346 hang();
347 }
348}
Marek Vasut24016692013-04-21 05:52:23 +0000349#endif
Albert ARIBAUDaa018732013-05-11 04:29:50 +0000350
351void nand_init(void) {}
352void nand_deselect(void) {}