Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 2 | /* |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 3 | * Driver for the TWSI (i2c) controller found on the Marvell |
| 4 | * orion5x and kirkwood SoC families. |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 5 | * |
Albert ARIBAUD | 340983d | 2011-04-22 19:41:02 +0200 | [diff] [blame] | 6 | * Author: Albert Aribaud <albert.u.boot@aribaud.net> |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 7 | * Copyright (c) 2010 Albert Aribaud. |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 8 | */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 9 | |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 10 | #include <common.h> |
| 11 | #include <i2c.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 12 | #include <log.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 13 | #include <asm/global_data.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 14 | #include <linux/delay.h> |
Masahiro Yamada | 56a931c | 2016-09-21 11:28:55 +0900 | [diff] [blame] | 15 | #include <linux/errno.h> |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 16 | #include <asm/io.h> |
Baruch Siach | 91006c7 | 2018-06-07 12:38:10 +0300 | [diff] [blame] | 17 | #include <linux/bitops.h> |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 18 | #include <linux/compat.h> |
Igor Opaniuk | f7c9176 | 2021-02-09 13:52:45 +0200 | [diff] [blame] | 19 | #if CONFIG_IS_ENABLED(DM_I2C) |
Samuel Holland | 5b35b29 | 2021-09-12 10:21:39 -0500 | [diff] [blame] | 20 | #include <clk.h> |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 21 | #include <dm.h> |
Samuel Holland | 5b35b29 | 2021-09-12 10:21:39 -0500 | [diff] [blame] | 22 | #include <reset.h> |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 23 | #endif |
| 24 | |
| 25 | DECLARE_GLOBAL_DATA_PTR; |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 26 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 27 | /* |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 28 | * Include a file that will provide CONFIG_I2C_MVTWSI_BASE*, and possibly other |
| 29 | * settings |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 30 | */ |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 31 | |
Igor Opaniuk | f7c9176 | 2021-02-09 13:52:45 +0200 | [diff] [blame] | 32 | #if !CONFIG_IS_ENABLED(DM_I2C) |
Trevor Woerner | f995375 | 2020-05-06 08:02:38 -0400 | [diff] [blame] | 33 | #if defined(CONFIG_ARCH_ORION5X) |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 34 | #include <asm/arch/orion5x.h> |
Trevor Woerner | bb7ab07 | 2020-05-06 08:02:40 -0400 | [diff] [blame] | 35 | #elif (defined(CONFIG_ARCH_KIRKWOOD) || defined(CONFIG_ARCH_MVEBU)) |
Stefan Roese | c243784 | 2014-10-22 12:13:06 +0200 | [diff] [blame] | 36 | #include <asm/arch/soc.h> |
Jagan Teki | 68078f7 | 2016-10-13 14:19:35 +0530 | [diff] [blame] | 37 | #elif defined(CONFIG_ARCH_SUNXI) |
Hans de Goede | 3352b22 | 2014-06-13 22:55:49 +0200 | [diff] [blame] | 38 | #include <asm/arch/i2c.h> |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 39 | #else |
| 40 | #error Driver mvtwsi not supported by SoC or board |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 41 | #endif |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 42 | #endif /* CONFIG_DM_I2C */ |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 43 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 44 | /* |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 45 | * On SUNXI, we get CFG_SYS_TCLK from this include, so we want to |
Jernej Skrabec | 9220d50 | 2017-04-27 00:03:36 +0200 | [diff] [blame] | 46 | * always have it. |
| 47 | */ |
Igor Opaniuk | f7c9176 | 2021-02-09 13:52:45 +0200 | [diff] [blame] | 48 | #if CONFIG_IS_ENABLED(DM_I2C) && defined(CONFIG_ARCH_SUNXI) |
Jernej Skrabec | 9220d50 | 2017-04-27 00:03:36 +0200 | [diff] [blame] | 49 | #include <asm/arch/i2c.h> |
| 50 | #endif |
| 51 | |
| 52 | /* |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 53 | * TWSI register structure |
| 54 | */ |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 55 | |
Jagan Teki | 68078f7 | 2016-10-13 14:19:35 +0530 | [diff] [blame] | 56 | #ifdef CONFIG_ARCH_SUNXI |
Hans de Goede | 3352b22 | 2014-06-13 22:55:49 +0200 | [diff] [blame] | 57 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 58 | struct mvtwsi_registers { |
| 59 | u32 slave_address; |
Hans de Goede | 3352b22 | 2014-06-13 22:55:49 +0200 | [diff] [blame] | 60 | u32 xtnd_slave_addr; |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 61 | u32 data; |
| 62 | u32 control; |
Hans de Goede | 3352b22 | 2014-06-13 22:55:49 +0200 | [diff] [blame] | 63 | u32 status; |
| 64 | u32 baudrate; |
| 65 | u32 soft_reset; |
Baruch Siach | 91006c7 | 2018-06-07 12:38:10 +0300 | [diff] [blame] | 66 | u32 debug; /* Dummy field for build compatibility with mvebu */ |
Hans de Goede | 3352b22 | 2014-06-13 22:55:49 +0200 | [diff] [blame] | 67 | }; |
| 68 | |
| 69 | #else |
| 70 | |
| 71 | struct mvtwsi_registers { |
| 72 | u32 slave_address; |
| 73 | u32 data; |
| 74 | u32 control; |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 75 | union { |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 76 | u32 status; /* When reading */ |
| 77 | u32 baudrate; /* When writing */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 78 | }; |
| 79 | u32 xtnd_slave_addr; |
Baruch Siach | 91006c7 | 2018-06-07 12:38:10 +0300 | [diff] [blame] | 80 | u32 reserved0[2]; |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 81 | u32 soft_reset; |
Baruch Siach | 91006c7 | 2018-06-07 12:38:10 +0300 | [diff] [blame] | 82 | u32 reserved1[27]; |
| 83 | u32 debug; |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 84 | }; |
| 85 | |
Hans de Goede | 3352b22 | 2014-06-13 22:55:49 +0200 | [diff] [blame] | 86 | #endif |
| 87 | |
Igor Opaniuk | f7c9176 | 2021-02-09 13:52:45 +0200 | [diff] [blame] | 88 | #if CONFIG_IS_ENABLED(DM_I2C) |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 89 | struct mvtwsi_i2c_dev { |
| 90 | /* TWSI Register base for the device */ |
| 91 | struct mvtwsi_registers *base; |
| 92 | /* Number of the device (determined from cell-index property) */ |
| 93 | int index; |
| 94 | /* The I2C slave address for the device */ |
| 95 | u8 slaveadd; |
| 96 | /* The configured I2C speed in Hz */ |
| 97 | uint speed; |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 98 | /* The current length of a clock period (depending on speed) */ |
| 99 | uint tick; |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 100 | }; |
| 101 | #endif /* CONFIG_DM_I2C */ |
| 102 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 103 | /* |
mario.six@gdsys.cc | f43d3e9 | 2016-07-21 11:57:02 +0200 | [diff] [blame] | 104 | * enum mvtwsi_ctrl_register_fields - Bit masks for flags in the control |
| 105 | * register |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 106 | */ |
mario.six@gdsys.cc | f43d3e9 | 2016-07-21 11:57:02 +0200 | [diff] [blame] | 107 | enum mvtwsi_ctrl_register_fields { |
| 108 | /* Acknowledge bit */ |
| 109 | MVTWSI_CONTROL_ACK = 0x00000004, |
| 110 | /* Interrupt flag */ |
| 111 | MVTWSI_CONTROL_IFLG = 0x00000008, |
| 112 | /* Stop bit */ |
| 113 | MVTWSI_CONTROL_STOP = 0x00000010, |
| 114 | /* Start bit */ |
| 115 | MVTWSI_CONTROL_START = 0x00000020, |
| 116 | /* I2C enable */ |
| 117 | MVTWSI_CONTROL_TWSIEN = 0x00000040, |
| 118 | /* Interrupt enable */ |
| 119 | MVTWSI_CONTROL_INTEN = 0x00000080, |
| 120 | }; |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 121 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 122 | /* |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 123 | * On sun6i and newer, IFLG is a write-clear bit, which is cleared by writing 1; |
| 124 | * on other platforms, it is a normal r/w bit, which is cleared by writing 0. |
Hans de Goede | 6b703e0 | 2016-01-14 14:06:25 +0100 | [diff] [blame] | 125 | */ |
| 126 | |
Andre Przywara | 068962b | 2022-10-05 17:54:19 +0100 | [diff] [blame] | 127 | #if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6) || \ |
| 128 | defined(CONFIG_SUNXI_GEN_NCAT2) |
Hans de Goede | 6b703e0 | 2016-01-14 14:06:25 +0100 | [diff] [blame] | 129 | #define MVTWSI_CONTROL_CLEAR_IFLG 0x00000008 |
| 130 | #else |
| 131 | #define MVTWSI_CONTROL_CLEAR_IFLG 0x00000000 |
| 132 | #endif |
| 133 | |
| 134 | /* |
mario.six@gdsys.cc | f43d3e9 | 2016-07-21 11:57:02 +0200 | [diff] [blame] | 135 | * enum mvstwsi_status_values - Possible values of I2C controller's status |
| 136 | * register |
| 137 | * |
| 138 | * Only those statuses expected in normal master operation on |
| 139 | * non-10-bit-address devices are specified. |
| 140 | * |
| 141 | * Every status that's unexpected during normal operation (bus errors, |
| 142 | * arbitration losses, missing ACKs...) is passed back to the caller as an error |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 143 | * code. |
| 144 | */ |
mario.six@gdsys.cc | f43d3e9 | 2016-07-21 11:57:02 +0200 | [diff] [blame] | 145 | enum mvstwsi_status_values { |
Sam Edwards | c250f5e | 2023-07-25 16:13:05 -0600 | [diff] [blame] | 146 | /* Protocol violation on bus; this is a terminal state */ |
| 147 | MVTWSI_BUS_ERROR = 0x00, |
mario.six@gdsys.cc | f43d3e9 | 2016-07-21 11:57:02 +0200 | [diff] [blame] | 148 | /* START condition transmitted */ |
| 149 | MVTWSI_STATUS_START = 0x08, |
| 150 | /* Repeated START condition transmitted */ |
| 151 | MVTWSI_STATUS_REPEATED_START = 0x10, |
| 152 | /* Address + write bit transmitted, ACK received */ |
| 153 | MVTWSI_STATUS_ADDR_W_ACK = 0x18, |
| 154 | /* Data transmitted, ACK received */ |
| 155 | MVTWSI_STATUS_DATA_W_ACK = 0x28, |
| 156 | /* Address + read bit transmitted, ACK received */ |
| 157 | MVTWSI_STATUS_ADDR_R_ACK = 0x40, |
| 158 | /* Address + read bit transmitted, ACK not received */ |
| 159 | MVTWSI_STATUS_ADDR_R_NAK = 0x48, |
| 160 | /* Data received, ACK transmitted */ |
| 161 | MVTWSI_STATUS_DATA_R_ACK = 0x50, |
| 162 | /* Data received, ACK not transmitted */ |
| 163 | MVTWSI_STATUS_DATA_R_NAK = 0x58, |
| 164 | /* No relevant status */ |
| 165 | MVTWSI_STATUS_IDLE = 0xF8, |
| 166 | }; |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 167 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 168 | /* |
mario.six@gdsys.cc | 1cc2c28 | 2016-07-21 11:57:04 +0200 | [diff] [blame] | 169 | * enum mvstwsi_ack_flags - Determine whether a read byte should be |
| 170 | * acknowledged or not. |
| 171 | */ |
| 172 | enum mvtwsi_ack_flags { |
| 173 | /* Send NAK after received byte */ |
| 174 | MVTWSI_READ_NAK = 0, |
| 175 | /* Send ACK after received byte */ |
| 176 | MVTWSI_READ_ACK = 1, |
| 177 | }; |
| 178 | |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 179 | /* |
| 180 | * calc_tick() - Calculate the duration of a clock cycle from the I2C speed |
| 181 | * |
| 182 | * @speed: The speed in Hz to calculate the clock cycle duration for. |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 183 | * Return: The duration of a clock cycle in ns. |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 184 | */ |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 185 | inline uint calc_tick(uint speed) |
| 186 | { |
| 187 | /* One tick = the duration of a period at the specified speed in ns (we |
| 188 | * add 100 ns to be on the safe side) */ |
| 189 | return (1000000000u / speed) + 100; |
| 190 | } |
| 191 | |
Igor Opaniuk | f7c9176 | 2021-02-09 13:52:45 +0200 | [diff] [blame] | 192 | #if !CONFIG_IS_ENABLED(DM_I2C) |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 193 | |
mario.six@gdsys.cc | 1cc2c28 | 2016-07-21 11:57:04 +0200 | [diff] [blame] | 194 | /* |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 195 | * twsi_get_base() - Get controller register base for specified adapter |
| 196 | * |
| 197 | * @adap: Adapter to get the register base for. |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 198 | * Return: Register base for the specified adapter. |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 199 | */ |
Paul Kocialkowski | 2fae3e7 | 2015-04-10 23:09:51 +0200 | [diff] [blame] | 200 | static struct mvtwsi_registers *twsi_get_base(struct i2c_adapter *adap) |
| 201 | { |
| 202 | switch (adap->hwadapnr) { |
Tom Rini | c188ed4 | 2022-12-04 10:04:09 -0500 | [diff] [blame] | 203 | #ifdef CFG_I2C_MVTWSI_BASE0 |
Paul Kocialkowski | 2fae3e7 | 2015-04-10 23:09:51 +0200 | [diff] [blame] | 204 | case 0: |
Tom Rini | c188ed4 | 2022-12-04 10:04:09 -0500 | [diff] [blame] | 205 | return (struct mvtwsi_registers *)CFG_I2C_MVTWSI_BASE0; |
Paul Kocialkowski | 2fae3e7 | 2015-04-10 23:09:51 +0200 | [diff] [blame] | 206 | #endif |
Tom Rini | 34e4e86 | 2022-12-04 10:04:10 -0500 | [diff] [blame] | 207 | #ifdef CFG_I2C_MVTWSI_BASE1 |
Paul Kocialkowski | 2fae3e7 | 2015-04-10 23:09:51 +0200 | [diff] [blame] | 208 | case 1: |
Tom Rini | 34e4e86 | 2022-12-04 10:04:10 -0500 | [diff] [blame] | 209 | return (struct mvtwsi_registers *)CFG_I2C_MVTWSI_BASE1; |
Paul Kocialkowski | 2fae3e7 | 2015-04-10 23:09:51 +0200 | [diff] [blame] | 210 | #endif |
Tom Rini | 364d002 | 2023-01-10 11:19:45 -0500 | [diff] [blame] | 211 | #ifdef CFG_I2C_MVTWSI_BASE2 |
Paul Kocialkowski | 2fae3e7 | 2015-04-10 23:09:51 +0200 | [diff] [blame] | 212 | case 2: |
Tom Rini | 364d002 | 2023-01-10 11:19:45 -0500 | [diff] [blame] | 213 | return (struct mvtwsi_registers *)CFG_I2C_MVTWSI_BASE2; |
Paul Kocialkowski | 2fae3e7 | 2015-04-10 23:09:51 +0200 | [diff] [blame] | 214 | #endif |
| 215 | #ifdef CONFIG_I2C_MVTWSI_BASE3 |
| 216 | case 3: |
mario.six@gdsys.cc | 2b656eb | 2016-07-21 11:57:01 +0200 | [diff] [blame] | 217 | return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE3; |
Paul Kocialkowski | 2fae3e7 | 2015-04-10 23:09:51 +0200 | [diff] [blame] | 218 | #endif |
| 219 | #ifdef CONFIG_I2C_MVTWSI_BASE4 |
| 220 | case 4: |
mario.six@gdsys.cc | 2b656eb | 2016-07-21 11:57:01 +0200 | [diff] [blame] | 221 | return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE4; |
Paul Kocialkowski | 2fae3e7 | 2015-04-10 23:09:51 +0200 | [diff] [blame] | 222 | #endif |
Jelle van der Waa | 8d3d7c1 | 2016-01-14 14:06:26 +0100 | [diff] [blame] | 223 | #ifdef CONFIG_I2C_MVTWSI_BASE5 |
| 224 | case 5: |
mario.six@gdsys.cc | 2b656eb | 2016-07-21 11:57:01 +0200 | [diff] [blame] | 225 | return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE5; |
Jelle van der Waa | 8d3d7c1 | 2016-01-14 14:06:26 +0100 | [diff] [blame] | 226 | #endif |
Paul Kocialkowski | 2fae3e7 | 2015-04-10 23:09:51 +0200 | [diff] [blame] | 227 | default: |
| 228 | printf("Missing mvtwsi controller %d base\n", adap->hwadapnr); |
| 229 | break; |
| 230 | } |
| 231 | |
| 232 | return NULL; |
| 233 | } |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 234 | #endif |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 235 | |
| 236 | /* |
mario.six@gdsys.cc | f43d3e9 | 2016-07-21 11:57:02 +0200 | [diff] [blame] | 237 | * enum mvtwsi_error_class - types of I2C errors |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 238 | */ |
mario.six@gdsys.cc | f43d3e9 | 2016-07-21 11:57:02 +0200 | [diff] [blame] | 239 | enum mvtwsi_error_class { |
| 240 | /* The controller returned a different status than expected */ |
| 241 | MVTWSI_ERROR_WRONG_STATUS = 0x01, |
| 242 | /* The controller timed out */ |
| 243 | MVTWSI_ERROR_TIMEOUT = 0x02, |
| 244 | }; |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 245 | |
mario.six@gdsys.cc | f43d3e9 | 2016-07-21 11:57:02 +0200 | [diff] [blame] | 246 | /* |
| 247 | * mvtwsi_error() - Build I2C return code from error information |
| 248 | * |
| 249 | * For debugging purposes, this function packs some information of an occurred |
| 250 | * error into a return code. These error codes are returned from I2C API |
| 251 | * functions (i2c_{read,write}, dm_i2c_{read,write}, etc.). |
| 252 | * |
| 253 | * @ec: The error class of the error (enum mvtwsi_error_class). |
| 254 | * @lc: The last value of the control register. |
| 255 | * @ls: The last value of the status register. |
| 256 | * @es: The expected value of the status register. |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 257 | * Return: The generated error code. |
mario.six@gdsys.cc | f43d3e9 | 2016-07-21 11:57:02 +0200 | [diff] [blame] | 258 | */ |
| 259 | inline uint mvtwsi_error(uint ec, uint lc, uint ls, uint es) |
| 260 | { |
| 261 | return ((ec << 24) & 0xFF000000) |
| 262 | | ((lc << 16) & 0x00FF0000) |
| 263 | | ((ls << 8) & 0x0000FF00) |
| 264 | | (es & 0xFF); |
| 265 | } |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 266 | |
| 267 | /* |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 268 | * twsi_wait() - Wait for I2C bus interrupt flag and check status, or time out. |
| 269 | * |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 270 | * Return: Zero if status is as expected, or a non-zero code if either a time |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 271 | * out occurred, or the status was not the expected one. |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 272 | */ |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 273 | static int twsi_wait(struct mvtwsi_registers *twsi, int expected_status, |
| 274 | uint tick) |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 275 | { |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 276 | int control, status; |
| 277 | int timeout = 1000; |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 278 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 279 | do { |
| 280 | control = readl(&twsi->control); |
| 281 | if (control & MVTWSI_CONTROL_IFLG) { |
Marek Behún | b9739da | 2019-05-02 16:53:38 +0200 | [diff] [blame] | 282 | /* |
| 283 | * On Armada 38x it seems that the controller works as |
| 284 | * if it first set the MVTWSI_CONTROL_IFLAG in the |
| 285 | * control register and only after that it changed the |
| 286 | * status register. |
| 287 | * This sometimes caused weird bugs which only appeared |
| 288 | * on selected I2C speeds and even then only sometimes. |
| 289 | * We therefore add here a simple ndealy(100), which |
| 290 | * seems to fix this weird bug. |
| 291 | */ |
| 292 | ndelay(100); |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 293 | status = readl(&twsi->status); |
| 294 | if (status == expected_status) |
| 295 | return 0; |
| 296 | else |
mario.six@gdsys.cc | f43d3e9 | 2016-07-21 11:57:02 +0200 | [diff] [blame] | 297 | return mvtwsi_error( |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 298 | MVTWSI_ERROR_WRONG_STATUS, |
| 299 | control, status, expected_status); |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 300 | } |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 301 | ndelay(tick); /* One clock cycle */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 302 | } while (timeout--); |
| 303 | status = readl(&twsi->status); |
mario.six@gdsys.cc | f43d3e9 | 2016-07-21 11:57:02 +0200 | [diff] [blame] | 304 | return mvtwsi_error(MVTWSI_ERROR_TIMEOUT, control, status, |
| 305 | expected_status); |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 306 | } |
| 307 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 308 | /* |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 309 | * twsi_start() - Assert a START condition on the bus. |
| 310 | * |
| 311 | * This function is used in both single I2C transactions and inside |
| 312 | * back-to-back transactions (repeated starts). |
| 313 | * |
| 314 | * @twsi: The MVTWSI register structure to use. |
| 315 | * @expected_status: The I2C bus status expected to be asserted after the |
| 316 | * operation completion. |
| 317 | * @tick: The duration of a clock cycle at the current I2C speed. |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 318 | * Return: Zero if status is as expected, or a non-zero code if either a time |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 319 | * out occurred or the status was not the expected one. |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 320 | */ |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 321 | static int twsi_start(struct mvtwsi_registers *twsi, int expected_status, |
| 322 | uint tick) |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 323 | { |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 324 | /* Assert START */ |
mario.six@gdsys.cc | 1cc2c28 | 2016-07-21 11:57:04 +0200 | [diff] [blame] | 325 | writel(MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_START | |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 326 | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control); |
| 327 | /* Wait for controller to process START */ |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 328 | return twsi_wait(twsi, expected_status, tick); |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 329 | } |
| 330 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 331 | /* |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 332 | * twsi_send() - Send a byte on the I2C bus. |
| 333 | * |
| 334 | * The byte may be part of an address byte or data. |
| 335 | * |
| 336 | * @twsi: The MVTWSI register structure to use. |
| 337 | * @byte: The byte to send. |
| 338 | * @expected_status: The I2C bus status expected to be asserted after the |
| 339 | * operation completion. |
| 340 | * @tick: The duration of a clock cycle at the current I2C speed. |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 341 | * Return: Zero if status is as expected, or a non-zero code if either a time |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 342 | * out occurred or the status was not the expected one. |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 343 | */ |
mario.six@gdsys.cc | 9f7f689 | 2016-07-21 11:57:08 +0200 | [diff] [blame] | 344 | static int twsi_send(struct mvtwsi_registers *twsi, u8 byte, |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 345 | int expected_status, uint tick) |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 346 | { |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 347 | /* Write byte to data register for sending */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 348 | writel(byte, &twsi->data); |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 349 | /* Clear any pending interrupt -- that will cause sending */ |
mario.six@gdsys.cc | 1cc2c28 | 2016-07-21 11:57:04 +0200 | [diff] [blame] | 350 | writel(MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_CLEAR_IFLG, |
| 351 | &twsi->control); |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 352 | /* Wait for controller to receive byte, and check ACK */ |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 353 | return twsi_wait(twsi, expected_status, tick); |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 354 | } |
| 355 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 356 | /* |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 357 | * twsi_recv() - Receive a byte on the I2C bus. |
| 358 | * |
| 359 | * The static variable mvtwsi_control_flags controls whether we ack or nak. |
| 360 | * |
| 361 | * @twsi: The MVTWSI register structure to use. |
| 362 | * @byte: The byte to send. |
| 363 | * @ack_flag: Flag that determines whether the received byte should |
| 364 | * be acknowledged by the controller or not (sent ACK/NAK). |
| 365 | * @tick: The duration of a clock cycle at the current I2C speed. |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 366 | * Return: Zero if status is as expected, or a non-zero code if either a time |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 367 | * out occurred or the status was not the expected one. |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 368 | */ |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 369 | static int twsi_recv(struct mvtwsi_registers *twsi, u8 *byte, int ack_flag, |
| 370 | uint tick) |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 371 | { |
mario.six@gdsys.cc | 1cc2c28 | 2016-07-21 11:57:04 +0200 | [diff] [blame] | 372 | int expected_status, status, control; |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 373 | |
mario.six@gdsys.cc | 1cc2c28 | 2016-07-21 11:57:04 +0200 | [diff] [blame] | 374 | /* Compute expected status based on passed ACK flag */ |
| 375 | expected_status = ack_flag ? MVTWSI_STATUS_DATA_R_ACK : |
| 376 | MVTWSI_STATUS_DATA_R_NAK; |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 377 | /* Acknowledge *previous state*, and launch receive */ |
mario.six@gdsys.cc | 1cc2c28 | 2016-07-21 11:57:04 +0200 | [diff] [blame] | 378 | control = MVTWSI_CONTROL_TWSIEN; |
| 379 | control |= ack_flag == MVTWSI_READ_ACK ? MVTWSI_CONTROL_ACK : 0; |
| 380 | writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control); |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 381 | /* Wait for controller to receive byte, and assert ACK or NAK */ |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 382 | status = twsi_wait(twsi, expected_status, tick); |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 383 | /* If we did receive the expected byte, store it */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 384 | if (status == 0) |
| 385 | *byte = readl(&twsi->data); |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 386 | return status; |
| 387 | } |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 388 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 389 | /* |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 390 | * twsi_stop() - Assert a STOP condition on the bus. |
| 391 | * |
| 392 | * This function is also used to force the bus back to idle state (SDA = |
| 393 | * SCL = 1). |
| 394 | * |
| 395 | * @twsi: The MVTWSI register structure to use. |
| 396 | * @tick: The duration of a clock cycle at the current I2C speed. |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 397 | * Return: Zero if the operation succeeded, or a non-zero code if a time out |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 398 | * occurred. |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 399 | */ |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 400 | static int twsi_stop(struct mvtwsi_registers *twsi, uint tick) |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 401 | { |
| 402 | int control, stop_status; |
mario.six@gdsys.cc | bdf0f66 | 2016-07-21 11:57:05 +0200 | [diff] [blame] | 403 | int status = 0; |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 404 | int timeout = 1000; |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 405 | |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 406 | /* Assert STOP */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 407 | control = MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_STOP; |
Hans de Goede | 6b703e0 | 2016-01-14 14:06:25 +0100 | [diff] [blame] | 408 | writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control); |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 409 | /* Wait for IDLE; IFLG won't rise, so we can't use twsi_wait() */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 410 | do { |
| 411 | stop_status = readl(&twsi->status); |
| 412 | if (stop_status == MVTWSI_STATUS_IDLE) |
| 413 | break; |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 414 | ndelay(tick); /* One clock cycle */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 415 | } while (timeout--); |
| 416 | control = readl(&twsi->control); |
| 417 | if (stop_status != MVTWSI_STATUS_IDLE) |
mario.six@gdsys.cc | bdf0f66 | 2016-07-21 11:57:05 +0200 | [diff] [blame] | 418 | status = mvtwsi_error(MVTWSI_ERROR_TIMEOUT, |
| 419 | control, status, MVTWSI_STATUS_IDLE); |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 420 | return status; |
| 421 | } |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 422 | |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 423 | /* |
| 424 | * twsi_calc_freq() - Compute I2C frequency depending on m and n parameters. |
| 425 | * |
| 426 | * @n: Parameter 'n' for the frequency calculation algorithm. |
| 427 | * @m: Parameter 'm' for the frequency calculation algorithm. |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 428 | * Return: The I2C frequency corresponding to the passed m and n parameters. |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 429 | */ |
mario.six@gdsys.cc | 9e118b3 | 2016-07-21 11:57:06 +0200 | [diff] [blame] | 430 | static uint twsi_calc_freq(const int n, const int m) |
Stefan Roese | cca56a7 | 2015-03-18 09:30:54 +0100 | [diff] [blame] | 431 | { |
Jagan Teki | 68078f7 | 2016-10-13 14:19:35 +0530 | [diff] [blame] | 432 | #ifdef CONFIG_ARCH_SUNXI |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 433 | return CFG_SYS_TCLK / (10 * (m + 1) * (1 << n)); |
Stefan Roese | cca56a7 | 2015-03-18 09:30:54 +0100 | [diff] [blame] | 434 | #else |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 435 | return CFG_SYS_TCLK / (10 * (m + 1) * (2 << n)); |
Stefan Roese | cca56a7 | 2015-03-18 09:30:54 +0100 | [diff] [blame] | 436 | #endif |
| 437 | } |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 438 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 439 | /* |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 440 | * twsi_reset() - Reset the I2C controller. |
| 441 | * |
| 442 | * Resetting the controller also resets the baud rate and slave address, hence |
| 443 | * they must be re-established after the reset. |
| 444 | * |
| 445 | * @twsi: The MVTWSI register structure to use. |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 446 | */ |
mario.six@gdsys.cc | 9f7f689 | 2016-07-21 11:57:08 +0200 | [diff] [blame] | 447 | static void twsi_reset(struct mvtwsi_registers *twsi) |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 448 | { |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 449 | /* Reset controller */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 450 | writel(0, &twsi->soft_reset); |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 451 | /* Wait 2 ms -- this is what the Marvell LSP does */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 452 | udelay(20000); |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 453 | } |
| 454 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 455 | /* |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 456 | * __twsi_i2c_set_bus_speed() - Set the speed of the I2C controller. |
| 457 | * |
| 458 | * This function sets baud rate to the highest possible value that does not |
| 459 | * exceed the requested rate. |
| 460 | * |
| 461 | * @twsi: The MVTWSI register structure to use. |
| 462 | * @requested_speed: The desired frequency the controller should run at |
| 463 | * in Hz. |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 464 | * Return: The actual frequency the controller was configured to. |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 465 | */ |
mario.six@gdsys.cc | 9f7f689 | 2016-07-21 11:57:08 +0200 | [diff] [blame] | 466 | static uint __twsi_i2c_set_bus_speed(struct mvtwsi_registers *twsi, |
mario.six@gdsys.cc | a4ac8b7 | 2016-07-21 11:57:07 +0200 | [diff] [blame] | 467 | uint requested_speed) |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 468 | { |
mario.six@gdsys.cc | 9e118b3 | 2016-07-21 11:57:06 +0200 | [diff] [blame] | 469 | uint tmp_speed, highest_speed, n, m; |
| 470 | uint baud = 0x44; /* Baud rate after controller reset */ |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 471 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 472 | highest_speed = 0; |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 473 | /* Successively try m, n combinations, and use the combination |
| 474 | * resulting in the largest speed that's not above the requested |
| 475 | * speed */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 476 | for (n = 0; n < 8; n++) { |
| 477 | for (m = 0; m < 16; m++) { |
Stefan Roese | cca56a7 | 2015-03-18 09:30:54 +0100 | [diff] [blame] | 478 | tmp_speed = twsi_calc_freq(n, m); |
mario.six@gdsys.cc | 2b656eb | 2016-07-21 11:57:01 +0200 | [diff] [blame] | 479 | if ((tmp_speed <= requested_speed) && |
| 480 | (tmp_speed > highest_speed)) { |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 481 | highest_speed = tmp_speed; |
| 482 | baud = (m << 3) | n; |
| 483 | } |
| 484 | } |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 485 | } |
Hans de Goede | 9830f1c | 2014-06-13 22:55:48 +0200 | [diff] [blame] | 486 | writel(baud, &twsi->baudrate); |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 487 | |
| 488 | /* Wait for controller for one tick */ |
Igor Opaniuk | f7c9176 | 2021-02-09 13:52:45 +0200 | [diff] [blame] | 489 | #if CONFIG_IS_ENABLED(DM_I2C) |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 490 | ndelay(calc_tick(highest_speed)); |
| 491 | #else |
| 492 | ndelay(10000); |
| 493 | #endif |
| 494 | return highest_speed; |
Hans de Goede | 9830f1c | 2014-06-13 22:55:48 +0200 | [diff] [blame] | 495 | } |
| 496 | |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 497 | /* |
| 498 | * __twsi_i2c_init() - Initialize the I2C controller. |
| 499 | * |
| 500 | * @twsi: The MVTWSI register structure to use. |
| 501 | * @speed: The initial frequency the controller should run at |
| 502 | * in Hz. |
| 503 | * @slaveadd: The I2C address to be set for the I2C master. |
| 504 | * @actual_speed: A output parameter that receives the actual frequency |
| 505 | * in Hz the controller was set to by the function. |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 506 | * Return: Zero if the operation succeeded, or a non-zero code if a time out |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 507 | * occurred. |
| 508 | */ |
mario.six@gdsys.cc | 9f7f689 | 2016-07-21 11:57:08 +0200 | [diff] [blame] | 509 | static void __twsi_i2c_init(struct mvtwsi_registers *twsi, int speed, |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 510 | int slaveadd, uint *actual_speed) |
Hans de Goede | 9830f1c | 2014-06-13 22:55:48 +0200 | [diff] [blame] | 511 | { |
Stefan Mavrodiev | 6425ebd | 2018-02-13 09:27:40 +0200 | [diff] [blame] | 512 | uint tmp_speed; |
| 513 | |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 514 | /* Reset controller */ |
mario.six@gdsys.cc | 9f7f689 | 2016-07-21 11:57:08 +0200 | [diff] [blame] | 515 | twsi_reset(twsi); |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 516 | /* Set speed */ |
Stefan Mavrodiev | 6425ebd | 2018-02-13 09:27:40 +0200 | [diff] [blame] | 517 | tmp_speed = __twsi_i2c_set_bus_speed(twsi, speed); |
Heinrich Schuchardt | 5e0fd54 | 2018-01-31 00:57:17 +0100 | [diff] [blame] | 518 | if (actual_speed) |
Stefan Mavrodiev | 6425ebd | 2018-02-13 09:27:40 +0200 | [diff] [blame] | 519 | *actual_speed = tmp_speed; |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 520 | /* Set slave address; even though we don't use it */ |
Hans de Goede | 9830f1c | 2014-06-13 22:55:48 +0200 | [diff] [blame] | 521 | writel(slaveadd, &twsi->slave_address); |
| 522 | writel(0, &twsi->xtnd_slave_addr); |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 523 | /* Assert STOP, but don't care for the result */ |
Igor Opaniuk | f7c9176 | 2021-02-09 13:52:45 +0200 | [diff] [blame] | 524 | #if CONFIG_IS_ENABLED(DM_I2C) |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 525 | (void) twsi_stop(twsi, calc_tick(*actual_speed)); |
| 526 | #else |
| 527 | (void) twsi_stop(twsi, 10000); |
| 528 | #endif |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 529 | } |
| 530 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 531 | /* |
Sam Edwards | c250f5e | 2023-07-25 16:13:05 -0600 | [diff] [blame] | 532 | * __twsi_i2c_reinit() - Reset and reinitialize the I2C controller. |
| 533 | * |
| 534 | * This function should be called to get the MVTWSI controller out of the |
| 535 | * "bus error" state. It saves and restores the baud and address registers. |
| 536 | * |
| 537 | * @twsi: The MVTWSI register structure to use. |
| 538 | * @tick: The duration of a clock cycle at the current I2C speed. |
| 539 | */ |
| 540 | static void __twsi_i2c_reinit(struct mvtwsi_registers *twsi, uint tick) |
| 541 | { |
| 542 | uint baud; |
| 543 | uint slaveadd; |
| 544 | |
| 545 | /* Save baud, address registers */ |
| 546 | baud = readl(&twsi->baudrate); |
| 547 | slaveadd = readl(&twsi->slave_address); |
| 548 | |
| 549 | /* Reset controller */ |
| 550 | twsi_reset(twsi); |
| 551 | |
| 552 | /* Restore baud, address registers */ |
| 553 | writel(baud, &twsi->baudrate); |
| 554 | writel(slaveadd, &twsi->slave_address); |
| 555 | writel(0, &twsi->xtnd_slave_addr); |
| 556 | |
| 557 | /* Assert STOP, but don't care for the result */ |
| 558 | (void) twsi_stop(twsi, tick); |
| 559 | } |
| 560 | |
| 561 | /* |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 562 | * i2c_begin() - Start a I2C transaction. |
| 563 | * |
| 564 | * Begin a I2C transaction with a given expected start status and chip address. |
| 565 | * A START is asserted, and the address byte is sent to the I2C controller. The |
| 566 | * expected address status will be derived from the direction bit (bit 0) of |
| 567 | * the address byte. |
| 568 | * |
| 569 | * @twsi: The MVTWSI register structure to use. |
| 570 | * @expected_start_status: The I2C status the controller is expected to |
| 571 | * assert after the address byte was sent. |
| 572 | * @addr: The address byte to be sent. |
| 573 | * @tick: The duration of a clock cycle at the current |
| 574 | * I2C speed. |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 575 | * Return: Zero if the operation succeeded, or a non-zero code if a time out or |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 576 | * unexpected I2C status occurred. |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 577 | */ |
mario.six@gdsys.cc | 9f7f689 | 2016-07-21 11:57:08 +0200 | [diff] [blame] | 578 | static int i2c_begin(struct mvtwsi_registers *twsi, int expected_start_status, |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 579 | u8 addr, uint tick) |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 580 | { |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 581 | int status, expected_addr_status; |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 582 | |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 583 | /* Compute the expected address status from the direction bit in |
| 584 | * the address byte */ |
| 585 | if (addr & 1) /* Reading */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 586 | expected_addr_status = MVTWSI_STATUS_ADDR_R_ACK; |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 587 | else /* Writing */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 588 | expected_addr_status = MVTWSI_STATUS_ADDR_W_ACK; |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 589 | /* Assert START */ |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 590 | status = twsi_start(twsi, expected_start_status, tick); |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 591 | /* Send out the address if the start went well */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 592 | if (status == 0) |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 593 | status = twsi_send(twsi, addr, expected_addr_status, tick); |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 594 | /* Return 0, or the status of the first failure */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 595 | return status; |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 596 | } |
| 597 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 598 | /* |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 599 | * __twsi_i2c_probe_chip() - Probe the given I2C chip address. |
| 600 | * |
| 601 | * This function begins a I2C read transaction, does a dummy read and NAKs; if |
| 602 | * the procedure succeeds, the chip is considered to be present. |
| 603 | * |
| 604 | * @twsi: The MVTWSI register structure to use. |
| 605 | * @chip: The chip address to probe. |
| 606 | * @tick: The duration of a clock cycle at the current I2C speed. |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 607 | * Return: Zero if the operation succeeded, or a non-zero code if a time out or |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 608 | * unexpected I2C status occurred. |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 609 | */ |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 610 | static int __twsi_i2c_probe_chip(struct mvtwsi_registers *twsi, uchar chip, |
| 611 | uint tick) |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 612 | { |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 613 | u8 dummy_byte; |
| 614 | int status; |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 615 | |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 616 | /* Begin i2c read */ |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 617 | status = i2c_begin(twsi, MVTWSI_STATUS_START, (chip << 1) | 1, tick); |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 618 | /* Dummy read was accepted: receive byte, but NAK it. */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 619 | if (status == 0) |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 620 | status = twsi_recv(twsi, &dummy_byte, MVTWSI_READ_NAK, tick); |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 621 | /* Stop transaction */ |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 622 | twsi_stop(twsi, tick); |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 623 | /* Return 0, or the status of the first failure */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 624 | return status; |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 625 | } |
| 626 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 627 | /* |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 628 | * __twsi_i2c_read() - Read data from a I2C chip. |
| 629 | * |
| 630 | * This function begins a I2C write transaction, and transmits the address |
| 631 | * bytes; then begins a I2C read transaction, and receives the data bytes. |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 632 | * |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 633 | * NOTE: Some devices want a stop right before the second start, while some |
| 634 | * will choke if it is there. Since deciding this is not yet supported in |
| 635 | * higher level APIs, we need to make a decision here, and for the moment that |
| 636 | * will be a repeated start without a preceding stop. |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 637 | * |
| 638 | * @twsi: The MVTWSI register structure to use. |
| 639 | * @chip: The chip address to read from. |
| 640 | * @addr: The address bytes to send. |
| 641 | * @alen: The length of the address bytes in bytes. |
| 642 | * @data: The buffer to receive the data read from the chip (has to have |
| 643 | * a size of at least 'length' bytes). |
| 644 | * @length: The amount of data to be read from the chip in bytes. |
| 645 | * @tick: The duration of a clock cycle at the current I2C speed. |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 646 | * Return: Zero if the operation succeeded, or a non-zero code if a time out or |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 647 | * unexpected I2C status occurred. |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 648 | */ |
mario.six@gdsys.cc | 9f7f689 | 2016-07-21 11:57:08 +0200 | [diff] [blame] | 649 | static int __twsi_i2c_read(struct mvtwsi_registers *twsi, uchar chip, |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 650 | u8 *addr, int alen, uchar *data, int length, |
| 651 | uint tick) |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 652 | { |
mario.six@gdsys.cc | bdf0f66 | 2016-07-21 11:57:05 +0200 | [diff] [blame] | 653 | int status = 0; |
| 654 | int stop_status; |
mario.six@gdsys.cc | 029a84b | 2016-07-21 11:57:11 +0200 | [diff] [blame] | 655 | int expected_start = MVTWSI_STATUS_START; |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 656 | |
Sam Edwards | c250f5e | 2023-07-25 16:13:05 -0600 | [diff] [blame] | 657 | /* Check for (and clear) a bus error from a previous failed transaction |
| 658 | * or another master on the same bus */ |
| 659 | if (readl(&twsi->status) == MVTWSI_BUS_ERROR) |
| 660 | __twsi_i2c_reinit(twsi, tick); |
| 661 | |
mario.six@gdsys.cc | 029a84b | 2016-07-21 11:57:11 +0200 | [diff] [blame] | 662 | if (alen > 0) { |
| 663 | /* Begin i2c write to send the address bytes */ |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 664 | status = i2c_begin(twsi, expected_start, (chip << 1), tick); |
mario.six@gdsys.cc | 029a84b | 2016-07-21 11:57:11 +0200 | [diff] [blame] | 665 | /* Send address bytes */ |
| 666 | while ((status == 0) && alen--) |
Stefan Roese | abd7d31 | 2016-08-25 15:20:01 +0200 | [diff] [blame] | 667 | status = twsi_send(twsi, addr[alen], |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 668 | MVTWSI_STATUS_DATA_W_ACK, tick); |
mario.six@gdsys.cc | 029a84b | 2016-07-21 11:57:11 +0200 | [diff] [blame] | 669 | /* Send repeated STARTs after the initial START */ |
| 670 | expected_start = MVTWSI_STATUS_REPEATED_START; |
| 671 | } |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 672 | /* Begin i2c read to receive data bytes */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 673 | if (status == 0) |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 674 | status = i2c_begin(twsi, expected_start, (chip << 1) | 1, tick); |
mario.six@gdsys.cc | 1cc2c28 | 2016-07-21 11:57:04 +0200 | [diff] [blame] | 675 | /* Receive actual data bytes; set NAK if we if we have nothing more to |
| 676 | * read */ |
| 677 | while ((status == 0) && length--) |
mario.six@gdsys.cc | 9f7f689 | 2016-07-21 11:57:08 +0200 | [diff] [blame] | 678 | status = twsi_recv(twsi, data++, |
mario.six@gdsys.cc | 1cc2c28 | 2016-07-21 11:57:04 +0200 | [diff] [blame] | 679 | length > 0 ? |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 680 | MVTWSI_READ_ACK : MVTWSI_READ_NAK, tick); |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 681 | /* Stop transaction */ |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 682 | stop_status = twsi_stop(twsi, tick); |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 683 | /* Return 0, or the status of the first failure */ |
mario.six@gdsys.cc | bdf0f66 | 2016-07-21 11:57:05 +0200 | [diff] [blame] | 684 | return status != 0 ? status : stop_status; |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 685 | } |
| 686 | |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 687 | /* |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 688 | * __twsi_i2c_write() - Send data to a I2C chip. |
| 689 | * |
| 690 | * This function begins a I2C write transaction, and transmits the address |
| 691 | * bytes; then begins a new I2C write transaction, and sends the data bytes. |
| 692 | * |
| 693 | * @twsi: The MVTWSI register structure to use. |
| 694 | * @chip: The chip address to read from. |
| 695 | * @addr: The address bytes to send. |
| 696 | * @alen: The length of the address bytes in bytes. |
| 697 | * @data: The buffer containing the data to be sent to the chip. |
| 698 | * @length: The length of data to be sent to the chip in bytes. |
| 699 | * @tick: The duration of a clock cycle at the current I2C speed. |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 700 | * Return: Zero if the operation succeeded, or a non-zero code if a time out or |
mario.six@gdsys.cc | efd1fb8 | 2016-07-21 11:57:13 +0200 | [diff] [blame] | 701 | * unexpected I2C status occurred. |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 702 | */ |
mario.six@gdsys.cc | 9f7f689 | 2016-07-21 11:57:08 +0200 | [diff] [blame] | 703 | static int __twsi_i2c_write(struct mvtwsi_registers *twsi, uchar chip, |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 704 | u8 *addr, int alen, uchar *data, int length, |
| 705 | uint tick) |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 706 | { |
mario.six@gdsys.cc | bdf0f66 | 2016-07-21 11:57:05 +0200 | [diff] [blame] | 707 | int status, stop_status; |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 708 | |
Sam Edwards | c250f5e | 2023-07-25 16:13:05 -0600 | [diff] [blame] | 709 | /* Check for (and clear) a bus error from a previous failed transaction |
| 710 | * or another master on the same bus */ |
| 711 | if (readl(&twsi->status) == MVTWSI_BUS_ERROR) |
| 712 | __twsi_i2c_reinit(twsi, tick); |
| 713 | |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 714 | /* Begin i2c write to send first the address bytes, then the |
| 715 | * data bytes */ |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 716 | status = i2c_begin(twsi, MVTWSI_STATUS_START, (chip << 1), tick); |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 717 | /* Send address bytes */ |
mario.six@gdsys.cc | c4eceb5 | 2016-07-21 11:57:09 +0200 | [diff] [blame] | 718 | while ((status == 0) && (alen-- > 0)) |
Stefan Roese | abd7d31 | 2016-08-25 15:20:01 +0200 | [diff] [blame] | 719 | status = twsi_send(twsi, addr[alen], MVTWSI_STATUS_DATA_W_ACK, |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 720 | tick); |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 721 | /* Send data bytes */ |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 722 | while ((status == 0) && (length-- > 0)) |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 723 | status = twsi_send(twsi, *(data++), MVTWSI_STATUS_DATA_W_ACK, |
| 724 | tick); |
Albert Aribaud | 04280c4 | 2010-08-27 18:26:05 +0200 | [diff] [blame] | 725 | /* Stop transaction */ |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 726 | stop_status = twsi_stop(twsi, tick); |
mario.six@gdsys.cc | 7b0c431 | 2016-07-21 11:57:03 +0200 | [diff] [blame] | 727 | /* Return 0, or the status of the first failure */ |
mario.six@gdsys.cc | bdf0f66 | 2016-07-21 11:57:05 +0200 | [diff] [blame] | 728 | return status != 0 ? status : stop_status; |
Heiko Schocher | 5cd2a24 | 2009-07-20 09:59:37 +0200 | [diff] [blame] | 729 | } |
| 730 | |
Igor Opaniuk | f7c9176 | 2021-02-09 13:52:45 +0200 | [diff] [blame] | 731 | #if !CONFIG_IS_ENABLED(DM_I2C) |
mario.six@gdsys.cc | a4ac8b7 | 2016-07-21 11:57:07 +0200 | [diff] [blame] | 732 | static void twsi_i2c_init(struct i2c_adapter *adap, int speed, |
| 733 | int slaveadd) |
| 734 | { |
mario.six@gdsys.cc | 9f7f689 | 2016-07-21 11:57:08 +0200 | [diff] [blame] | 735 | struct mvtwsi_registers *twsi = twsi_get_base(adap); |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 736 | __twsi_i2c_init(twsi, speed, slaveadd, NULL); |
mario.six@gdsys.cc | a4ac8b7 | 2016-07-21 11:57:07 +0200 | [diff] [blame] | 737 | } |
| 738 | |
| 739 | static uint twsi_i2c_set_bus_speed(struct i2c_adapter *adap, |
| 740 | uint requested_speed) |
| 741 | { |
mario.six@gdsys.cc | 9f7f689 | 2016-07-21 11:57:08 +0200 | [diff] [blame] | 742 | struct mvtwsi_registers *twsi = twsi_get_base(adap); |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 743 | __twsi_i2c_set_bus_speed(twsi, requested_speed); |
| 744 | return 0; |
mario.six@gdsys.cc | a4ac8b7 | 2016-07-21 11:57:07 +0200 | [diff] [blame] | 745 | } |
| 746 | |
| 747 | static int twsi_i2c_probe(struct i2c_adapter *adap, uchar chip) |
| 748 | { |
mario.six@gdsys.cc | 9f7f689 | 2016-07-21 11:57:08 +0200 | [diff] [blame] | 749 | struct mvtwsi_registers *twsi = twsi_get_base(adap); |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 750 | return __twsi_i2c_probe_chip(twsi, chip, 10000); |
mario.six@gdsys.cc | a4ac8b7 | 2016-07-21 11:57:07 +0200 | [diff] [blame] | 751 | } |
| 752 | |
| 753 | static int twsi_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr, |
| 754 | int alen, uchar *data, int length) |
| 755 | { |
mario.six@gdsys.cc | 9f7f689 | 2016-07-21 11:57:08 +0200 | [diff] [blame] | 756 | struct mvtwsi_registers *twsi = twsi_get_base(adap); |
mario.six@gdsys.cc | c4eceb5 | 2016-07-21 11:57:09 +0200 | [diff] [blame] | 757 | u8 addr_bytes[4]; |
| 758 | |
| 759 | addr_bytes[0] = (addr >> 0) & 0xFF; |
| 760 | addr_bytes[1] = (addr >> 8) & 0xFF; |
| 761 | addr_bytes[2] = (addr >> 16) & 0xFF; |
| 762 | addr_bytes[3] = (addr >> 24) & 0xFF; |
| 763 | |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 764 | return __twsi_i2c_read(twsi, chip, addr_bytes, alen, data, length, |
| 765 | 10000); |
mario.six@gdsys.cc | a4ac8b7 | 2016-07-21 11:57:07 +0200 | [diff] [blame] | 766 | } |
| 767 | |
| 768 | static int twsi_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr, |
| 769 | int alen, uchar *data, int length) |
| 770 | { |
mario.six@gdsys.cc | 9f7f689 | 2016-07-21 11:57:08 +0200 | [diff] [blame] | 771 | struct mvtwsi_registers *twsi = twsi_get_base(adap); |
mario.six@gdsys.cc | c4eceb5 | 2016-07-21 11:57:09 +0200 | [diff] [blame] | 772 | u8 addr_bytes[4]; |
| 773 | |
| 774 | addr_bytes[0] = (addr >> 0) & 0xFF; |
| 775 | addr_bytes[1] = (addr >> 8) & 0xFF; |
| 776 | addr_bytes[2] = (addr >> 16) & 0xFF; |
| 777 | addr_bytes[3] = (addr >> 24) & 0xFF; |
| 778 | |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 779 | return __twsi_i2c_write(twsi, chip, addr_bytes, alen, data, length, |
| 780 | 10000); |
mario.six@gdsys.cc | a4ac8b7 | 2016-07-21 11:57:07 +0200 | [diff] [blame] | 781 | } |
| 782 | |
Tom Rini | c188ed4 | 2022-12-04 10:04:09 -0500 | [diff] [blame] | 783 | #ifdef CFG_I2C_MVTWSI_BASE0 |
Hans de Goede | 9830f1c | 2014-06-13 22:55:48 +0200 | [diff] [blame] | 784 | U_BOOT_I2C_ADAP_COMPLETE(twsi0, twsi_i2c_init, twsi_i2c_probe, |
| 785 | twsi_i2c_read, twsi_i2c_write, |
| 786 | twsi_i2c_set_bus_speed, |
| 787 | CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 0) |
Paul Kocialkowski | 2fae3e7 | 2015-04-10 23:09:51 +0200 | [diff] [blame] | 788 | #endif |
Tom Rini | 34e4e86 | 2022-12-04 10:04:10 -0500 | [diff] [blame] | 789 | #ifdef CFG_I2C_MVTWSI_BASE1 |
Paul Kocialkowski | 2fae3e7 | 2015-04-10 23:09:51 +0200 | [diff] [blame] | 790 | U_BOOT_I2C_ADAP_COMPLETE(twsi1, twsi_i2c_init, twsi_i2c_probe, |
| 791 | twsi_i2c_read, twsi_i2c_write, |
| 792 | twsi_i2c_set_bus_speed, |
| 793 | CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 1) |
| 794 | |
| 795 | #endif |
Tom Rini | 364d002 | 2023-01-10 11:19:45 -0500 | [diff] [blame] | 796 | #ifdef CFG_I2C_MVTWSI_BASE2 |
Paul Kocialkowski | 2fae3e7 | 2015-04-10 23:09:51 +0200 | [diff] [blame] | 797 | U_BOOT_I2C_ADAP_COMPLETE(twsi2, twsi_i2c_init, twsi_i2c_probe, |
| 798 | twsi_i2c_read, twsi_i2c_write, |
| 799 | twsi_i2c_set_bus_speed, |
| 800 | CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 2) |
| 801 | |
| 802 | #endif |
| 803 | #ifdef CONFIG_I2C_MVTWSI_BASE3 |
| 804 | U_BOOT_I2C_ADAP_COMPLETE(twsi3, twsi_i2c_init, twsi_i2c_probe, |
| 805 | twsi_i2c_read, twsi_i2c_write, |
| 806 | twsi_i2c_set_bus_speed, |
| 807 | CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 3) |
| 808 | |
| 809 | #endif |
| 810 | #ifdef CONFIG_I2C_MVTWSI_BASE4 |
| 811 | U_BOOT_I2C_ADAP_COMPLETE(twsi4, twsi_i2c_init, twsi_i2c_probe, |
| 812 | twsi_i2c_read, twsi_i2c_write, |
| 813 | twsi_i2c_set_bus_speed, |
| 814 | CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 4) |
| 815 | |
| 816 | #endif |
Jelle van der Waa | 8d3d7c1 | 2016-01-14 14:06:26 +0100 | [diff] [blame] | 817 | #ifdef CONFIG_I2C_MVTWSI_BASE5 |
| 818 | U_BOOT_I2C_ADAP_COMPLETE(twsi5, twsi_i2c_init, twsi_i2c_probe, |
| 819 | twsi_i2c_read, twsi_i2c_write, |
| 820 | twsi_i2c_set_bus_speed, |
| 821 | CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 5) |
| 822 | |
| 823 | #endif |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 824 | #else /* CONFIG_DM_I2C */ |
| 825 | |
| 826 | static int mvtwsi_i2c_probe_chip(struct udevice *bus, u32 chip_addr, |
| 827 | u32 chip_flags) |
| 828 | { |
| 829 | struct mvtwsi_i2c_dev *dev = dev_get_priv(bus); |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 830 | return __twsi_i2c_probe_chip(dev->base, chip_addr, dev->tick); |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 831 | } |
| 832 | |
| 833 | static int mvtwsi_i2c_set_bus_speed(struct udevice *bus, uint speed) |
| 834 | { |
| 835 | struct mvtwsi_i2c_dev *dev = dev_get_priv(bus); |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 836 | |
| 837 | dev->speed = __twsi_i2c_set_bus_speed(dev->base, speed); |
| 838 | dev->tick = calc_tick(dev->speed); |
| 839 | |
| 840 | return 0; |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 841 | } |
| 842 | |
Simon Glass | aad29ae | 2020-12-03 16:55:21 -0700 | [diff] [blame] | 843 | static int mvtwsi_i2c_of_to_plat(struct udevice *bus) |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 844 | { |
| 845 | struct mvtwsi_i2c_dev *dev = dev_get_priv(bus); |
| 846 | |
Masahiro Yamada | 32822d0 | 2020-08-04 14:14:43 +0900 | [diff] [blame] | 847 | dev->base = dev_read_addr_ptr(bus); |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 848 | |
| 849 | if (!dev->base) |
| 850 | return -ENOMEM; |
| 851 | |
Simon Glass | dd79d6e | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 852 | dev->index = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus), |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 853 | "cell-index", -1); |
Simon Glass | dd79d6e | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 854 | dev->slaveadd = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus), |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 855 | "u-boot,i2c-slave-addr", 0x0); |
Simon Glass | f0c99c5 | 2020-01-23 11:48:22 -0700 | [diff] [blame] | 856 | dev->speed = dev_read_u32_default(bus, "clock-frequency", |
| 857 | I2C_SPEED_STANDARD_RATE); |
| 858 | |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 859 | return 0; |
| 860 | } |
| 861 | |
Baruch Siach | 91006c7 | 2018-06-07 12:38:10 +0300 | [diff] [blame] | 862 | static void twsi_disable_i2c_slave(struct mvtwsi_registers *twsi) |
| 863 | { |
| 864 | clrbits_le32(&twsi->debug, BIT(18)); |
| 865 | } |
| 866 | |
| 867 | static int mvtwsi_i2c_bind(struct udevice *bus) |
| 868 | { |
Masahiro Yamada | 32822d0 | 2020-08-04 14:14:43 +0900 | [diff] [blame] | 869 | struct mvtwsi_registers *twsi = dev_read_addr_ptr(bus); |
Baruch Siach | 91006c7 | 2018-06-07 12:38:10 +0300 | [diff] [blame] | 870 | |
| 871 | /* Disable the hidden slave in i2c0 of these platforms */ |
Simon Glass | 4123ba0 | 2020-12-16 21:20:15 -0700 | [diff] [blame] | 872 | if ((IS_ENABLED(CONFIG_ARMADA_38X) || |
| 873 | IS_ENABLED(CONFIG_ARCH_KIRKWOOD) || |
| 874 | IS_ENABLED(CONFIG_ARMADA_8K)) && !dev_seq(bus)) |
Baruch Siach | 91006c7 | 2018-06-07 12:38:10 +0300 | [diff] [blame] | 875 | twsi_disable_i2c_slave(twsi); |
| 876 | |
| 877 | return 0; |
| 878 | } |
| 879 | |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 880 | static int mvtwsi_i2c_probe(struct udevice *bus) |
| 881 | { |
| 882 | struct mvtwsi_i2c_dev *dev = dev_get_priv(bus); |
Samuel Holland | 5b35b29 | 2021-09-12 10:21:39 -0500 | [diff] [blame] | 883 | struct reset_ctl reset; |
| 884 | struct clk clk; |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 885 | uint actual_speed; |
Samuel Holland | 5b35b29 | 2021-09-12 10:21:39 -0500 | [diff] [blame] | 886 | int ret; |
| 887 | |
| 888 | ret = reset_get_by_index(bus, 0, &reset); |
| 889 | if (!ret) |
| 890 | reset_deassert(&reset); |
| 891 | |
| 892 | ret = clk_get_by_index(bus, 0, &clk); |
| 893 | if (!ret) |
| 894 | clk_enable(&clk); |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 895 | |
| 896 | __twsi_i2c_init(dev->base, dev->speed, dev->slaveadd, &actual_speed); |
| 897 | dev->speed = actual_speed; |
| 898 | dev->tick = calc_tick(dev->speed); |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 899 | return 0; |
| 900 | } |
| 901 | |
| 902 | static int mvtwsi_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) |
| 903 | { |
| 904 | struct mvtwsi_i2c_dev *dev = dev_get_priv(bus); |
| 905 | struct i2c_msg *dmsg, *omsg, dummy; |
Stefan Roese | 0520727 | 2021-11-18 09:18:41 +0100 | [diff] [blame] | 906 | u8 *addr_buf_ptr; |
| 907 | u8 addr_buf[4]; |
| 908 | int i; |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 909 | |
| 910 | memset(&dummy, 0, sizeof(struct i2c_msg)); |
| 911 | |
| 912 | /* We expect either two messages (one with an offset and one with the |
| 913 | * actual data) or one message (just data or offset/data combined) */ |
| 914 | if (nmsgs > 2 || nmsgs == 0) { |
| 915 | debug("%s: Only one or two messages are supported.", __func__); |
| 916 | return -1; |
| 917 | } |
| 918 | |
| 919 | omsg = nmsgs == 1 ? &dummy : msg; |
| 920 | dmsg = nmsgs == 1 ? msg : msg + 1; |
| 921 | |
Stefan Roese | 0520727 | 2021-11-18 09:18:41 +0100 | [diff] [blame] | 922 | /* We need to swap the register address if its size is > 1 */ |
| 923 | addr_buf_ptr = &addr_buf[0]; |
| 924 | for (i = omsg->len; i > 0; i--) |
| 925 | *addr_buf_ptr++ = omsg->buf[i - 1]; |
| 926 | |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 927 | if (dmsg->flags & I2C_M_RD) |
Stefan Roese | 0520727 | 2021-11-18 09:18:41 +0100 | [diff] [blame] | 928 | return __twsi_i2c_read(dev->base, dmsg->addr, addr_buf, |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 929 | omsg->len, dmsg->buf, dmsg->len, |
| 930 | dev->tick); |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 931 | else |
Stefan Roese | 0520727 | 2021-11-18 09:18:41 +0100 | [diff] [blame] | 932 | return __twsi_i2c_write(dev->base, dmsg->addr, addr_buf, |
mario.six@gdsys.cc | e841b58 | 2016-07-21 11:57:12 +0200 | [diff] [blame] | 933 | omsg->len, dmsg->buf, dmsg->len, |
| 934 | dev->tick); |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 935 | } |
| 936 | |
| 937 | static const struct dm_i2c_ops mvtwsi_i2c_ops = { |
| 938 | .xfer = mvtwsi_i2c_xfer, |
| 939 | .probe_chip = mvtwsi_i2c_probe_chip, |
| 940 | .set_bus_speed = mvtwsi_i2c_set_bus_speed, |
| 941 | }; |
| 942 | |
| 943 | static const struct udevice_id mvtwsi_i2c_ids[] = { |
| 944 | { .compatible = "marvell,mv64xxx-i2c", }, |
Stefan Roese | 58e58d8 | 2016-09-16 15:07:55 +0200 | [diff] [blame] | 945 | { .compatible = "marvell,mv78230-i2c", }, |
Chris Morgan | a9f6d95 | 2022-01-07 11:52:54 -0600 | [diff] [blame] | 946 | { .compatible = "allwinner,sun4i-a10-i2c", }, |
Jernej Skrabec | 9220d50 | 2017-04-27 00:03:36 +0200 | [diff] [blame] | 947 | { .compatible = "allwinner,sun6i-a31-i2c", }, |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 948 | { /* sentinel */ } |
| 949 | }; |
| 950 | |
| 951 | U_BOOT_DRIVER(i2c_mvtwsi) = { |
| 952 | .name = "i2c_mvtwsi", |
| 953 | .id = UCLASS_I2C, |
| 954 | .of_match = mvtwsi_i2c_ids, |
Baruch Siach | 91006c7 | 2018-06-07 12:38:10 +0300 | [diff] [blame] | 955 | .bind = mvtwsi_i2c_bind, |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 956 | .probe = mvtwsi_i2c_probe, |
Simon Glass | aad29ae | 2020-12-03 16:55:21 -0700 | [diff] [blame] | 957 | .of_to_plat = mvtwsi_i2c_of_to_plat, |
Simon Glass | 8a2b47f | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 958 | .priv_auto = sizeof(struct mvtwsi_i2c_dev), |
mario.six@gdsys.cc | 355a127 | 2016-07-21 11:57:10 +0200 | [diff] [blame] | 959 | .ops = &mvtwsi_i2c_ops, |
| 960 | }; |
| 961 | #endif /* CONFIG_DM_I2C */ |