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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefano Babic17b60372016-06-08 10:50:20 +02002/*
3 * Copyright (C) Stefano Babic <sbabic@denx.de>
Stefano Babic17b60372016-06-08 10:50:20 +02004 */
5
6
7#ifndef __PCM058_CONFIG_H
8#define __PCM058_CONFIG_H
9
Stefano Babic17b60372016-06-08 10:50:20 +020010#ifdef CONFIG_SPL
Stefano Babic17b60372016-06-08 10:50:20 +020011#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
12#include "imx6_spl.h"
13#endif
14
15#include "mx6_common.h"
16
17/* Thermal */
18#define CONFIG_IMX_THERMAL
19
20/* Serial */
21#define CONFIG_MXC_UART
22#define CONFIG_MXC_UART_BASE UART2_BASE
Simon Glass4694a742016-10-17 20:12:39 -060023#define CONSOLE_DEV "ttymxc1"
Stefano Babic17b60372016-06-08 10:50:20 +020024
25#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
26
27/* Early setup */
Stefano Babic17b60372016-06-08 10:50:20 +020028
29
30/* Size of malloc() pool */
31#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
32
33/* Ethernet */
34#define CONFIG_FEC_MXC
35#define CONFIG_MII
36#define IMX_FEC_BASE ENET_BASE_ADDR
37#define CONFIG_FEC_XCV_TYPE RGMII
38#define CONFIG_ETHPRIME "FEC"
39#define CONFIG_FEC_MXC_PHYADDR 3
40
Stefano Babic17b60372016-06-08 10:50:20 +020041/* SPI Flash */
Stefano Babic17b60372016-06-08 10:50:20 +020042#define CONFIG_SF_DEFAULT_BUS 0
43#define CONFIG_SF_DEFAULT_CS 0
44#define CONFIG_SF_DEFAULT_SPEED 20000000
45#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
46
47/* I2C Configs */
48#define CONFIG_SYS_I2C
49#define CONFIG_SYS_I2C_MXC
50#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 2 */
51#define CONFIG_SYS_I2C_SPEED 100000
52
53#ifndef CONFIG_SPL_BUILD
Stefano Babic17b60372016-06-08 10:50:20 +020054/* Enable NAND support */
Stefano Babic17b60372016-06-08 10:50:20 +020055#define CONFIG_SYS_MAX_NAND_DEVICE 1
56#define CONFIG_SYS_NAND_BASE 0x40000000
57#define CONFIG_SYS_NAND_5_ADDR_CYCLE
58#define CONFIG_SYS_NAND_ONFI_DETECTION
59#endif
60
61/* DMA stuff, needed for GPMI/MXS NAND support */
Stefano Babic17b60372016-06-08 10:50:20 +020062
63/* Filesystem support */
Stefano Babic17b60372016-06-08 10:50:20 +020064
Stefano Babic17b60372016-06-08 10:50:20 +020065/* Physical Memory Map */
66#define CONFIG_NR_DRAM_BANKS 1
67#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
68
69#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
70#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
71#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
72
73#define CONFIG_SYS_INIT_SP_OFFSET \
74 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
75#define CONFIG_SYS_INIT_SP_ADDR \
76 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
77
78/* MMC Configs */
79#define CONFIG_SYS_FSL_ESDHC_ADDR 0
80#define CONFIG_SYS_FSL_USDHC_NUM 1
81
82/* Environment organization */
Stefano Babic17b60372016-06-08 10:50:20 +020083#define CONFIG_ENV_SIZE (16 * 1024)
84#define CONFIG_ENV_OFFSET (1024 * SZ_1K)
85#define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)
86#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
87#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
88#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
89#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
90#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
91#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
92 CONFIG_ENV_SECT_SIZE)
93#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
94
95#ifdef CONFIG_ENV_IS_IN_NAND
96#define CONFIG_ENV_OFFSET (0x1E0000)
97#define CONFIG_ENV_SECT_SIZE (128 * SZ_1K)
98#endif
99
100#endif